drm/nouveau/ofa/r535: initial support

Adds support for allocating OFA classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-45-skeggsb@gmail.com

drm/nouveau/nvjpg/r535: initial support

Adds support for allocating NVJPG classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-44-skeggsb@gmail.com

drm/nouveau/nvenc/r535: initial support

Adds support for allocating VIDEO_ENCODER classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-43-skeggsb@gmail.com

drm/nouveau/nvdec/r535: initial support

Adds support for allocating VIDEO_DECODER classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-42-skeggsb@gmail.com

drm/nouveau/gr/r535: initial support

Adds support for allocating GR classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-41-skeggsb@gmail.com

drm/nouveau/ce/r535: initial support

Adds support for allocating DMA_COPY classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-40-skeggsb@gmail.com

drm/nouveau/fifo/r535: initial support

- Adds support for allocating CHANNEL_GPFIFO classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-39-skeggsb@gmail.com

drm/nouveau/disp/r535: initial support

Adds support for modesetting on RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-38-skeggsb@gmail.com

drm/nouveau/mmu/r535: initial support

- Valid VRAM regions are read from GSP-RM, and used to construct our MM
- BAR1/BAR2 VMMs modified to be shared with RM
- Client VMMs have RM VASPACE objects created for them
- Adds FBSR to backup system objects in VRAM across suspend

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-37-skeggsb@gmail.com

drm/nouveau/gsp/r535: add interrupt handling

Fetches the interrupt table from RM, and hooks up the GSP interrupt
handler to message queue processing to catch async messages.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-36-skeggsb@gmail.com

drm/nouveau/gsp/r535: add support for booting GSP-RM

This commit adds the initial code needed to boot the GSP-RM firmware
provided by NVIDIA, bringing with it the beginnings of Ada support.

Until it's had more testing and time to bake, support is disabled by
default (except on Ada). GSP-RM usage can be enabled by passing the
"config=NvGspRm=1" module option.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-33-skeggsb@gmail.com

drm/nouveau/nvenc/tu102-: prepare for GSP-RM

- (temporarily) disable if GSP-RM detected, will be added later
- provide empty class list for non-GSP paths
- split tu102 from gm107, it will provide host classes later

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-29-skeggsb@gmail.com

drm/nouveau/nvdec/tu102-: prepare for GSP-RM

- (temporarily) disable if GSP-RM detected, will be added later
- provide empty class list for non-GSP paths
- split tu102- from gm107, they will provide host classes later
- fixup HW engine instance masks

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-28-skeggsb@gmail.com

drm/nouveau/gsp: prepare for GSP-RM

- move TOP after GSP, so we can disable TOP if GSP is in use
- provide plumbing to support falcon-only and GSP-RM paths
- provide a method for subdevs to detect GSP-RM paths
- split tu102/tu116/ga100 paths from gv100, which can't support GSP-RM

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-5-skeggsb@gmail.com

drm/nouveau/fb/tu102-: fix register used to determine scrub status

Turing apparently needs to use the same register we use on Ampere.

Not executing the scrubber ucode when required would result in large
areas of VRAM being inaccessible to the driver.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230130223715.1831509-2-bskeggs@redhat.com

drm/nouveau/gr/ga102: initial support

v2:
- whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Gourav Samaiya <gsamaiya@nvidia.com>

drm/nouveau/ltc/ga102: initial support

v2. fixup for ga103 early merge

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/acr/ga102: initial support

v2. fixup for ga103 early merge

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Gourav Samaiya <gsamaiya@nvidia.com>

drm/nouveau/fb/ga102: load and boot VPR scrubber FW

v2. fixup for ga103 early merge

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Gourav Samaiya <gsamaiya@nvidia.com>

drm/nouveau/acr: use common falcon HS FW code for ACR FWs

Adds context binding and support for FWs with a bootloader to the code
that was added to load VPR scrubber HS binaries, and ports ACR over to
using all of it.

- gv100 split from gp108 to handle FW exit status differences

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fb/gp102-: unlock VPR right after devinit

Under memory load, instmem allocations could end up in the regions of
VRAM that are inaccessible right after boot, and be corrupted after a
suspend/resume cycle as a result of being restored before booting the
mem unlock firmware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fifo/ga100-: initial support

- replaces the hacked-up version that existed solely to support TTM

v2. remove earlier hack preventing use of non-stall intr for fences

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/ga100-: initial support

- replaces the hacked-up version that existed solely to support TTM
- noop until the next commit, adding proper support for ampere host

v2. fixup for ga103 early merge

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: add common runlist/engine topology

Creates an nvkm_runl for each runlist on the GPU, and an nvkm_engn for
each engine that is reachable from a runlist.

- basically what gk104- already does, but extended to all chips
- adds per-runlist CHID allocators (Ampere)
- splits g98/gt2xx out from g84 (different target engines)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fifo: add chid_nr()

- reads channel count from GPU from gm200 onwards
- removes gm20b/gp10b (they become identical to gm200/gp100)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: implement intr handling on top of nvkm_intr

- new-style handlers can now be used here too
- decent clean-up

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fault/ga100: initial support

TU102 implementation should be OK for Ampere now.

v2. fixup for ga103 early merge

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/vfn: add stub subdev for dev_func

Initially for NV_USERMODE class, and Turing/Ampere's new interrupt tree.

v2. fixup for ga103 early merge

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/intr: add shared interrupt plumbing between pci/tegra

Unifies the handling between PCI-based and Tegra GPUs, and makes more
explicit/obvious where device interrupts can be expected.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/top: parse device topology right after devinit

We're going to want this information available earlier than it is now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau: recognise GA103

Appears to be ok with general GA10x code.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Cc: <stable@vger.kernel.org> # v5.15+
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220803142745.2679510-1-kherbst@redhat.com

drm/nouveau/device: remove pwrsrc notify in favour of a direct call to clk

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/nouveau: Fix spelling mistake "endianess" -> "endianness"

There is a spelling mistake in a nvdev_error error message. Fix it.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220315221929.2959700-1-colin.i.king@gmail.com

drm/nouveau: recognise GA106

I've got HW now, appears to work as expected so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: <stable@vger.kernel.org> # 5.14+
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211118030413.2610-1-skeggsb@gmail.com

ce/gf100: fix incorrect CE0 address calculation on some GPUs

The code which constructs the modules for each engine present on the GPU
passes -1 for 'instance' on non-instanced engines, which affects how the
name for a sub-device is generated. This is then stored as 'instance 0'
in nvkm_subdev.inst, so code can potentially be shared with earlier GPUs
that only had a single instance of an engine.

However, GF100's CE constructor uses this value to calculate the address
of its falcon before it's translated, resulting in CE0 getting the wrong
address.

This slightly modifies the approach, always passing a valid instance for
engines that *can* have multiple copies, and having the code for earlier
GPUs explicitly ask for non-instanced name generation.

Bug: https://gitlab.freedesktop.org/drm/nouveau/-/issues/91

Fixes: 50551b15c760 ("drm/nouveau/ce: switch to instanced constructor")
Cc: <stable@vger.kernel.org> # v5.12+
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211103011057.15344-1-skeggsb@gmail.com

drm/nouveau/ga102-: support ttm buffer moves via copy engine

We don't currently have any kind of real acceleration on Ampere GPUs,
but the TTM memcpy() fallback paths aren't really designed to handle
copies between different devices, such as on Optimus systems, and
result in a kernel OOPS.

A few options were investigated to try and fix this, but didn't work
out, and likely would have resulted in a very unpleasant experience
for users anyway.

This commit adds just enough support for setting up a single channel
connected to a copy engine, which the kernel can use to accelerate
the buffer copies between devices. Userspace has no access to this
incomplete channel support, but it's suitable for TTM's needs.

A more complete implementation of host(fifo) for Ampere GPUs is in
the works, but the required changes are far too invasive that they
would be unsuitable to backport to fix this issue on current kernels.

v2: fix GPFIFO length in RAMFC (reported by Karol)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Karol Herbst <kherbst@redhat.com>
Cc: <stable@vger.kernel.org> # v5.12+
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210916220406.666454-1-skeggsb@gmail.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

drm/nouveau: recognise GA107

Still no GA106 as I don't have HW to verif.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/top/ga100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/privring: rename from ibus

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/nvkm: remove nvkm_subdev.index

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/nvkm: determine subdev id/order from layout

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/vic: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/sw: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/sec2: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/sec: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/pm: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/nvenc: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/nvdec: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/msvld: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/msppp: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mspdec: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/msenc: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mpeg: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/me: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/ifb: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/gr: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fifo: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/dma: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/disp: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/cipher: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/ce: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/bsp,vp: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/volt: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/top: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/tmr: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/therm: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/pmu: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/pci: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mxm: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mmu: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/ltc: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/instmem: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/iccsense: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/ibus: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/i2c: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/gsp: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/gpio: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fuse: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fb: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/fault: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/devinit: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/clk: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/bus: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/bios: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/bar: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/acr: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/nvkm: add macros for subdev layout

Rather than having to add new engines / engine instances to multiple places,
define everything in include/nvkm/core/layout.h and use macros to generate
the required plumbing.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/device: pass instance id when looking up a subdev/engine

This switches to using the subdev list for lookup, and otherwise should
be a no-op aside from switching the function signatures.

Callers will be transitioned to split type+inst individually.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/subdev: store full subdev name in struct

Much easier to store this to avoid having to reconstruct a string for a
specific subdev, taking into account whether it's instanced or not.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/subdev: store subdevs in list

This is somewhat nicer to read.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/disp/ga10[24]: initial support

UEFI/RM no longer use IED scripts from the VBIOS, though they appear to
have been updated for use by the x86 VBIOS code, so we should be able to
continue using them for the moment.

Unfortunately, we require some hacks to do so, as the BeforeLinkTraining
IED script became a pointer to an array of scripts instead, without a
revbump of the relevant tables.

There's also some changes to SOR clock divider fiddling, which are
hopefully correct enough that things work as they should.

AFAIK, GA100 shouldn't have display, so it hasn't been added.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dmaobj/ga10[24]: initial support

Appears to be compatible with GV100 code, and not required on GA100, as
it shouldn't have display.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/ga10[024]: initial support

Appears to be compatible with GM200 code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/ga10[024]: initial support

GA100 appears to be compatible with GK104 code, the others have some
register moves.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/ga10[024]: initial support

Appears to be compatible with TU102 code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/ga10[024]: initial support

Appears to be compatible with TU102 code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/timer/ga10[024]: initial support

Appears to be compatible with GK20A code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/ga10[024]: initial support

No VPR scrub. GA102 and GA104 have a new VRAM size detection method.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/ga10[024]: initial support

Appears to be compatible with NV50 code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/privring/ga10[024]: initial support

Appears to be compatible with GM200 code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/ga10[024]: initial support

Fortunately, all the interrupts we need to bring up basic display support
are contained in a single leaf register, allowing this basic (but hackish)
implementation.

There's a bunch more invasive patches to come implementing all this in a
better/more complete way, but trying to get a minimal series out first.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/ga10[024]: initial support

VPLL regs changed a bit. There's more stuff to do around these, but it's
less invasive to stick those changes into disp for now.

None of that belongs here anymore anyhow - fix that someday.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/ga10[024]: initial support

Forcing PRAMIN-shadowing off for GA100, as it requires display, and we don't
know if/where the fuse register for detecting its presence is.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/ga10[024]: initial support

Appears to be compatible with GP100 code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GA10[024]

GA100 hidden behind a module option, as it's not been as well verified
since initial bring-up and may need additional changes.

There's no display anyway, so this can wait for a bit.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gk110: split out from i2c/gk104

No functional changes here yet.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: fix changing endianess code to work on older GPUs

With this we try to detect if the endianess switch works and assume LE if
not. Suggested by Ben.

Fixes: 51c05340e407 ("drm/nouveau/device: detect if changing endianness failed")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Cc: <stable@vger.kernel.org> # v5.8+
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: return error for unknown chipsets

Previously the code relied on device->pri to be NULL and to fail probing
later. We really should just return an error inside nvkm_device_ctor for
unsupported GPUs.

Fixes: 24d5ff40a732 ("drm/nouveau/device: rework mmio mapping code to get rid of second map")

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Cc: dann frazier <dann.frazier@canonical.com>
Cc: dri-devel <dri-devel@lists.freedesktop.org>
Cc: Dave Airlie <airlied@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Jeremy Cline <jcline@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201006220528.13925-1-kherbst@redhat.com

drm/nouveau/pmu/gm20x: don't pretend we support loading with our custom FW

It technically loads, and runs, but is ultimately pointless outside of
a very narrow window (fanless systems where one wants to attempt using
the, broken for a lot of gm20x, memory reclocking code).

It's also potentially dangerous to override the VBIOS-provided "Pre-OS"
PMU, which would be responsible for fan control otherwise.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: use regular PRI accessors in chipset detection

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: detect vGPUs

Using ENODEV as this prevents probe failed errors in dmesg.

v2: move check further down

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: detect if changing endianness failed

v2: relax the checks a little

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: rework mmio mapping code to get rid of second map

Fixes warnings on GPUs with smaller a smaller mmio region like vGPUs.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/tu11x: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/acr/tu11x: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/tu10x: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/acr/tu10x: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot: remove

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/acr: implement new subdev to replace "secure boot"

ACR is responsible for managing the firmware for LS (Low Secure) falcons,
this was previously handled in the driver by SECBOOT.

This rewrite started from some test code that attempted to replicate the
procedure RM uses in order to debug early Turing ACR firmwares that were
provided by NVIDIA for development.

Compared with SECBOOT, the code is structured into more individual steps,
with the aim of making the process easier to follow/debug, whilst making
it possible to support newer firmware versions that may have a different
binary format or API interface.

The HS (High Secure) binary(s) are now booted earlier in device init, to
match the behaviour of RM, whereas SECBOOT would delay this until we try
to boot the first LS falcon.

There's also additional debugging features available, with the intention
of making it easier to solve issues during FW/HW bring-up in the future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/nvenc: add a stub implementation for the GPUs where it should be supported

Mostly so we don't lose info hidden in falcon.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/nvdec/gm107-: add missing engine instances

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/nvdec/gm107: rename from gp102 implementation

NVDEC is available from GM107, and we currently only have a stub
implementation anyway, let's make it explicit.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/sec2/gp108: split from gp102 implementation

ACR LS FW loading is moving out of SECBOOT and into their specific subdevs,
and the available GP108/GV100 FWs differ from the other GP10x boards.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp108: split from gp107

ACR LS FW loading is moving out of SECBOOT and into their specific subdevs,
and the available GP107/GP108 FWs have interface differences.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/gp10b: split from gm20b implementation

ACR LS FW loading is moving out of SECBOOT and into their specific subdevs,
and the available GM20B/GP10B FWs have interface differences.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/acr: add stub implementation for all GPUs currently supported by SECBOOT

PMU, SEC2 and GR will be modified to register their falcons with ACR before
the main commit switching everything over.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: define ACR subdev

This will replace the current SECBOOT subdev for handling firmware on
secure falcons.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gp10b: Use correct copy engine

gp10b uses the new engine enumeration mechanism introduced in the Pascal
architecture. As a result, the copy engine, which used to be at index 2
for prior Tegra GPU instantiations, has now moved to index 0. Fix up the
index and also use the gp100 variant of the copy engine class because on
gp10b the PASCAL_DMA_COPY_B class is not supported.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gp10b: Add custom L2 cache implementation

There are extra registers that need to be programmed to make the level 2
cache work on GP10B, such as the stream ID register that is used when an
SMMU is used to translate memory addresses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault: Add support for GP10B

There is no BAR2 on GP10B and there is no need to map through BAR2
because all memory is shared between the GPU and the CPU. Add a custom
implementation of the fault sub-device that uses nvkm_memory_addr()
instead of nvkm_memory_bar2() to return the address of a pinned fault
buffer.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise TU116 chipset

Modesetting only, still waiting on ACR/GR firmware from NVIDIA for Turing
graphics/compute bring-up.

Each subsystem was compared with traces, along with various tests to check
that things generally work as they should, and appears compatible enough
with the current TU117 code to enable support.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mcp89/mmu: Use mcp77_mmu_new instead of g84_mmu_new on MCP89.

Fix a crash or broken depth testing in all OpenGL applications that use the
depth buffer on MCP89 (GeForce 320M) seen on a MacBook Pro Late 2010.

The bug is tracked in https://bugs.freedesktop.org/show_bug.cgi?id=108500

Signed-off-by: Timo Wiren <timo.wiren@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: initial support for boards with TU117 chipset

Modesetting only, still waiting on ACR/GR firmware from NVIDIA for Turing
graphics/compute bring-up.

Each subsystem was compared with traces, along with various tests to check
that things generally work as they should, and appears compatible enough
with the current TU106 code to enable support.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: allow detected chipset to be overridden

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/sec2/tu102-: instantiate SEC2 falcon

Required for ACR.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/nvdec/tu102-: instantiate NVDEC0 falcon

Required to run VPR scrubber binary as part of secboot.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gsp/gv100-: instantiate GSP falcon

We need this for Turing ACR, but it's present from Volta onwards.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: define GSP subdev

Exact meaning of the acronym is unknown, but we need this for Turing ACR.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/tu102: rename implementation from tu104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt/gf117: fix speedo readout register

GF117 appears to use the same register as GK104 (but still with the
general Fermi readout mechanism).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108980
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise TU102

Would usually do this split-out, verifying each component indivitually, but
this has been squashed together to be more palatable for merging in 5.0-rc.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/tu106: initial support

Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm/tu106: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/tu106: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/tu106: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/tu106: initial support

Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/tu106: initial support

Appears to be compatible with NV50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/tu106: initial support

Appears to be compatible with GK20A.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/tu106: initial support

Appears to be compatible with GF100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/tu106: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/tu106: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/tu106: initial support

Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/tu106: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/tu106: initial support

Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/tu106: initial support

Appears to be compatible with TU104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/tu106: initial support

No real surprised here so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/tu106: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise TU106

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum number of nvdec instances to 3

RTX2070 appears to have 3 copies of the engine.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/tu104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/tu104: initial support

Various different bits and pieces vs GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/tu104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/tu104: initial support

Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm/tu104: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/tu104: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault/tu104: initial support

New registers.

Currently uncertain how exactly to mask fault buffer interrupts. This will
likely be corrected at around the same time as the new MC interrupt stuff
has been properly figured out and implemented.

For the moment, it shouldn't matter too much.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/tu104: initial support

New registers.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/tu104: initial support

New flush method.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/tu104: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/tu104: initial support

Appears to be compatible with GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/tu104: initial support

Appears to be compatible with NV50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/tu104: initial support

Appears to be compatible with GK20A.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/tu104: initial support

Appears to be compatible with GF100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/tu104: initial support

Things are a bit different here on Turing, and will require further changes
yet once I've investigated them more thoroughly.

For now though, the existing GP100 code is compatible enough with one small
hack to forward on fault buffer interrupts.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/tu104: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/tu104: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/tu104: initial support

Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/tu104: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/tu104: initial support

Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/tu104: initial support

The GPU executes DEVINIT itself now, which makes our lives a bit easier.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/tu104: initial support

No real surprises here so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/tu104: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise TU104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: support multiple nvdec instances

Turing GPUs can have more than one.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/gv100: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gv100: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gv100: initial support

VEID support hacked in here, as it's the most convenient place for now.

Will be refined once it's better understood.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gv100: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/gv100: initial support

Can't imagine this will be any different.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/gv100: initial support

Appears to be compatible with GK20A.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/gv100: initial support

Appears to be compatible with GF100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gv100: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/gv100: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gv100: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/gv100: initial support

Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gv100: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/gv100: initial support

No real surprises here so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/gv100: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise gv100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum number of copy engines to 9

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp102-: setup stencil zbc

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: update r408840 where required

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault/gp100: implement replayable fault buffer initialisation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: define FAULT subdev

This will be responsible for the handling of MMU fault buffers on GPUs
that support them.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: Add support for BLCG on Kepler2

Same as the previous patch, but for Kepler2 now

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: Add support for basic clockgating on Kepler1

This adds support for enabling automatic clockgating on nvidia GPUs for
Kepler1. While this is not technically a clockgating level, it does
enable clockgating using the clockgating values initially set by the
vbios (which should be safe to use).

This introduces two therm helpers for controlling basic clockgating:
nvkm_therm_clkgate_enable() - enables clockgating through
CG_CTRL, done after initializing the GPU fully
nvkm_therm_clkgate_fini() - prepares clockgating for suspend or
driver unload

A lot of this code was originally going to be based off of fermi;
however it turns out that while Fermi's the first line of GPUs that
introduced this kind of power saving, Fermi requires more fine tuned
control of the CG_CTRL registers from the driver while reclocking that
we don't entirely understand yet.

For the simple parts we will be sharing with Fermi for certain however,
we at least add those into a new subdev/therm/gf100.h header.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot/gp108: implement on top of acr_r370

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Gourav Samaiya <gsamaiya@nvidia.com>

drm/nouveau/mmu/mcp77: fix regressions in stolen memory handling

- Fixes addition of stolen memory base address to PTEs.
- Removes support for compression.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>

drm/nouveau/mmu/gp10b: use correct implementation

Reported-by: Mikko Perttunen <cyndis@kapsi.fi>
Fixes: 6359c98224 ("drm/nouveau/mmu/gp10b: fork from gf100")
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Thierry Reding <treding@nvidia.com>

drm/nouveau/mmu/gp100: fork from gf100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gm20b: fork from gf100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gm200: fork from gf100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gk20a: fork from gf100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gk104: fork from gf100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/g84: fork from nv50

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gm107-: wait for instance block binding to complete

Discovered by accident while working to use BAR2 access to instmem objects
on more paths.

We've apparently been relying on luck up until now!

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm/gp100: initial implementation of new gp1xx temperature sensor

v2:
- add nv138 and drop nv13b chipsets (Ilia Mirkin)
- refactor out status variable and instead mask tsensor (Ilia Mirkin)
- switch SHADOWed state message away from nvkm_error() (Ilia Mirkin)
- rename internal temperature variable (Karol Herbst)

v3:
- use nvkm_trace() for SHADOWed state message (Ben Skeggs)

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

initial support (display-only) for GP108

Forked from GP107 implementation. Secboot/gr left out as we don't have
signed blobs from NVIDIA in linux-firmware.

(Ben): Was unable to mmiotrace the binary driver for unknown reasons,
so not able to 100% confirm that no other changes from GP107
are needed. Quick testing shows it seems to work well enough
for display. Due to NVIDIA dragging their heels on getting
signed firmware to us, this is the best we can do for now.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101601
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm/gm200: Added

This allows temperature readouts on maxwell2 GPUs.

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp: fork off some new hw-specific implementations

Upcoming commits make supervisor handling share code between the NV50
and GF119 implementations. Because of this, and a few other cleanups,
we need to allow some additional customisation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp107: initial support

Forked from GP106 implementation.

Differences:
- 1 PPC/GPC
- Slightly different grctx magics

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GP10B chipset

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: initial support (display-only) for GP107

Forked from GP106 implementation.

Split out from commit enabling secboot/gr support so that it can be
added to earlier kernels.

Cc: stable@vger.kernel.org [4.10+]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/nv4a: use nv04 mmu rather than the nv44 one

The NV4A (aka NV44A) is an oddity in the family. It only comes in AGP
and PCI varieties, rather than a core PCIE chip with a bridge for
AGP/PCI as necessary. As a result, it appears that the MMU is also
non-functional. For AGP cards, the vast majority of the NV4A lineup,
this worked out since we force AGP cards to use the nv04 mmu. However
for PCI variants, this did not work.

Switching to the NV04 MMU makes it work like a charm. Thanks to mwk for
the suggestion. This should be a no-op for NV4A AGP boards, as they were
using it already.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70388
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: initial support (display-only) for GP107

Forked from GP106 implementation.

Split out from commit enabling secboot/gr support so that it can be
added to earlier kernels.

Cc: stable@vger.kernel.org [4.10+]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/nv4a: use nv04 mmu rather than the nv44 one

The NV4A (aka NV44A) is an oddity in the family. It only comes in AGP
and PCI varieties, rather than a core PCIE chip with a bridge for
AGP/PCI as necessary. As a result, it appears that the MMU is also
non-functional. For AGP cards, the vast majority of the NV4A lineup,
this worked out since we force AGP cards to use the nv04 mmu. However
for PCI variants, this did not work.

Switching to the NV04 MMU makes it work like a charm. Thanks to mwk for
the suggestion. This should be a no-op for NV4A AGP boards, as they were
using it already.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70388
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gf108: split implementation from gf100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gp10x: enable secboot and GR

All the bricks are in place for secure boot to be enabled. This in turn
makes GR usable so enable them all.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add SEC2 engine

SEC2 is the name given by NVIDIA to the SEC engine post-Fermi (reasons
unknown). Even though it shares the same address range as SEC, its usage
is quite different and this justifies a new engine. Add this engine and
make TOP use it all post-TOP devices should use this implementation and
not the older SEC.

Also quickly add the short gp102 implementation which will be used for
falcon booting purposes.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/nvdec: add gp102 support

gp10x' secure boot requires a blob to be run on NVDEC. Expose the falcon
through a dummy device.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/g92: Fix rearm

704a6c008b7942bb7f30bb43d2a6bcad7f543662 broke pci msi rearm for g92 GPUs.

g92 needs the nv46_pci_msi_rearm, where g94+ gpus used nv40_pci_msi_rearm.

Reported-by: Andrew Randrianasulu <randrianasulu@gmail.com>
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org

drm/nouveau/pci/g92: Enable changing pcie link speeds

Tested on a G92, seems to work. Confirmed by 8 mmiotraces.

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci: Rename g94 to g92

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gm20b: add dummy PMU device

Add a dummy PMU device so the PMU falcon is instanciated and can be used
by secure boot.

We could reuse gk20a's implementation here, but it would fight with
secboot over PMU falcon's ownership and secboot will reset the PMU,
preventing it from operating afterwards. Proper handout between secboot
and pmu is coming along with the actual gm20b PMU implementation, so
use this as a temporary solution.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GP106 chipset

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gp102: rename from gp104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gp102: rename from gp104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gp102: rename from gp104

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/gp102: initial implementation

GP102/GP104 require a harder reset of PMU prior to DEVINIT, or the IFR
image will hang.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/gp100: initial implementation

Just enough to hookup preinit reset(), which DEVINIT will depend on later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: initial support for GP102

From visual inspection of traces, what we currently implement appears to
be identical to GP104. Seems to work well enough too.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb: add gm20b device

gm20b's FB has the same capabilities as gm200, minus the ability to
allocate RAM. Create a device that reflects this instead of re-using the
gk20a device which may be incorrect.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-By: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gk110b,gm10x: use the correct implementation

DPAUX registers moved on Kepler, these chipsets were still using the
Fermi implementation for some reason.

This fixes detection of hotplug/sink IRQs on DP connectors.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org

drm/nouveau/volt: Add implementation for gf100

Since gf100 we need a speedo value for calculating the voltage. The readout
will be added in a later patch.

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GP104 chipset

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/sw/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/gp100: initial implementation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot/gm200: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gp100: initial support

Due to the GPU preventing us from touching NV_PLTCG_LTCS_LTSS_CBC_BASE,
we cannot provide CBC/ZBC support without signed PMU firmware to handle
the task for us...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gm204: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gp100: initial support

GP100 still supports the previous generations' page table layout, which
we will temporarily make use of here.

Proper support for the new MMU layout requires some rework to the common
MMU code, which is in progress.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/gp100: initial implementation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GP100 chipset

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum nvenc instances to 3

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum ce instances to 6

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GM108 chipsets

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/nv11: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/nv17: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/g84: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gt215: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gk104: define reset masks + intr cleanup

Engine fields have been removed, as they're specified by PTOP.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gk104: initial implementation

Ported from the code currently in engine/fifo/gk104.c.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add top plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gm20b: add basic driver

Add a basic clock driver that reuses the GK20A logic.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt: add GM20B driver

Add basic GM20B volt driver that reuses the GK20A logic.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gm107: expose MaxwellDmaCopyA

The HW accepts KeplerDmaCopyA and MaxwellDmaCopyA classes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gm107: KeplerChannelGpfifoB, and 2048 channels

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk110: expose KeplerChannelGpfifoB

This class supports a WFI method (0x0078) that's not present on the
KeplerChannelGpfifoA class.

The binary driver exposes both classes on these GPUs for some reason,
though there doesn't appear to be any difference in the setup that's
done for each (ie. even if you allocate GpfifoA, the WFI method will
still work).

We shall just expose GpfifoB, as I don't see a good reason to report
the presence of both.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add nvdec plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add nvenc plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm206: remove implementation, it's now identical to gm200

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/iccsense: implement for ina209, ina219 and ina3221

based on Martins initial work

v3: fix ina2x9 calculations
v4: don't kmalloc(0), fix the lsb/pga stuff
v5: add a field to tell if the power reading may be invalid
add nkvm_iccsense_read_all function
check for the device on the i2c bus

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/subdev/iccsense: add new subdev for power sensors

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/secboot/gm20b: add secure boot support

Add secure boot support for the GM20B chip found in Tegra X1. Secure
boot on Tegra works slightly differently from desktop, notably in the
way the WPR region is set up.

In addition, the firmware bootloaders use a slightly different header
format.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot/gm200: add secure-boot support

Add secure-boot for the dGPU set of GM20X chips, using the PMU as the
high-secure falcon.

This work is based on Deepak Goyal's initial port of Secure Boot to
Nouveau.

v2. use proper memory target function

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add support for secure boot

On GM200 and later GPUs, firmware for some essential falcons (notably
GR ones) must be authenticated by a NVIDIA-produced signature and
loaded by a high-secure falcon in order to be able to access privileged
registers, in a process known as Secure Boot.

Secure Boot requires building a binary blob containing the firmwares
and signatures of the falcons to be loaded. This blob is then given to
a high-secure falcon running a signed loader firmware that copies the
blob into a write-protected region, checks that the signatures are
valid, and finally loads the verified firmware into the managed falcons
and switches them to privileged mode.

This patch adds infrastructure code to support this process on chips
that require it.

v2:
- The IRQ mask of the PMU falcon was left - replace it with the proper
irq_mask variable.
- The falcon reset procedure expecting a falcon in an initialized state,
which was accidentally provided by the PMU subdev. Make sure that
secboot can manage the falcon on its own.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gm200: enable graphics device

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm200: s/gm204/gm200/

Most of the per-chipset differences will go away when we fully switch
to using the register lists provided by the firmware files, which will
leave all the remaining code "belonging" to GM200.

This is a preemptive rename from GM204 to GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: s/gm204/gm200/ in a number of places

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: recognise GM200 chipset

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: call nvkm_device_fini if nvkm_device_init fails

nvkm_device_fini is never called if a failure occurs in
nvkm_device_init, even when unloading the module. This can lead to a
resources leak (one example is the Tegra interrupt which would never be
freed in that case). Fix this by calling nvkm_device_fini in
nvkm_device_init's failure path.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci: add gk104 variant

v2: change email used in header
v4: change Copyright information
v5: revert Copyright changes

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>

drm/nouveau/pci: add gf106 variant

v2: change email used in header
v4: change Copyright information
v5: revert Copyright changes

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>

drm/nouveau/ltc/gm204: split implementation from gm107

Differences from GM10x:
- GM20x LTC count detection differs from GM10x
- GM20x init doesn't require large page size setting

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gm204: split implementation from gk104

GM20x doesn't require the priv ring timeout bumps that GK/GM10x have.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: fix return in error path of device probe

We want to unlock nv_devices_mutex in this error path as well.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/gk107: enable PGOB codepaths

Reported to be needed as per fdo#70354 comment #61.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/nv46: attempt to fix msi, and re-enable by default

Was not able to obtain a trace of NVRM due to kernel version annoyances,
however, experimentally confirmed that the WAR we use on NV50/G8x boards
works here too.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/g94: split implementation from nv40

An upcoming patch will implement functionality that we don't use on any
NV40 chipset.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/g84: split implementation from nv50

An upcoming patch will implement functionality that we don't use on the
original NV50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gf100: increase wait timeout to avoid read faults

Increase clock timeout of some unknown engines in order to avoid failure
at high gpcclk rate.

This fixes IBUS read faults on my GF119 when reclocking is manually
enabled. Note that memory reclocking is completely broken and NvMemExec
has to be disabled to allow core clock reclocking only.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gm204/6: add voltage control using the new gk104 volt class

I got confirmation that we can read and change the voltage with the same code.
The divider is also computed correctly on the gm204 we got our hands on.

Thanks to Yoshimo on IRC for executing the tests on his gm204!

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gm107: add voltage control using the new gk104 volt class

Let's ignore the other desktop Maxwells until I get my hands on one and confirm
that we still can change the voltage.

Signed-off-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/volt/gk104: add support for pwm and gpio modes

Most Keplers actually use the GPIO-based voltage management instead of the new
PWM-based one. Use the GPIO mode as a fallback as it already gracefully handles
the case where no GPIOs exist.

All the Maxwells seem to use the PWM method though.

v2:
- Do not forget to commit the PWM configuration change!

Signed-off-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/device: remove pci/platform_device from common struct

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: cleaner abstraction for device resource functions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: move device irq handling to platform-specific code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci: new subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: remove the remainder of the previous style

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mpeg: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/sw: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pm: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/cipher: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/xtensa: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/falcon: convert to new-style nvkm_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mxm: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit: run devinit scripts right after preinit

This ensures we have a valid mask of disabled engines before we start
trying to execute fini()/init() on the subdevs, potentially touching
devices that don't exist.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: kill some (now) dead code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: convert user class to new-style nvkm_object

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/client: convert to new-style nvkm_object

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: prepare for new-style subdevs

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: separate construction of pci/tegra devices

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/object: rename some functions to avoid upcoming conflicts

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: decouple from engine machinery

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: split user device implementation out on its own

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: simplify subdev construction

Replaces the piece-by-piece (in response to NV_DEVICE ctor args) device
contruction with a once-off all-or-nothing approach, eliminating some
tricky refcounting issues. The partial device init capability was only
required by some tools, and has been moved to probe time instead.

Temporarily removes a workaround for some boards where we need to fiddle
with AGP registers before executing the DEVINIT scripts. A later commit
in this series reinstates it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: tidy ctor/dtor interfaces

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/client: tidy ctor/dtor interfaces

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: remove last printks

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: switch to dev_printk macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv04: fix incorrect use of register accessors

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: switch to device pri macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb: cosmetic changes

This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: add direct pointer to struct device

A future commit will hide the platform/pci specifics from nvkm_device,
but it's still very useful in a lot of places to have access to the
Linux device struct.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device: add direct pointers to subdevs from nvkm_device

Will be used in upcoming commits to remove the need for lookup/runtime
type-checking functions when accessing foreign subdevs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>