drm/etnaviv: fix TS cache flushing on GPUs with BLT engine

As seen in the Vivante kernel driver, most GPUs with the BLT engine have
a broken TS cache flush. The workaround is to temporarily set the BLT
command to CLEAR_IMAGE, without actually executing the clear. Apparently
this state change is enough to trigger the required TS cache flush. As
the BLT engine is completely asychronous, we also need a few more stall
states to synchronize the flush with the frontend.

Root-caused-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

drm/etnaviv: update hardware headers from rnndb

Update the state HI and common header from rnndb commit
8478eef32fd9 (rnndb: document secure GPU reset bit).

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>