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b73b737f |
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11-May-2023 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Add some missing register definitions [Why&How] Add some missing register definitions and rearrange some others to maintain consistency with related definitions. Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e72f03f4 |
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21-Jun-2022 |
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
drm/amd/display: Add missing registers for ACP We are missing some ACP registers/mask value for some specific ASICs. This commit includes it to those ASICs that support it. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9713158c |
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05-Nov-2020 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amdgpu: Add and use seperate reg headers for dcn302 Currently we are using dcn3 reg headers for dcn302. The offsets are different between the two so they need seperate headers. Add dcn302 header files and use these instead of dcn3 header Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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