#
07b2483e |
|
28-Nov-2023 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Add dpp_get_gamut_remap functions We want to be able to read the DPP's gamut remap matrix. v2: - code-style and doc comments clean-up (Melissa) Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
0ccd770a |
|
02-Aug-2023 |
Qingqing Zhuo <Qingqing.Zhuo@amd.com> |
drm/amd/display: Update DCN30 for DCN35 support [Why & How] Update DCN30 files for DCN35 usage. Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
98ef3418 |
|
27-Feb-2023 |
Zhikai Zhai <zhikai.zhai@amd.com> |
drm/amd/display: reset the scaler boundary mode [WHY] The VBIOS select the black boundary mode when using auto scale mode. But it doesn't recover if there is no reset. [HOW] Clean the scaler boundary mode to default edge in the manual scale mode. Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Zhikai Zhai <zhikai.zhai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d3dfceb5 |
|
23-Feb-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Add dependant changes for DCN32/321 [Why&How] This patch adds necessary changes needed in DC files outside DCN32/321 specific tree v2: squash in updates (Alex) Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ba16b22d |
|
09-Jul-2021 |
Nevenko Stupar <Nevenko.Stupar@amd.com> |
drm/amd/display: Line Buffer changes DCN 3x increased Line buffer size for DCHUB latency hiding, from 4 lines of 4K resolution lines to 5 lines of 4K resolution lines. All Line Buffer can be used as extended memory for P State change latency hiding. The maximum number of lines is increased to 32 lines. Finally, LB_MEMORY_CONFIG_1 (LB memory piece 1) and LB_MEMORY _CONFIG_2 (LB memory piece 2) are not affected, no change in size, only 3 pieces is affected, i.e., when all 3 pieces are used in both LB_MEMORY_CONFIG_0 and LB_MEMORY_CONFIG_3 (for 4:2:0) modes. Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
0f984c94 |
|
09-Jul-2021 |
Nevenko Stupar <Nevenko.Stupar@amd.com> |
drm/amd/display: Line Buffer changes DCN 3x increased Line buffer size for DCHUB latency hiding, from 4 lines of 4K resolution lines to 5 lines of 4K resolution lines. All Line Buffer can be used as extended memory for P State change latency hiding. The maximum number of lines is increased to 32 lines. Finally, LB_MEMORY_CONFIG_1 (LB memory piece 1) and LB_MEMORY _CONFIG_2 (LB memory piece 2) are not affected, no change in size, only 3 pieces is affected, i.e., when all 3 pieces are used in both LB_MEMORY_CONFIG_0 and LB_MEMORY_CONFIG_3 (for 4:2:0) modes. Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d0274aba |
|
16-Nov-2020 |
Jacky Liao <ziyu.liao@amd.com> |
drm/amd/display: Add DSCL memory low power support [Why] The DSCL memory blocks should be powered down when they're not in use. This will reduce power consumption. [How] 1. Write to DSCL_MEM_PWR_FORCE to put memory to shutdown when DSCL is not used. 2. Added a debug option to allow this behaviour to be turned off Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
00b0ac67 |
|
13-Nov-2020 |
Jacky Liao <ziyu.liao@amd.com> |
drm/amd/display: Add HDR3DLUT and SHAPER memory shutdown support [Why] The HDR3DLUT and SHAPER memory blocks should be powered down when they're not in use. This will reduce power consumption. [How] 1. Write to HDR3DLUT_MEM_PWR_FORCE to put memory to shutdown when HDR3DLUT is not used. 2. Write to SHAPER_MEM_PWR_FORCE to put memory to shutdown when SHAPER is not used. Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
49d067dc |
|
11-Nov-2020 |
Jacky Liao <ziyu.liao@amd.com> |
drm/amd/display: Add BLNDGAM memory shutdown support [Why] The BLNDGAM memory blocks should be powered down when they're not in use. This will reduce power consumption. [How] 1. Write to BLNDGAM_MEM_PWR_FORCE to put memory to shutdown when BLNDGAM is not used. 2. Added a debug option to allow this behaviour to be turned off Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
585e7ced |
|
18-Sep-2020 |
Tao.Huang <Tao.Huang@amd.com> |
drm/amd/display: Fix compilation error [Why] The C standard does not specify whether an enum is signed or unsigned. In the function prototype, one of the argument is defined as an enum but its declaration was unit32_t. Fix this by changing the function argument to enum in the declaration. Signed-off-by: Tao.Huang <Tao.Huang@amd.com> Signed-off-by: Florin Iucha <florin.iucha@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
03f54d7d |
|
20-May-2020 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: Add DCN3 DPP Add support to program the DCN3 DPP (Multiple pipe and plane combine) HW Blocks: +--------+ | DPP | +--------+ | v +--------+ | MPC | +--------+ | v +-------+ | OPP | +-------+ | v +--------+ | OPTC | +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|