History log of /linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h
Revision Date Author Comments
# c84dff70 23-Jan-2024 Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>

drm/amd/display: Trivial code style adjustment

Just adjust the code indentation in the header and add a simple comment
in the dm_cp_psp file.

Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# aa298b30 01-Aug-2023 Alvin Lee <alvin.lee2@amd.com>

drm/amd/display: PMFW to wait for DMCUB ack for FPO cases

[Description]
We want PMFW to wait for DMCUB to ACK the MCLK end message
for FPO cases as well.

Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# aeb73c60 14-Apr-2022 Chaitanya Dhere <chaitanya.dhere@amd.com>

drm/amd/display: Implement a pme workaround function

[Why]
For DCN32 we do not have a pme workaround function defined that sends a
BacoAudio message. Default code had uses the DCN30 function for pme
workaround. PMFW headers are inconsistent with their message ID
definitions which cause ID's to clash leading to inconsistent system
behaviour. There is a clash with FCLK message due to inconsitent PMFW
headers.

[How]
Implement a new BacoAudio function to workaround the problem of
inconsistent PMFW headers in order to avoid BacoAudio message clasing
with FCLK Enable message.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 405bb9ee 29-Apr-2022 Alvin Lee <Alvin.Lee2@amd.com>

drm/amd/display: Implement DTBCLK ref switching on dcn32

[WHY & HOW]
Implements DTB ref clock switching with reg key default to OFF.
Refactors dccg DTBCLK logic to not store redundant state information
dccg. Also removes duplicated functions that should be inherited from
other dcn versions.

Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 80fb7a40 20-Feb-2022 Martin Leung <Martin.Leung@amd.com>

drm/amd/display: cleaning up smu_if to add future flexibility

This commit cleans up code that uses old variables and adds some SMU
interfaces for future flexibility.

Signed-off-by: Martin Leung <Martin.Leung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 0c9ed604 11-Apr-2022 Chaitanya Dhere <chaitanya.dhere@amd.com>

drm/amd/display: FCLK P-state support updates

[Why]
Previously we used to send FCLK P-state enable messages upon each call
to update_clocks based on dml output. This resulted in increased message
transactions between DC and PMFW.

[How]
Update the code to check safe_to_lower status and send the message based
on dml input only on boot. This reduces message transactions. Also
remove other unwanted code based on current code status.

Signed-off-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 265280b9 21-Feb-2022 Aurabindo Pillai <aurabindo.pillai@amd.com>

drm/amd/display: add CLKMGR changes for DCN32/321

Add support for managing DCN3.2.x clocks.

v2: squash in smu interface updates (Alex)
v3: Drop unused SMU header (Alex)

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>