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0d055f09 |
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11-Oct-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: drop navi reg init functions No longer used since IP enumeration is driven by the IP discovery table now. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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bf99b9b0 |
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11-Oct-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: drop nv_set_ip_blocks() No longer used since IP enumeration is now driven by amdgpu IP discovery code. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a1f62df7 |
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26-Jul-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/nv: export common IP functions So they can be driven by IP dicovery table. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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70839197 |
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13-Jul-2021 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: dynamic initialize ip offset for cyan_skillfish Add ip offset definition for cyan_skillfish and initialize it. v2: squash in ip_offset updates (Alex) Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cdf9979b |
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12-May-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add yellow_carp_reg_base_init function for yellow carp (v2) This patch adds yellow_carp_reg_base_init function to init the register base for yellow carp. v2: squash in updates (Alex) Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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fd5b4b44 |
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13-Oct-2020 |
Chengming Gui <Jack.Gui@amd.com> |
drm/amd/amdgpu: initialize IP offset for beige_goby Add ip offset definition for beige_goby and initialize it v2: squash in fixes (Alex) V3: fix permissions on file (Alex) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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038d757b |
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02-Oct-2020 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: initialize IP offset for dimgrey_cavefish Add ip offset definition for dimgrey_cavefish and initialize it. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1f9dab43 |
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27-Aug-2020 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add vangogh_reg_base_init function for van gogh This patch adds vangogh_reg_base_init function to init the register base for van gogh. v2: make vangogh_reg_base_init void, align equality sign Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c1299461 |
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22-Jun-2020 |
Wenhui Sheng <Wenhui.Sheng@amd.com> |
drm/amdgpu: request init data in virt detection Move request init data to virt detection func, so we can insert request full access between request init data and set ip blocks. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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dccdbf3f |
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07-Nov-2019 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: initialize IP offset for sienna_cichlid (v2) Add IP offset headers and state. V2: squash in updates (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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03d0a073 |
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14-May-2019 |
Xiaojie Yuan <xiaojie.yuan@amd.com> |
drm/amdgpu: initialize reg base for navi12 Set up the register offset map for navi12. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a0f6d926 |
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17-Dec-2018 |
Xiaojie Yuan <xiaojie.yuan@amd.com> |
drm/amdgpu/soc15: initialize reg base for navi14 (v2) Initialize the IP register base offsets for navi14. v2: squash in MP, CLK, THM updates Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c6b6a421 |
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03-Mar-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add navi10 common ip block (v3) This adds the core SOC code for navi asics. v1: add place holder and initial basic function (Ray) v2: add new introduced functions to avoid reference NULL pointer (Hawking) v3L squash in updates (Alex) Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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