#
a1ce3e1f |
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30-Aug-2023 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amd: Fix the flag setting code for interrupt request [1] Remove the irq flags setting code since pci_alloc_irq_vectors() handles these flags. [2] Free the msi vectors in case of error. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bf80d34b |
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07-Jul-2023 |
Philip Yang <Philip.Yang@amd.com> |
drm/amdgpu: Increase soft IH ring size Retry faults are delegated to soft IH ring and then processed by deferred worker. Current soft IH ring size PAGE_SIZE can store 128 entries, which may overflow and drop retry faults, causes HW stucks because the retry fault is not recovered. Increase soft IH ring size to 8KB, enough to store 256 CAM entries because we clear the CAM entry after handling the retry fault from soft ring. Define macro IH_RING_SIZE and IH_SW_RING_SIZE to remove duplicate constant. Show warning message if soft IH ring overflows with CAM enabled because this should not happen. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a1c23485 |
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07-Jun-2023 |
Ma Jun <Jun.Ma2@amd.com> |
drm/amdgpu: Print client id for the unregistered interrupt resource Modify the debug information and print the clien id for these interrupts as well. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8ffd6f04 |
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25-May-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: keep irq count in amdgpu_irq_disable_all This can clean up all irq warnings because of unbalanced amdgpu_irq_get/put when unplugging/unbinding device, and leave irq count decrease in each ip fini function. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
413521a4 |
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23-May-2023 |
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> |
drm/amd/amdgpu: Fix warnings in amdgpu_irq.c checkpatch reports: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: braces {} are not necessary for any arm of this statement + if (nvec <= 0) { [...] + } else { [...] WARNING: Block comments use a trailing */ on a separate line Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0d81101c |
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25-Feb-2022 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: complement the IH node_id table for multiple AIDs With different node_id, the SDMA interrupt from multiple AIDs can be distinguished by sw driver. Signed-off-by: Le Ma <le.ma@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
15091a6f |
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19-Nov-2021 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: add node_id to physical id conversion in EOP handler A new field nodeid in interrupt cookie indicates the node ID. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1fa8d710 |
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14-Apr-2023 |
Alan Liu <HaoPing.Liu@amd.com> |
drm/amdgpu: Fix desktop freezed after gpu-reset [Why] After gpu-reset, sometimes the driver fails to enable vblank irq, causing flip_done timed out and the desktop freezed. During gpu-reset, we disable and enable vblank irq in dm_suspend() and dm_resume(). Later on in amdgpu_irq_gpu_reset_resume_helper(), we check irqs' refcount and decide to enable or disable the irqs again. However, we have 2 sets of API for controling vblank irq, one is dm_vblank_get/put() and another is amdgpu_irq_get/put(). Each API has its own refcount and flag to store the state of vblank irq, and they are not synchronized. In drm we use the first API to control vblank irq but in amdgpu_irq_gpu_reset_resume_helper() we use the second set of API. The failure happens when vblank irq was enabled by dm_vblank_get() before gpu-reset, we have vblank->enabled true. However, during gpu-reset, in amdgpu_irq_gpu_reset_resume_helper() vblank irq's state checked from amdgpu_irq_update() is DISABLED. So finally it disables vblank irq again. After gpu-reset, if there is a cursor plane commit, the driver will try to enable vblank irq by calling drm_vblank_enable(), but the vblank->enabled is still true, so it fails to turn on vblank irq and causes flip_done can't be completed in vblank irq handler and desktop become freezed. [How] Combining the 2 vblank control APIs by letting drm's API finally calls amdgpu_irq's API, so the irq's refcount and state of both APIs can be synchronized. Also add a check to prevent refcount from being less then 0 in amdgpu_irq_put(). v2: - Add warning in amdgpu_irq_enable() if the irq is already disabled. - Call dc_interrupt_set() in dm_set_vblank() to avoid refcount change if it is in gpu-reset. v3: - Improve commit message and code comments. Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c8b5a95b |
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14-Apr-2023 |
Alan Liu <HaoPing.Liu@amd.com> |
drm/amdgpu: Fix desktop freezed after gpu-reset [Why] After gpu-reset, sometimes the driver fails to enable vblank irq, causing flip_done timed out and the desktop freezed. During gpu-reset, we disable and enable vblank irq in dm_suspend() and dm_resume(). Later on in amdgpu_irq_gpu_reset_resume_helper(), we check irqs' refcount and decide to enable or disable the irqs again. However, we have 2 sets of API for controling vblank irq, one is dm_vblank_get/put() and another is amdgpu_irq_get/put(). Each API has its own refcount and flag to store the state of vblank irq, and they are not synchronized. In drm we use the first API to control vblank irq but in amdgpu_irq_gpu_reset_resume_helper() we use the second set of API. The failure happens when vblank irq was enabled by dm_vblank_get() before gpu-reset, we have vblank->enabled true. However, during gpu-reset, in amdgpu_irq_gpu_reset_resume_helper() vblank irq's state checked from amdgpu_irq_update() is DISABLED. So finally it disables vblank irq again. After gpu-reset, if there is a cursor plane commit, the driver will try to enable vblank irq by calling drm_vblank_enable(), but the vblank->enabled is still true, so it fails to turn on vblank irq and causes flip_done can't be completed in vblank irq handler and desktop become freezed. [How] Combining the 2 vblank control APIs by letting drm's API finally calls amdgpu_irq's API, so the irq's refcount and state of both APIs can be synchronized. Also add a check to prevent refcount from being less then 0 in amdgpu_irq_put(). v2: - Add warning in amdgpu_irq_enable() if the irq is already disabled. - Call dc_interrupt_set() in dm_set_vblank() to avoid refcount change if it is in gpu-reset. v3: - Improve commit message and code comments. Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
973ad627 |
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16-Jan-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/amdgpu: Remove unnecessary include statements for drm_crtc_helper.h Several source files include drm_crtc_helper.h without needing it or only to get its transitive include statements; leading to unnecessary compile-time dependencies. Directly include required headers and drop drm_crtc_helper.h where possible. v2: * keep includes sorted in amdgpu_device.c (Sam) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230116131235.18917-4-tzimmermann@suse.de
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#
a347ca97 |
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19-Jul-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: move non-DC vblank handling out of irq code Move it into the DCE code for each generation. This avoids confusion with the different display paths. v2: no need for a hotplug worker for vkms Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f64e6e0b |
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20-Jun-2022 |
Alex Deucher <alexander.deucher@amd.com> |
Revert "drm/amdgpu/display: set vblank_disable_immediate for DC" This reverts commit 92020e81ddbeac351ea4a19bcf01743f32b9c800. This causes stuttering and timeouts with DMCUB for some users so revert it until we understand why and safely enable it to save power. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1887 Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
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#
a775e4e4 |
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20-Jun-2022 |
Alex Deucher <alexander.deucher@amd.com> |
Revert "drm/amdgpu/display: set vblank_disable_immediate for DC" This reverts commit 92020e81ddbeac351ea4a19bcf01743f32b9c800. This causes stuttering and timeouts with DMCUB for some users so revert it until we understand why and safely enable it to save power. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1887 Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: stable@vger.kernel.org
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#
b3c76814 |
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19-Apr-2022 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: add RAS fatal error interrupt handler The fatal error handler is independent from general ras interrupt handler since there is no related IH ring. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2e54fe5d |
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04-Jan-2022 |
yipechai <YiPeng.Chai@amd.com> |
drm/amdgpu: Modify nbio block to fit for the unified ras block data and ops 1.Modify nbio block to fit for the unified ras block data and ops. 2.Change amdgpu_nbio_ras_funcs to amdgpu_nbio_ras, and the corresponding variable name remove _funcs suffix. 3.Remove the const flag of mmhub ras variable so that nbio ras block can be able to be inserted into amdgpu device ras block link list. 4.Invoke amdgpu_ras_register_ras_block function to register nbio ras block into amdgpu device ras block link list. 5.Remove the redundant code about nbio in amdgpu_ras.c after using the unified ras block. Signed-off-by: yipechai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0771c805 |
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08-Dec-2021 |
Philip Yang <Philip.Yang@amd.com> |
drm/amdgpu: Handle fault with same timestamp Remove not unique timestamp WARNING as same timestamp interrupt happens on some chips, Drain fault need to wait for the processed_timestamp to be truly greater than the checkpoint or the ring to be empty to be sure no stale faults are handled. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1818 Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bbe04dec |
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07-Dec-2021 |
Isabella Basso <isabbasso@riseup.net> |
drm/amd: fix improper docstring syntax This fixes various warnings relating to erroneous docstring syntax, of which some are listed below: warning: Function parameter or member 'adev' not described in 'amdgpu_atomfirmware_ras_rom_addr' ... warning: expecting prototype for amdgpu_atpx_validate_functions(). Prototype was for amdgpu_atpx_validate() instead ... warning: Excess function parameter 'mem' description in 'amdgpu_preempt_mgr_new' ... warning: Cannot understand * @kfd_get_cu_occupancy - Collect number of waves in-flight on this device ... warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst Signed-off-by: Isabella Basso <isabbasso@riseup.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3c2d6ea2 |
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18-Nov-2021 |
Philip Yang <Philip.Yang@amd.com> |
drm/amdgpu: handle IH ring1 overflow IH ring1 is used to process GPU retry fault, overflow is enabled to drain retry fault because we want receive other interrupts while handling retry fault to recover range. There is no overflow flag set when wptr pass rptr. Use timestamp of rptr and wptr to handle overflow and drain retry fault. If fault timestamp goes backward, the fault is filtered and should not be processed. Drain fault is finished if processed_timestamp is equal to or larger than checkpoint timestamp. Add amdgpu_ih_functions interface decode_iv_ts for different chips to get timestamp from IV entry with different iv size and timestamp offset. amdgpu_ih_decode_iv_ts_helper is used for vega10, vega20, navi10. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
92020e81 |
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10-Nov-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/display: set vblank_disable_immediate for DC Disable vblanks immediately to save power. I think this was missed when we merged DC support. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1781 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
450d6179 |
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03-Aug-2021 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/amdgpu: Convert to Linux IRQ interfaces Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers don't benefit from using it. DRM IRQ callbacks are now being called directly or inlined. The interrupt number returned by pci_msi_vector() is now stored in struct amdgpu_irq. Calls to pci_msi_vector() can fail and return a negative errno code. Abort initlaizaton in thi case. The DRM IRQ midlayer does not handle this correctly. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210803090704.32152-2-tzimmermann@suse.de
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#
61a6813f |
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21-Jul-2021 |
Chengzhe Liu <ChengZhe.Liu@amd.com> |
drm/amdgpu: Add msix restore for pass-through mode In pass-through mode, after mode 1 reset, msix enablement status would lost and never receives interrupt again. So, we should restore msix status after mode 1 reset. Signed-off-by: Chengzhe Liu <ChengZhe.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3c727c1c |
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30-Sep-2020 |
Emily.Deng <Emily.Deng@amd.com> |
drm/amdgpu: Restore msix after FLR After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Signed-off-by: Emily.Deng <Emily.Deng@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0cabcf83 |
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25-Jun-2021 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/amdgpu: Track IRQ state in local device state Replace usage of struct drm_device.irq_enabled with the driver's own state field struct amdgpu_device.irq.installed. The field in the DRM device structure is considered legacy and should not be used by KMS drivers. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210625082222.3845-2-tzimmermann@suse.de
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#
66c6594b |
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04-May-2021 |
Marc Zyngier <maz@kernel.org> |
gpu: Bulk conversion to generic_handle_domain_irq() Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Signed-off-by: Marc Zyngier <maz@kernel.org>
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#
9be26ddf |
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30-Sep-2020 |
Emily.Deng <Emily.Deng@amd.com> |
drm/amdgpu: Restore msix after FLR After FLR, the msix will be cleared, so need to re-enable it. Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Signed-off-by: Emily.Deng <Emily.Deng@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d10d0daa |
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17-May-2021 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Handle IOMMU enabled case. Problem: Handle all DMA IOMMU group related dependencies before the group is removed. Those manifest themself in that when IOMMU enabled DMA map/unmap is dependent on the presence of IOMMU group the device belongs to but, this group is released once the device is removed from PCI topology. Fix: Expedite all such unmap operations to pci remove driver callback. v5: Drop IOMMU notifier and switch to lockless call to ttm_tt_unpopulate v6: Drop the BO unamp list v7: Drop amdgpu_gart_fini In amdgpu_ih_ring_fini do uncinditional check (!ih->ring) to avoid freeing uniniitalized rings. Call amdgpu_ih_ring_fini unconditionally. v8: Add deatiled explanation Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210517143851.475058-1-andrey.grodzovsky@amd.com
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#
72c8c97b |
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12-May-2021 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Split amdgpu_device_fini into early and late Some of the stuff in amdgpu_device_fini such as HW interrupts disable and pending fences finilization must be done right away on pci_remove while most of the stuff which relates to finilizing and releasing driver data structures can be kept until drm_driver.release hook is called, i.e. when the last device reference is dropped. v4: Change functions prefix early->hw and late->sw Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210512142648.666476-3-andrey.grodzovsky@amd.com
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#
6e36f231 |
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02-Apr-2021 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: split nbio callbacks into ras and non-ras ones nbio ras is not managed by gpu driver when gpu is connected to cpu through xgmi. split nbio callbacks into ras and non-ras ones so gpu driver only initializes nbio ras callbacks when it manages nbio ras. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
266b2d25 |
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19-Mar-2021 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: remove irq_src->data handling That is unused for quite some time now. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c8941550 |
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09-Mar-2021 |
shaoyunl <shaoyun.liu@amd.com> |
drm/amdgpu : Fix asic reset regression issue introduce by 8f211fe8ac7c4f This recent change introduce SDMA interrupt info printing with irq->process function. These functions do not require a set function to enable/disable the irq Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
56237c6a |
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20-May-2020 |
Oak Zeng <Oak.Zeng@amd.com> |
drm/amdgpu: Fix IH client ID naming table Client ID 26 is reserved. Add it to the table. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
be14729a |
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21-Aug-2020 |
Yong Zhao <Yong.Zhao@amd.com> |
drm/amdgpu: Print the IH client ID name when vm fault happens This gives more information and improves productivity. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f3e4a07f |
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18-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix handling of irq domains on soc15 and newer GPUs We need to take into account the client id otherwise we'll end up sending generic events for any src id that is registered. We only support irq domains on pre-soc15 parts so client is always legacy. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
26f32a37 |
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31-Oct-2020 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add infrastructure for soft IH ring Add a soft IH ring implementation similar to the hardware IH1/2. This can be used if the hardware delegation of interrupts to IH1/2 doesn't work for some reason. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4a580877 |
|
23-Aug-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Get DRM dev from adev by inline-f Add a static inline adev_to_drm() to obtain the DRM device pointer from an amdgpu_device pointer. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1348969a |
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23-Aug-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: drm_device to amdgpu_device by inline-f (v2) Get the amdgpu_device from the DRM device by use of an inline function, drm_to_adev(). The inline function resolves a pointer to struct drm_device to a pointer to struct amdgpu_device. v2: Use a typed visible static inline function instead of an invisible macro. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dd4fa6c1 |
|
08-Apr-2020 |
Aurabindo Pillai <mail@aurabindo.in> |
drm/amd/amdgpu: remove hardcoded module name in prints Let format prefixes take care of printing the module name through pr_fmt and dev_fmt definitions. Signed-off-by: Aurabindo Pillai <mail@aurabindo.in> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
858a2bba |
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18-Nov-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: pull ras controller int status only when ras enabled ras_controller_irq and athub_err_event_irq are only registered when PCIE_BIF ras is marked as supported. as the result, the driver also just need pull the int status in such case. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e31dcdcf |
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06-Nov-2019 |
Emily Deng <Emily.Deng@amd.com> |
drm/amdgpu: Need to disable msix when unloading driver For driver reload test, it will report "can't enable MSI (MSI-X already enabled)". Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6857f879 |
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12-Jul-2019 |
Lyude Paul <lyude@redhat.com> |
drm/amdgpu: Iterate through DRM connectors correctly Currently, every single piece of code in amdgpu that loops through connectors does it incorrectly and doesn't use the proper list iteration helpers, drm_connector_list_iter_begin() and drm_connector_list_iter_end(). Yeesh. So, do that. Cc: Juston Li <juston.li@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191022023641.8026-12-lyude@redhat.com
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#
8a745c7f |
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03-Oct-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: improve MSI-X handling (v3) Check the number of supported vectors and fall back to MSI if we return or error or 0 MSI-X vectors. v2: only allocate one vector. We can't currently use more than one anyway. v3: install the irq on vector 0. Tested-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Shaoyun liu <shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bd660f4f |
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01-Oct-2019 |
shaoyunl <shaoyun.liu@amd.com> |
drm/amdgpu : enable msix for amdgpu driver We might used out of the msi resources in some cloud project which have a lot gpu devices(including PF and VF), msix can provide enough resources from system level view Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f8d2d39e |
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03-Sep-2019 |
Lyude Paul <lyude@redhat.com> |
drm/amdgpu: Iterate through DRM connectors correctly Currently, every single piece of code in amdgpu that loops through connectors does it incorrectly and doesn't use the proper list iteration helpers, drm_connector_list_iter_begin() and drm_connector_list_iter_end(). Yeesh. So, do that. Cc: Juston Li <juston.li@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fc9c7f84 |
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19-Sep-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/ih: fix documentation in amdgpu_irq_dispatch Fix parameters. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bb42eda2 |
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31-Aug-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/irq: check if nbio funcs exist We need to check if the nbios funcs exist before checking the individual pointers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
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#
a344db8e |
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05-Jun-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: poll ras_controller_irq and err_event_athub_irq status For the hardware that can not enable BIF ring for IH cookies for both ras_controller_irq and err_event_athub_irq, the driver has to poll the status register in irq handling and ack the hardware properly when there is interrupt triggered Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fdf2f6c5 |
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09-Jun-2019 |
Sam Ravnborg <sam@ravnborg.org> |
drm/amd: drop use of drmP.h in amdgpu/amdgpu* Drop use of drmP.h in all files named amdgpu* in drm/amd/amdgpu/ Fix fallout. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-10-sam@ravnborg.org
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#
e2fb6e0a |
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09-Jan-2019 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup amdgpu_ih_process a bit more Remove the callback and call the dispatcher directly. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9dd60c4e |
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26-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add support for processing IH ring 1 & 2 Previously we only added the ring buffer memory, now add the handling as well. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b56e3270 |
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26-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add the IH to the IV trace To distinct on which IH ring an IV was found. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
22666cc1 |
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26-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: move IV prescreening into the GMC code The GMC/VM subsystem is causing the faults, so move the handling here as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
20260577 |
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26-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: send IVs to the KFD only after processing them v3 This allows us to filter out VM faults in the GMC code. v2: don't filter out all faults v3: fix copy&paste typo, send all IV to the KFD, don't change message level Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
898c2cb5 |
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16-Oct-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: use scheduler fault instead of reset work Signal a fault to the scheduler on an illegal instruction or register access violation instead of kicking of the reset handler directly. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1ffdeca6 |
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17-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: move more defines into amdgpu_irq.h Everything that isn't related to the IH ring. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1f896946 |
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17-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: move more interrupt processing into amdgpu_irq.c Add a callback to amdgpu_ih_process to remove most of the IV logic. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
425c3143 |
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16-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup amdgpu_ih.c Cleanup amdgpu_ih.c to be able to handle multiple interrupt rings. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
12938fad |
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21-Aug-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup GPU recovery check a bit (v2) Check if we should call the function instead of providing the forced flag. v2: rebase on KFD changes (Alex) Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
923ff76e |
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07-Jun-2018 |
Slava Abramov <slava.abramov@amd.com> |
drm/amdgpu: update documentation for amdgpu_irq.c v3 Add/update function level documentation and add reference to amdgpu_irq.c in amdgpu.rst v2: Added DOC comment Added more explanations for amdgpu_hotplug_work_func Properly formatted unused parameters Properly formatted return values Fixed usage of acronyms More consistent styling v3: Removed duplicate "not" Using '&' to refer to functions and types Signed-off-by: Slava Abramov <slava.abramov@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
81ce8bea |
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20-Mar-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Fix kernel NULL pointer dereference when amdgpu fini Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9f51943c |
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19-Jan-2018 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu: only flush hotplug work without DC since hotplug_work is initialized under the case of no dc support Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6ec956f5 |
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19-Jan-2018 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu: only flush hotplug work without DC since hotplug_work is initialized under the case of no dc support Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9950cda2 |
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18-Jan-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: drop the drm irq pre/post/un install callbacks The preinstall callback didn't do anything because not all of the IPs were initialized when it was called. Move the postinstall setup into sequence in the driver. The uninstall callback disabled all interrupt source, but it got called too late in the driver sequence and caused problems with IPs who already freed the relevant data structures. Move the call into the right place in the driver sequence. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Tested-By: Mikita Lipski <mikita.lipski@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5f152b5e |
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15-Dec-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: rename amdgpu_gpu_recover add device to the name for consistency. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dcebf026 |
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12-Dec-2017 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Add gpu_recovery parameter Add new parameter to control GPU recovery procedure. v2: Add auto logic where reset is disabled for bare metal and enabled for SR-IOV. Allow forced reset from debugfs. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5740682e |
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25-Oct-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:implement new GPU recover(v3) 1,new imple names amdgpu_gpu_recover which gives more hint on what it does compared with gpu_reset 2,gpu_recover unify bare-metal and SR-IOV, only the asic reset part is implemented differently 3,gpu_recover will increase hang job karma and mark its entity/context as guilty if exceeds limit V2: 4,in scheduler main routine the job from guilty context will be immedialy fake signaled after it poped from queue and its fence be set with "-ECANCELED" error 5,in scheduler recovery routine all jobs from the guilty entity would be dropped 6,in run_job() routine the real IB submission would be skipped if @skip parameter equales true or there was VRAM lost occured. V3: 7,replace deprecated gpu reset, use new gpu recover Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9953b72f |
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25-Oct-2017 |
pding <Pixel.Ding@amd.com> |
drm/amdgpu: change redundant init logs to debug level When this VF stays in exclusive mode for long, other VFs will be impacted. The redundant messages causes exclusive mode timeout when they're redirected. That is a normal use case for cloud service to redirect guest log to virtual serial port. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: pding <Pixel.Ding@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4562236b |
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12-Sep-2017 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/dc: Add dc display driver (v2) Supported DCE versions: 8.0, 10.0, 11.0, 11.2 v2: rebase against 4.11 Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ddbb5313 |
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20-Aug-2017 |
Emily Deng <Emily.Deng@amd.com> |
drm/amdgpu/virtual_dce: Virtual display doesn't support disable vblank immediately For virtual display, it uses software timer to emulate the vsync interrupt, it doesn't have high precision, so doesn't support disable vblank immediately. BUG: SWDEV-129274 Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
766cff83 |
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20-Aug-2017 |
Emily Deng <Emily.Deng@amd.com> |
drm/amdgpu/virtual_dce: Virtual display doesn't support disable vblank immediately For virtual display, it uses software timer to emulate the vsync interrupt, it doesn't have high precision, so doesn't support disable vblank immediately. BUG: SWDEV-129274 Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8e1b90cc |
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20-Jun-2017 |
Mario Kleiner <mario.kleiner.de@gmail.com> |
drm/amdgpu: Allow vblank_disable_immediate. With instantaneous high precision vblank timestamping that updates at leading edge of vblank, a cooked hw vblank counter which increments at leading edge of vblank, and reliable page flip execution and completion at leading edge of vblank, we should meet the requirements for fast/immediate vblank irq disable/enable. Testing on Linux-4.12-rc5 + drm-next on a Radeon R9 380 Tonga Pro (DCE 10) with timing measurement equipment indicates this works fine, so allow immediate vblank disable for power saving. For debugging in case of unexpected trouble, booting with kernel cmdline option drm.vblankoffdelay=0 (or echo 0 > /sys/module/drm/parameters/vblankoffdelay) would keep vblank irqs permanently on to approximate old behavior. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
91e97677 |
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21-Jun-2017 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/amd|radeon: Drop drm_vblank_cleanup Both drivers shut down all crtc beforehand already, which will shut up any pending vblank (the only thing vblank_cleanup really does is disable the disable timer). Hence we don't need this here and can remove it. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170621082850.13224-2-daniel.vetter@ffwll.ch
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#
4fbf87e2 |
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05-May-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:don't invoke srio-gpu-reset in gpu-reset (v2) because we don't want to do sriov-gpu-reset under certain cases, so just split those two funtion and don't invoke sr-iov one from bare-metal one. V2: remove debugfs_gpu_reset routine on SRIOV case. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6e3f187c |
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05-Apr-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: fix over allocating of IRQ sources We need an array of pointers to IRQ sources, not an array of sources. Signed-off-by: Christian König <christian.koenig@amd.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cef105f7 |
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06-Dec-2016 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add IV trace point This allows us to grab IVs without spamming the log. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d766e6a3 |
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29-Mar-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: switch ih handling to two levels (v3) Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2babdc85 |
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13-Dec-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/radeon|amdgpu: Remove redundant num_connectors check The list walk will shortcircuit anyway. Cc: Alex Deucher <alexdeucher@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161213230814.19598-4-daniel.vetter@ffwll.ch
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#
3b1c9036 |
|
14-Nov-2016 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: remove amdgpu_irq_get_delayed Not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e8d7515a |
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21-Oct-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: cancel reset work on fini Cancel any pending reset work when we tear down the driver. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0eaeb070 |
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16-Jun-2016 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add amdgpu_irq_gpu_reset_resume_helper irq need to update when gpu reset happens. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
fcee5906 |
|
18-May-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm: Nuke ->vblank_disable_allowed This was added in commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Tue Sep 30 12:14:26 2008 -0700 drm: Rework vblank-wait handling to allow interrupt reduction. to stay backwards-compatible with old UMS code that didn't even tell the kernel when it did a modeset, so that the kernel could save/restore vblank counters. At worst this means vblanks will be somewhat funky on a setup that very likely no one still runs. So let's just nuke it. Plan B would be to set it unconditionally in drm_vblank_init for kms drivers, instead of in each driver separately. So if this patch breaks anything please only restore the hunks in drmP.h and drm_irq.c, plus add a check for DRIVER_MODESET in drm_vblank_init. Stumbled over this in a discussion on irc with Chris. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Eric Anholt <eric@anholt.net> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
f498d9ed |
|
10-Apr-2016 |
Nils Wallménius <nils.wallmenius@gmail.com> |
drm/amd: Mark some tables as const This patch marks some compile-time constant tables 'const'. The tables marked in this patch are the low hanging fruit where little other changes were necesary to avoid casting away constness etc. Also mark some tables that are private to a file as static. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
354edd8e |
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31-Mar-2016 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/amdgpu: Set vblank_disable_allowed = true Without this, since the conversion from drm_vblank_pre/post_modeset to drm_vblank_on/off, the vblank interrupt could never be disabled after userspace triggered enabling it. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e9c5e740 |
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13-Jan-2016 |
Dave Airlie <airlied@redhat.com> |
drm/amdgpu: add missing irq.h include this fixes the build on arm. Signed-off-by: Dave Airlie <airlied@redhat.com>
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5f232365 |
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05-Nov-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add irq domain support Hardware blocks on the GPU like ACP generate interrupts in the GPU interrupt controller, but are driven by a separate driver. Add an irq domain to the GPU driver so that blocks like ACP can register a Linux interrupt. Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5a6adfa2 |
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22-Sep-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Fix max_vblank_count value for current display engines The value was much too low, which could cause the userspace visible vblank counter to move backwards when the hardware counter wrapped around. Ported from radeon commit: b0b9bb4dd51f396dcf843831905f729e74b0c8c0 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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0cf3be21 |
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28-Jul-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Implement irq interfaces for CGS This implements the irq src registrar. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9e14c65c |
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15-May-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: take the mode_config mutex when handling hpds Since we may modify display state. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d38ceaf9 |
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20-Apr-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add core driver (v4) This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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