#
7d6ef755 |
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19-Sep-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
dmaengine: sun6i-dma: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Eventually after all drivers are converted, .remove_new() is renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230919133207.1400430-47-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
897500c7 |
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18-Jul-2023 |
Rob Herring <robh@kernel.org> |
dmaengine: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230718143138.1066177-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
4b23603a |
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10-Nov-2022 |
Tudor Ambarus <tudor.ambarus@linaro.org> |
dmaengine: drivers: Use devm_platform_ioremap_resource() platform_get_resource() and devm_ioremap_resource() are wrapped up in the devm_platform_ioremap_resource() helper. Use the helper and get rid of the local variable for struct resource *. We now have a function call less. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20221110152528.7821-1-tudor.ambarus@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
3dfaa68f |
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01-Jan-2023 |
Samuel Holland <samuel@sholland.org> |
dmaengine: sun6i: Set the maximum segment size The sun6i DMA engine supports segment sizes up to 2^25-1 bytes. This is explicitly stated in newer SoC documentation (H6, D1), and it is implied in older documentation by the 25-bit width of the "bytes left in the current segment" register field. Exposing the real segment size limit (instead of the 64k default) reduces the number of SG list segments needed for a transaction. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230101193605.50285-1-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
8292a155 |
|
23-Apr-2022 |
Samuel Holland <samuel@sholland.org> |
dmaengine: sun6i: Add support for the D1 variant So far it appears to match the configuration of the A100 variant. Since D1 is a RISC-V chip, it does not meet any of the existing dependencies for this driver, so relax the dependency somewhat. Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220424172759.33383-5-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
ec31c5c5 |
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23-Apr-2022 |
Samuel Holland <samuel@sholland.org> |
dmaengine: sun6i: Add support for 34-bit physical addresses Recent Allwinner SoCs support >4 GiB of DRAM, so those variants of the DMA engine support >32 bit physical addresses. This is accomplished by placing the high bits in the "para" word in the DMA descriptor. DMA descriptors themselves can be located at >32 bit addresses by putting the high bits in the LSBs of the descriptor address register, taking advantage of the required DMA descriptor alignment. However, support for this is not really necessary, so we can avoid the complication by allocating them from the DMA_32 zone. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220424172759.33383-4-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
9aa48806 |
|
23-Apr-2022 |
Samuel Holland <samuel@sholland.org> |
dmaengine: sun6i: Do not use virt_to_phys This breaks on RISC-V, because dma_pool_alloc returns addresses which are not in the linear map. Instead, plumb through the physical address which is already known anyway. Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220424172759.33383-3-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
07b55273 |
|
09-Nov-2020 |
Yangtao Li <frank@allwinnertech.com> |
dmaengine: sun6i: Add support for A100 DMA The dma of a100 is similar to h6, with some minor changes to support greater addressing capabilities. Add support for it. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Link: https://lore.kernel.org/r/719852c6a9a597bd2e82d01a268ca02b9dee826c.1604988979.git.frank@allwinnertech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
aaf9d3d6 |
|
31-Aug-2020 |
Allen Pais <allen.lkml@gmail.com> |
dmaengine: sun6i: convert tasklets to use new tasklet_setup() API In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Allen Pais <allen.lkml@gmail.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200831103542.305571-27-allen.lkml@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
e17be6e1 |
|
30-Jul-2019 |
Stephen Boyd <swboyd@chromium.org> |
dmaengine: Remove dev_err() usage after platform_get_irq() We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Vinod Koul <vkoul@kernel.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: dmaengine@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-11-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
2fe5575f |
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27-May-2019 |
Jernej Skrabec <jernej.skrabec@siol.net> |
dmaengine: sun6i: Add support for H6 DMA H6 DMA has more than 32 supported DRQs, which means that configuration register is slightly rearranged. It also needs additional clock to be enabled. Add support for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
802440bd |
|
27-May-2019 |
Jernej Skrabec <jernej.skrabec@siol.net> |
dmaengine: sun6i: Add a quirk for setting mode fields H6 DMA has mode fields in different position than any other currently supported DMA controller. Add a quirk for that. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
67f34055 |
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27-May-2019 |
Jernej Skrabec <jernej.skrabec@siol.net> |
dmaengine: sun6i: Add a quirk for setting DRQ fields H6 DMA has more than 32 possible DRQs. That means that current maximum of 31 DRQs is not enough anymore. Add a quirk which will set source and destination DRQ number. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
43a90fc7 |
|
27-May-2019 |
Jernej Skrabec <jernej.skrabec@siol.net> |
dmaengine: sun6i: Add a quirk for additional mbus clock H6 DMA controller needs additional mbus clock to be enabled. Add a quirk for it and handle it accordingly. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
2874c5fd |
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27-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
464aa6f5 |
|
16-Oct-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
dmaengine: sun6i: Retrieve channel count/max request from devicetree To avoid introduction of a new compatible for each small SoC/DMA controller variation, move the definition of the channel count to the devicetree. The number of vchans is no longer explicit, but limited by the highest port/DMA request number. The result is a slight overallocation for SoCs with a sparse port mapping. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
12e01770 |
|
27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
dmaengine: sun6i: Add support for Allwinner A64 and compatibles The A64 SoC has the same dma engine as the H3 (sun8i), with a reduced amount of physical channels. To allow future reuse of the compatible, leave the channel count etc. in the config data blank and retrieve it from the devicetree. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
500fa9e7 |
|
27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
dmaengine: sun6i: Move number of pchans/vchans/request to device struct Preparatory patch: If the same compatible is used for different SoCs which have a common register layout, but different number of channels, the channel count can no longer be stored in the config. Store it in the device structure instead. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
d5f6d8cf |
|
27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
dmaengine: sun6i: Enable additional burst lengths/widths on H3 The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with a width of 1, 2, 4 or 8 bytes. The register value for the the width is log2-encoded, change the conversion function to provide the correct value for width == 8. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
88d8622c |
|
27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
dmaengine: sun6i: Restructure code to allow extension for new SoCs The current code mixes three distinct operations when transforming the slave config to register settings: 1. special handling of DMA_SLAVE_BUSWIDTH_UNDEFINED, maxburst == 0 2. range checking 3. conversion of raw to register values As the range checks depend on the specific SoC, move these out of the conversion to distinct operations. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
5a6a6202 |
|
27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
dmaengine: sun6i: Correct burst length field offsets for H3 For the H3, the burst lengths field offsets in the channel configuration register differs from earlier SoC generations. Using the A31 register macros actually configured the H3 controller do to bursts of length 1 always, which although working leads to higher bus utilisation. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
50b12497 |
|
27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
dmaengine: sun6i: Correct setting of clock autogating register for A83T/H3 The H83T uses a compatible string different from the A23, but requires the same clock autogating register setting. The H3 also requires setting the clock autogating register, but has the register at a different offset. Add three suitable callbacks for the existing controller generations and set it in the controller config structure. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
8f3b0034 |
|
20-Sep-2017 |
Corentin Labbe <clabbe.montjoie@gmail.com> |
dmaengine: sun6i: use of_device_get_match_data The usage of of_device_get_match_data reduce the code size a bit. Furthermore, it prevents an improbable dereference when of_match_device() return NULL. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
a702e47e |
|
28-Aug-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
dmaengine: sun6i: support V3s SoC variant Allwinner V3s has a DMA engine similar to the ones from A31, but with fewer channels and DRQs. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
0430a7c7 |
|
28-Aug-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk Originally we enable a special gate bit when the compatible indicates A23/33. But according to BSP sources and user manuals, more SoCs will need this gate bit. So make it a common quirk configured in the config struct. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
644e906f |
|
19-Nov-2016 |
Hao Zhang <hao5781286@gmail.com> |
dmaengine: sun6i: fix the uninitialized value for v_lli dma_pool_alloc does not initialize the value of the newly allocated block for the v_lli, and the uninitilize value make the tests failed which is on pine64 with dmatest. we can fix it just change the "|=" to "=" for the v_lli->cfg. Signed-off-by: Hao Zhang <hao5781286@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
f732c5b7 |
|
01-Nov-2016 |
Axl-zhang <hao5781286@gmail.com> |
dmaengine: sun6i: fix the uninitialized value for v_lli dma_pool_alloc does not initialize the value of the newly allocated block for the v_lli, and the uninitilize value make the tests failed which is on pine64 with dmatest. we can fix it just change the "|=" to "=" for the v_lli->cfg. Signed-off-by: Hao Zhang <hao5781286@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
3a03ea76 |
|
18-Sep-2016 |
Jean-Francois Moine <moinejf@free.fr> |
dmaengine: sun6i: Add support for Allwinner A83T (sun8i) variant The A83T SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
b9ab9d10 |
|
07-Jun-2016 |
Peter Griffin <peter.griffin@linaro.org> |
dmaengine: sun6i-dma: Only calculate residue if state exists. There is no point in calculating the residue if state does not exist to store the value. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
a90e173f |
|
28-Apr-2016 |
Jean-Francois Moine <moinejf@free.fr> |
dmaengine: sun6i: Add cyclic capability DMA cyclic transfers are required by audio streaming. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
3435fb18 |
|
28-Apr-2016 |
Jean-Francois Moine <moinejf@free.fr> |
dmaengine: sun6i: Remove useless check The transfer direction is now checked in set_config. There is no need to check it twice. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
a4eb36b0 |
|
28-Apr-2016 |
Jean-Francois Moine <moinejf@free.fr> |
dmaengine: sun6i: Set default maxburst size and bus width Some DMA clients, as audio, don't set the maxburst size and bus width on the memory side when starting DMA transfers. This patch prevents such transfers to be aborted by providing system default values to the lacking ones. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
52c87179 |
|
22-Apr-2016 |
Jean-Francois Moine <moinejf@free.fr> |
dmaengine: sun6i: Simplify lli setting Checking the DMA config before setting the lli list avoids to do tests inside the setting loop. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
dc6a58c1 |
|
22-Apr-2016 |
Jean-Francois Moine <moinejf@free.fr> |
dmaengine: sun6i: Fix impossible settings of burst and bus width In the commit 1f9cd915b64bb95f ("dmaengine: sun6i: Fix memcpy operation"), the signed values returned by convert_burst() and convert_buswidth() were stored in an unsigned value. Then, these values were considered as errors when non null. As a result, DMA transfers were rejected when the burst or buswidth had values different from 1, as 8 for the burst or 4 for the bus width. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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#
128fe7e9 |
|
22-Apr-2016 |
Jean-Francois Moine <moinejf@free.fr> |
dmaengine: sun6i: Fix the access of the IRQ register The IRQ register number is computed, but this number was not used and the register was the one indexed by the channel index instead. Then, only the first DMA channel was working. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
c719d7fa |
|
16-Sep-2015 |
Luis de Bethencourt <luis@debethencourt.com> |
dmaengine: sun6i: Fix module autoload for OF platform driver This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
77a68e56 |
|
20-Jul-2015 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: Add an enum for the dmaengine alignment constraints Most drivers need to set constraints on the buffer alignment for async tx operations. However, even though it is documented, some drivers either use a defined constant that is not matching what the alignment variable expects (like DMA_BUSWIDTH_* constants) or fill the alignment in bytes instead of power of two. Add a new enum for these alignments that matches what the framework expects, and convert the drivers to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
f008db8c |
|
06-May-2015 |
Jens Kuske <jenskuske@gmail.com> |
dmaengine: sun6i: Add support for Allwinner H3 (sun8i) variant The H3 SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Add the proper config data and compatible string to support it. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
2fcb9e3c |
|
16-Mar-2015 |
Vinod Koul <vkoul@kernel.org> |
dmaengine: sun6i: remove device_alloc_chan_resources handler Now that device_alloc_chan_resources handler in not mandatory, remove dummy implementations Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
57c03422 |
|
16-Mar-2015 |
Fabian Frederick <fabf@skynet.be> |
dmaengine: constify of_device_id array of_device_id is always used as const. (See driver.of_match_table and open firmware functions) Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
1cac81b4 |
|
17-Nov-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Declare slave capabilities for the generic code Now that the generic slave caps code can make use of the device assigned capabilities, instead of relying on a callback to be implemented. Make use of this code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
826b15a7 |
|
17-Nov-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Split device_control Split the device_control callback of the Allwinner A31 DMA driver to make use of the newly introduced callbacks, that will eventually be used to retrieve slave capabilities. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
#
0b04ddf8 |
|
06-Nov-2014 |
Chen-Yu Tsai <wens@csie.org> |
dmaengine: sun6i: Add support for Allwinner A23 (sun8i) variant The A23 SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Add the proper config data and compatible string to support it. A slight difference in sun8i is an undocumented register needs to be toggled for dma to function. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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25a37c2f |
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06-Nov-2014 |
Chen-Yu Tsai <wens@csie.org> |
dmaengine: sun6i: support parameterized compatible strings This patch adds support for hardware parameters tied to compatible strings, so similar hardware can reuse the driver. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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1f9cd915 |
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11-Nov-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Fix memcpy operation The prep_memcpy call was not setting any meaningful burst and width because it was relying on the dma_slave_config was not set already. Rework the needed conversion functions, and hardcode the width and burst to use. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: stable@vger.kernel.org Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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1eacd443 |
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16-Oct-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Remove chancnt affectations chanctnt is already filled by dma_async_device_register, which uses the channel list to know how much channels there is. Since it's already filled, we can safely remove it from the drivers' probe function. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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14e0e283 |
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06-Sep-2014 |
Chen-Yu Tsai <wens@csie.org> |
dmaengine: sun6i: Remove obsolete clk muxing code The sun6i DMA controller requires the AHB1 bus clock to be clocked from PLL6. This was originally done by the dmaengine driver during probe time. The AHB1 clock driver has since been unified, so the original code does not work. Remove the clk muxing code, and replace it with DT clk default properties. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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4fbd804e |
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30-Jul-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Fix memory leaks The sun6i_dma_prep_memcpy and sun6i_dma_prep_slave_sg functions were both leaking the descriptor they allocated if an error was happening after a successful dma_pool_alloc call. It also fixes a memleak that was happening in the scatter gather list traversal, that was allocating as much descriptor as there was scatter gather items, but only freeing the current descriptor if an error was to arise. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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174427c1 |
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30-Jul-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Free the interrupt before killing the tasklet There's still a small window between the call to sun6i_kill_tasklet and the end of the driver remove function where a spurious interrupt might trigger, and start using deallocated resources. Replace the call to synchronize_irq by a free_irq, so that we're sure that we won't get any further interrupts when we're deallocating resources. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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92e4a3bf |
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30-Jul-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Remove switch statement from buswidth convertion routine Since the conversion routine is quite trivial, we don't need this switch, and we can just use a simple calculation. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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7f5e03e7 |
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27-Jul-2014 |
Vinod Koul <vkoul@kernel.org> |
dmaengine: sun61: fix warning on bad print specfier The sg_dma_len() returns unsigned int but we had driver print it as %zu, use %u as documented in Documentation/printk-formats.txt drivers/dma/sun6i-dma.c: In function ‘sun6i_dma_prep_slave_sg’: drivers/dma/sun6i-dma.c:643: warning: format ‘%zu’ expects type ‘size_t’, but argument 8 has type ‘unsigned int’ drivers/dma/sun6i-dma.c:661: warning: format ‘%zu’ expects type ‘size_t’, but argument 8 has type ‘unsigned int’ Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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42c0d54e |
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28-Jul-2014 |
Vinod Koul <vkoul@kernel.org> |
dmaengine: sun6i: fix build failure on x86, xilinx targets Since the driver defined COMPILE_TEST, it gets compiled for different arch's The driver uses __virt_to_phys() insteadof virt_to_phys, so replace it drivers/dma/sun6i-dma.c: In function ‘sun6i_dma_dump_chan_regs’: drivers/dma/sun6i-dma.c:203: error: implicit declaration of function '__virt_to_phys' Reported-by: kbuild test robot <fengguang.wu@intel.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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55585930 |
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17-Jul-2014 |
Maxime Ripard <mripard@kernel.org> |
dmaengine: sun6i: Add driver for the Allwinner A31 DMA controller The Allwinner A31 has a 16 channels DMA controller that it shares with the newer A23. Although sharing some similarities with the DMA controller of the older Allwinner SoCs, it's significantly different, I don't expect it to be possible to share the driver for these two. The A31 Controller is able to memory-to-memory or memory-to-device transfers on the 16 channels in parallel. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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