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9687daf7 |
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17-Aug-2023 |
Yue Haibing <yuehaibing@huawei.com> |
crypto: chelsio - Remove unused declarations These declarations are not implemented now, remove them. Signed-off-by: Yue Haibing <yuehaibing@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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66810912 |
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15-Apr-2021 |
Vinay Kumar Yadav <vinay.yadav@chelsio.com> |
crypto: chelsio/chcr - Remove useless MODULE_VERSION kernel version describes module state more accurately. hence remove chcr versioning. Signed-off-by: Vinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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0ec78cdb |
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14-Oct-2020 |
Ayush Sawal <ayush.sawal@chelsio.com> |
cxgb4/ch_ipsec: Replace the module name to ch_ipsec from chcr This patch changes the module name to "ch_ipsec" and prepends "ch_ipsec" string instead of "chcr" in all debug messages and function names. V1->V2: -Removed inline keyword from functions. -Removed CH_IPSEC prefix from pr_debug. -Used proper indentation for the continuation line of the function arguments. V2->V3: Fix the checkpatch.pl warnings. Fixes: 1b77be463929 ("crypto/chcr: Moving chelsio's inline ipsec functionality to /drivers/net") Signed-off-by: Ayush Sawal <ayush.sawal@chelsio.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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a8c16e8e |
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10-Sep-2020 |
Rohit Maheshwari <rohitm@chelsio.com> |
crypto/chcr: move nic TLS functionality to drivers/net This patch moves complete nic tls offload (kTLS) code from crypto directory to drivers/net/ethernet/chelsio/inline_crypto/ch_ktls directory. nic TLS is made a separate ULD of cxgb4. Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1b77be46 |
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19-Aug-2020 |
Vinay Kumar Yadav <vinay.yadav@chelsio.com> |
crypto/chcr: Moving chelsio's inline ipsec functionality to /drivers/net This patch seperates inline ipsec functionality from coprocessor driver chcr. Now inline ipsec is separate ULD, moved from "drivers/crypto/chelsio/" to "drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/" Signed-off-by: Ayush Sawal <ayush.sawal@chelsio.com> Signed-off-by: Vinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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44fd1c1f |
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19-Aug-2020 |
Vinay Kumar Yadav <vinay.yadav@chelsio.com> |
chelsio/chtls: separate chelsio tls driver from crypto driver chelsio inline tls driver(chtls) is mostly overlaps with NIC drivers but currenty it is part of crypto driver, so move it out to appropriate directory for better maintenance. Signed-off-by: Vinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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a3ac249a |
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01-Jun-2020 |
Rohit Maheshwari <rohitm@chelsio.com> |
cxgb4/chcr: Enable ktls settings at run time Current design enables ktls setting from start, which is not efficient. Now the feature will be enabled when user demands TLS offload on any interface. v1->v2: - taking ULD module refcount till any single connection exists. - taking rtnl_lock() before clearing tls_devops. v2->v3: - cxgb4 is now registering to tlsdev_ops. - module refcount inc/dec in chcr. - refcount is only for connections. - removed new code from cxgb_set_feature(). v3->v4: - fixed warning message. Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5a4b9fe7 |
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07-Mar-2020 |
Rohit Maheshwari <rohitm@chelsio.com> |
cxgb4/chcr: complete record tx handling Added tx handling in this patch. This includes handling of segments contain single complete record. v1->v2: - chcr_write_cpl_set_tcb_ulp is added in this patch. v3->v4: - mss calculation logic. - replaced kfree_skb with dev_kfree_skb_any. - corrected error message reported by kbuild test robot <lkp@intel.com> Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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8a30923e |
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07-Mar-2020 |
Rohit Maheshwari <rohitm@chelsio.com> |
cxgb4/chcr: Save tx keys and handle HW response As part of this patch generated and saved crypto keys, handled HW response of act_open_req and set_tcb_req. Defined connection state update. v1->v2: - optimized tcb update using control queue. - state machine handling when earlier states received. v2->v3: - Added one empty line after function declaration. Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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34aba2c4 |
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07-Mar-2020 |
Rohit Maheshwari <rohitm@chelsio.com> |
cxgb4/chcr : Register to tls add and del callback A new macro is defined to enable ktls tx offload support on Chelsio T6 adapter. And if this macro is enabled, cxgb4 will send mailbox to enable or disable ktls settings on HW. In chcr, enabled tx offload flag in netdev and registered tls_dev_add and tls_dev_del. v1->v2: - mark tcb state to close in tls_dev_del. - u_ctx is now picked from adapter structure. - clear atid in case of failure. - corrected ULP_CRYPTO_KTLS_INLINE value. v2->v3: - add empty line after variable declaration. - local variable declaration in reverse christmas tree ordering. Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5a8a0765 |
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24-Feb-2020 |
Gustavo A. R. Silva <gustavo@embeddedor.com> |
crypto: Replace zero-length array with flexible-array member The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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567be3a5 |
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23-Feb-2020 |
Ayush Sawal <ayush.sawal@chelsio.com> |
crypto: chelsio - Use multiple txq/rxq per tfm to process the requests This patch enables chcr to use multiple txq/rxq per tfm to process the crypto requests. The txq/rxq are selected based on cpu core-id. Signed-off-by: Ayush Sawal <ayush.sawal@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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00adbe71 |
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05-Feb-2020 |
Devulapally Shiva Krishna <shiva@chelsio.com> |
crypto: chelsio - Print the chcr driver information while module load. No logs are recorded in dmesg during chcr module load, hence adding the print and also appending -ko to driver version. Signed-off-by: Devulapally Shiva Krishna <shiva@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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4da66b75 |
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17-Jan-2019 |
Atul Gupta <atul.gupta@chelsio.com> |
crypto: chelsio - avoid using sa_entry imm use is_eth_imm to determine immediate data than use sa_entry field which is common for tunnel and not per skb. Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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fef4912b |
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11-Dec-2018 |
Harsh Jain <harsh@chelsio.com> |
crypto: chelsio - Handle PCI shutdown event chcr receives "CXGB4_STATE_DETACH" event on PCI Shutdown. Wait for processing of inflight request and Mark the device unavailable. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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d5a4dfbd |
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11-Dec-2018 |
Harsh Jain <harsh@chelsio.com> |
crypto: chelsio - Use same value for both channel in single WR Use tx_channel_id instead of rx_channel_id. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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8362ea16 |
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30-Nov-2018 |
Atul Gupta <atul.gupta@chelsio.com> |
crypto: chcr - ESN for Inline IPSec Tx Send SPI, 64b seq nos and 64b IV with aadiv drop for inline crypto. This information is added in outgoing packet after the CPL TX PKT XT and removed by hardware. The aad, auth and cipher offsets are then adjusted for ESN enabled tunnel. Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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335bcc4a |
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24-May-2018 |
Harsh Jain <harsh@chelsio.com> |
crypt: chelsio - Send IV as Immediate for cipher algo Send IV in WR as immediate instead of dma mapped entry for cipher. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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639d28a1 |
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31-Mar-2018 |
Atul Gupta <atul.gupta@chelsio.com> |
crypto: chcr - Inline TLS Key Macros Define macro for programming the TLS Key context Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5110e655 |
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05-Mar-2018 |
Harsh Jain <harsh@chelsio.com> |
crypto: chelsio -Split Hash requests for large scatter gather list Send multiple WRs to H/W when No. of entries received in scatter list cannot be sent in single request. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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6dad4e8a |
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16-Nov-2017 |
Atul Gupta <atul.gupta@chelsio.com> |
chcr: Add support for Inline IPSec register xfrmdev_ops callbacks, Send IPsec tunneled data to HW for inline processing. The driver use hardware crypto accelerator to encrypt and generate ICV for the transmitted packet in Inline mode. Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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2956f36c |
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08-Oct-2017 |
Harsh Jain <harsh@chelsio.com> |
crypto: chelsio - Remove allocation of sg list to implement 2K limit of dsgl header Update DMA address index instead of allocating new sg list to impose 2k size limit for each entry. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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14c19b17 |
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14-Jun-2017 |
Harsh Jain <harsh@chelsio.com> |
crypto: chcr - Select device in Round Robin fashion When multiple devices are present in system select device in round-robin fashion for crypto operations Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Reviewed-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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b8fd1f41 |
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14-Jun-2017 |
Harsh Jain <harsh@chelsio.com> |
crypto: chcr - Add ctr mode and process large sg entries for cipher It send multiple WRs to H/W to handle large sg lists. Adds ctr(aes) and rfc(ctr(aes)) modes. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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72a56ca9 |
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10-Apr-2017 |
Harsh Jain <harsh@chelsio.com> |
crypto: chcr - Fix txq ids. The patch fixes a critical issue to map txqid with flows on the hardware appropriately, if tx queues created are more than flows configured then txqid shall map within the range of hardware flows configured. This ensure that un-mapped txqid does not remain un-handled. The patch also segregated the rxqid and txqid for clarity. Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Reviewed-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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8a13449f |
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27-Jan-2017 |
Harsh Jain <harsh@chelsio.com> |
crypto: chcr - Change flow IDs Change assign flowc id to each outgoing request.Firmware use flowc id to schedule each request onto HW. FW reply may miss without this change. Reviewed-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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2debd332 |
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29-Nov-2016 |
Harsh Jain <harsh@chelsio.com> |
crypto: chcr - Add AEAD algos. Add support for following AEAD algos. GCM,CCM,RFC4106,RFC4309,authenc(hmac(shaXXX),cbc(aes)). Reviewed-by: Stephan Mueller <smueller@chronox.de> Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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358961d1 |
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29-Nov-2016 |
Harsh Jain <harsh@chelsio.com> |
crypto: chcr - Added new structure chcr_wr Added new structure chcr_wr to populate Work Request Header. Signed-off-by: Jitendra Lulla <JLULLA@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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324429d7 |
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16-Aug-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
chcr: Support for Chelsio's Crypto Hardware The Chelsio's Crypto Hardware can perform the following operations: SHA1, SHA224, SHA256, SHA384 and SHA512, HMAC(SHA1), HMAC(SHA224), HMAC(SHA256), HMAC(SHA384), HAMC(SHA512), AES-128-CBC, AES-192-CBC, AES-256-CBC, AES-128-XTS, AES-256-XTS This patch implements the driver for above mentioned features. This driver is an Upper Layer Driver which is attached to Chelsio's LLD (cxgb4) and uses the queue allocated by the LLD for sending the crypto requests to the Hardware and receiving the responses from it. The crypto operations can be performed by Chelsio's hardware from the userspace applications and/or from within the kernel space using the kernel's crypto API. The above mentioned crypto features have been tested using kernel's tests mentioned in testmgr.h. They also have been tested from user space using libkcapi and Openssl. Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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