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c28ca80b |
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15-Sep-2023 |
Nikita Shubin <nikita.shubin@maquefel.me> |
clocksource: ep93xx: Add driver for Cirrus Logic EP93xx Rewrite EP93xx timer driver located in arch/arm/mach-ep93xx/timer-ep93xx.c trying to do everything the device tree way: - Make every IO-access relative to a base address and dynamic so we can do a dynamic ioremap and get going. - Find register range and interrupt from the device tree. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230915-ep93xx-v4-12-a1d779dcec10@maquefel.me
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56f99cdc |
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30-Jun-2023 |
Neil Armstrong <neil.armstrong@linaro.org> |
clocksource/drivers/timer-oxnas-rps: Remove obsolete timer driver Due to lack of maintenance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 timer. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230630-topic-oxnas-upstream-remove-v2-3-fb6ab3dea87c@linaro.org
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e738521a |
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12-May-2023 |
Keguang Zhang <keguang.zhang@gmail.com> |
clocksource/drivers/loongson1: Move PWM timer to clocksource framework This patch moves most part of arch/mips/loongson32/common/time.c into drivers/clocksource. Adapt the driver to clocksource framework with devicetree support and updates Kconfig/Makefile options. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230512103724.587760-4-keguang.zhang@gmail.com
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49d576ea |
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09-Mar-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
clocksource/drivers/timer-mediatek: Split out CPUXGPT timers On MediaTek platforms, CPUXGPT is the source for the AArch64 System Timer, read through CNTVCT_EL0. The handling for starting this timer ASAP was introduced in commit 327e93cf9a59 ("clocksource/drivers/timer-mediatek: Implement CPUXGPT timers") which description also contains an important full explanation of the reasons why this driver is necessary and cannot be a module. In preparation for an eventual conversion of timer-mediatek to a platform_driver that would be possibly built as a module, split out the CPUXGPT timers driver to a new timer-mediatek-cpux.c driver. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Walter Chang <walter.chang@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230309103913.116775-1-angelogioacchino.delregno@collabora.com
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d19c8b2e |
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03-Feb-2023 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
clocksource/drivers/timer-microchip-pit64b: Select driver only on ARM Microchip PIT64B is currently available on ARM based devices. Thus select it only for ARM. This allows implementing delay timer. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230203130537.1921608-2-claudiu.beznea@microchip.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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8d17aca9 |
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21-Jan-2023 |
Jean Delvare <jdelvare@suse.de> |
clocksource/drivers/timer-microchip-pit64b: Drop obsolete dependency on COMPILE_TEST Since commit 0166dc11be91 ("of: make CONFIG_OF user selectable"), it is possible to test-build any driver which depends on OF on any architecture by explicitly selecting OF. Therefore depending on COMPILE_TEST as an alternative is no longer needed. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Claudiu Beznea <claudiu.beznea@microchip.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230121182911.4e47a5ff@endymion.delvare Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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1ea35b35 |
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29-Sep-2022 |
Arnd Bergmann <arnd@arndb.de> |
ARM: s3c: remove s3c24xx specific hacks A number of device drivers reference CONFIG_ARM_S3C24XX_CPUFREQ or similar symbols that are no longer available with the platform gone, though the drivers themselves are still used on newer platforms, so remove these hacks. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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55ccdab7 |
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09-Jun-2022 |
Vincent Whitchurch <vincent.whitchurch@axis.com> |
clocksource/drivers/exynos_mct: Enable building on ARTPEC This timer block is used on ARTPEC-8. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Link: https://lore.kernel.org/r/20220609112738.359385-5-vincent.whitchurch@axis.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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110a2535 |
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18-Jul-2022 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/tegra186: Put Kconfig option 'tristate' to 'bool' The clocksources are built-in, they are not modules. We don't know if the core time framework is ready for clockevents / clocksources as modules. Revert back this option to 'bool'. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20220718213657.1303538-1-daniel.lezcano@linaro.org
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775343f9 |
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23-May-2022 |
Tony Lindgren <tony@atomide.com> |
clocksource/drivers/timer-ti-dm: Make driver selection bool for TI K3 The clocksource drivers do not currently have loadable modules as pointed out by Daniel Lezcano <daniel.lezcano@linaro.org>. Let's reconsider this later on once timer removal discussion has been done, and set timer-ti-dm to bool for TI K3 SoC. Cc: Keerthy <j-keerthy@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220523151448.23732-1-tony@atomide.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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ab0bbef3 |
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08-Apr-2022 |
Tony Lindgren <tony@atomide.com> |
clocksource/drivers/timer-ti-dm: Make timer selectable for ARCH_K3 Let's make timer-ti-dm selectable for ARCH_K3, and add a separate option for OMAP_DM_SYSTIMER as there should be no need for it on ARCH_K3. For older TI SoCs, we are already selecting OMAP_DM_TIMER in arch/arm/mach-omap*/Kconfig. For mach-omap2, we need to now also select OMAP_DM_SYSTIMER. Cc: Keerthy <j-keerthy@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220408101715.43697-3-tony@atomide.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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42cee19a |
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04-Jul-2022 |
Thierry Reding <treding@nvidia.com> |
clocksource: Add Tegra186 timers support Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kartik <kkartik@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/1656922422-25823-3-git-send-email-kkartik@nvidia.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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6f6f3e31 |
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14-Jul-2022 |
Randy Dunlap <rdunlap@infradead.org> |
clocksource/drivers/arm_global_timer: Fix Kconfig "its" grammar Use the possessive "its" instead of the contraction "it's" where appropriate. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220715015852.12523-1-rdunlap@infradead.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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41929c9f |
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06-Apr-2022 |
Linus Walleij <linus.walleij@linaro.org> |
clocksource/drivers/ixp4xx: Drop boardfile probe path The boardfiles for IXP4xx have been deleted. Delete all the quirks and code dealing with that boot path and rely solely on device tree boot. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220406205505.2332821-1-linus.walleij@linaro.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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5184f4bf |
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16-May-2022 |
Nick Hawkins <nick.hawkins@hpe.com> |
clocksource/drivers/timer-gxp: Add HPE GXP Timer Add support for the HPE GXP SOC timer. The GXP supports several different kinds of timers but for the purpose of this driver there is only support for the General Timer. The timer has a 1us resolution and is 32 bits. The timer also creates a child watchdog device as the register region is the same. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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1c4b5ecb |
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23-Feb-2022 |
Christoph Hellwig <hch@lst.de> |
remove the h8300 architecture Signed-off-by: Christoph Hellwig <hch@lst.de>
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c92e7ef1 |
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06-Apr-2022 |
Laurent Vivier <laurent@vivier.eu> |
clocksource/drivers: Add a goldfish-timer clocksource Add a clocksource based on the goldfish-rtc device. Move the timer register definition to <clocksource/timer-goldfish.h> This kernel implementation is based on the QEMU upstream implementation: https://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/rtc/goldfish_rtc.c goldfish-timer is a high-precision signed 64-bit nanosecond timer. It is part of the 'goldfish' virtual hardware platform used to run some emulated Android systems under QEMU. This timer only supports oneshot event. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20220406201523.243733-4-laurent@vivier.eu Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
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aec499c7 |
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02-Mar-2022 |
Alan Kao <alankao@andestech.com> |
nds32: Remove the architecture The nds32 architecture, also known as AndeStar V3, is a custom 32-bit RISC target designed by Andes Technologies. Support was added to the kernel in 2016 as the replacement RISC-V based V5 processors were already announced, and maintained by (current or former) Andes employees. As explained by Alan Kao, new customers are now all using RISC-V, and all known nds32 users are already on longterm stable kernels provided by Andes, with no development work going into mainline support any more. While the port is still in a reasonably good shape, it only gets worse over time without active maintainers, so it seems best to remove it before it becomes unusable. As always, if it turns out that there are mainline users after all, and they volunteer to maintain the port in the future, the removal can be reverted. Link: https://lore.kernel.org/linux-mm/YhdWNLUhk+x9RAzU@yamatobi.andestech.com/ Link: https://lore.kernel.org/lkml/20220302065213.82702-1-alankao@andestech.com/ Link: https://www.andestech.com/en/products-solutions/andestar-architecture/ Signed-off-by: Alan Kao <alankao@andestech.com> [arnd: rewrite changelog to provide more background] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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34f03f7f |
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04-Mar-2022 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
clocksource/drivers/timer-microchip-pit64b: Remove mmio selection PIT64B timer driver doesn't depend on CLKSRC_MMIO since commit e85c1d21b16b ("clocksource/drivers/timer-microchip-pit64b: Add clocksource suspend/resume"). Remove the selection. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220304133601.2404086-2-claudiu.beznea@microchip.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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5fc1f93f |
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17-Dec-2021 |
Romain Perier <romain.perier@gmail.com> |
clocksource/drivers: Add MStar MSC313e timer support The MSC313e-compatible SoCs have 3 timer hardware blocks. All of these are free running 32-bit increasing counters and can generate interrupts. Based onto a maximum value register, each timer can either count from 0 to max, one time then stop (which generates interrupts) or can count from 0 to max and then roll. This commit adds basic support for these timers, the first timer block being used as clocksource/sched_clock and delay, while the others will be used as clockevents. Signed-off-by: Romain Perier <romain.perier@gmail.com> Co-developed-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20211217195727.8955-2-romain.perier@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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a2807f65 |
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12-Nov-2021 |
Biju Das <biju.das.jz@bp.renesas.com> |
clocksource/drivers/renesas,ostm: Make RENESAS_OSTM symbol visible As RZ/G2L uses the ARM Architected Timer as system timer, enabling the OSTM is not mandatory. Make RENESAS_OSTM symbol visible, so that user can enable it when needed. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20211112184413.4391-5-biju.das.jz@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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eda9a4f7 |
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28-Aug-2021 |
Kees Cook <keescook@chromium.org> |
clocksource/drivers/timer-ti-dm: Select TIMER_OF When building OMAP_DM_TIMER without TIMER_OF, there are orphan sections due to the use of TIMER_OF_DELCARE() without CONFIG_TIMER_OF. Select CONFIG_TIMER_OF when enaling OMAP_DM_TIMER: arm-linux-gnueabi-ld: warning: orphan section `__timer_of_table' from `drivers/clocksource/timer-ti-dm-systimer.o' being placed in section `__timer_of_table' Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/lkml/202108282255.tkdt4ani-lkp@intel.com/ Cc: Tony Lindgren <tony@atomide.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Keerthy <j-keerthy@ti.com> Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: linux-omap@vger.kernel.org Fixes: 52762fbd1c47 ("clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support") Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20210828175747.3777891-1-keescook@chromium.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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8602a80b |
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21-Oct-2021 |
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
clocksource/drivers/exynosy: Depend on sub-architecture for Exynos MCT and Samsung PWM The Exynos MCT and Samsung PWM Timer clocksource drivers are not usable on anything else than Samsung Exynos, S3C or S5P SoC platforms. These are integral parts of a SoC. Even though the drivers are not user selectable, still document the hardware architecture explicitly with depends on ARCH_EXYNOS and others. This also serves a purpose of documenting use-case, if someone ever wonders whether to select the driver for his platform. No functional change, because drivers are already selected by the platform described in depends. We follow similar approach also for other SoC-specific drivers. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211021063500.39314-1-krzysztof.kozlowski@canonical.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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1e4fd60b |
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22-Jul-2021 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
clocksource/drivers/pistachio: Make it selectable for MIPS So it will be avilable for generic MIPS kernel. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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2f4574dd |
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31-May-2021 |
Arnd Bergmann <arnd@arndb.de> |
clkdev: remove CONFIG_CLKDEV_LOOKUP This option is now synonymous with CONFIG_HAVE_CLK, so use the latter globally. Any out-of-tree platform ports that still use a private clk_get()/clk_put() implementation should move to CONFIG_COMMON_CLK. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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68e2215e |
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06-Apr-2021 |
Andrea Merello <andrea.merello@gmail.com> |
arm: zynq: don't disable CONFIG_ARM_GLOBAL_TIMER due to CONFIG_CPU_FREQ anymore Now ARM global timer driver could work even if it's source clock rate changes, so we don't need to disable that driver when cpu frequency scaling is in use. This cause Zynq arch to get support for timer delay and get_cycles(). Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: Michal Simek <michal.simek@xilinx.com> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210406130045.15491-3-andrea.merello@gmail.com
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171b45a4 |
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06-Apr-2021 |
Andrea Merello <andrea.merello@gmail.com> |
clocksource/drivers/arm_global_timer: Implement rate compensation whenever source clock changes This patch adds rate change notification support for the parent clock; should that clock change, then we try to adjust the our prescaler in order to compensate (i.e. we adjust to still get the same timer frequency). This is loosely based on what it's done in timer-cadence-ttc. timer-sun51, mips-gic-timer and smp_twd.c also seem to look at their parent clock rate and to perform some kind of adjustment whenever needed. In this particular case we have only one single counter and prescaler for all clocksource, clockevent and timer_delay, and we just update it for all (i.e. we don't let it go and call clockevents_update_freq() to notify to the kernel that our rate has changed). Note that, there is apparently no other way to fixup things, because once we call register_current_timer_delay(), specifying the timer rate, it seems that that rate is not supposed to change ever. In order for this mechanism to work, we have to make assumptions about how much the initial clock is supposed to eventually decrease from the initial one, and set our initial prescaler to a value that we can eventually decrease enough to compensate. We provide an option in KConfig for this. In case we end up in a situation in which we are not able to compensate the parent clock change, we fail returning NOTIFY_BAD. This fixes a real-world problem with Zynq arch not being able to use this driver and CPU_FREQ at the same time (because ARM global timer is fed by the CPU clock, which may keep changing when CPU_FREQ is enabled). Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: Michal Simek <michal.simek@xilinx.com> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210406130045.15491-2-andrea.merello@gmail.com
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7a3b8758 |
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03-Jan-2021 |
Arnd Bergmann <arnd@arndb.de> |
clocksource/drivers/ixp4xx: Select TIMER_OF when needed Compile-testing the ixp4xx timer with CONFIG_OF enabled but CONFIG_TIMER_OF disabled leads to a harmless warning: arm-linux-gnueabi-ld: warning: orphan section `__timer_of_table' from `drivers/clocksource/timer-ixp4xx.o' being placed in section `__timer_of_table' Move the select statement from the platform code into the driver so it always gets enabled in configurations that rely on it. Fixes: 40df14cc5cc0 ("clocksource/drivers/ixp4xx: Add OF initialization support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210103135955.3808976-1-arnd@kernel.org
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a8d80235 |
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20-Jan-2021 |
Arnd Bergmann <arnd@arndb.de> |
clocksource/drivers/prima: Remove sirf prima driver The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210120131559.1971359-5-arnd@kernel.org
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446262b2 |
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20-Jan-2021 |
Arnd Bergmann <arnd@arndb.de> |
clocksource/drivers/atlas: Remove sirf atlas driver The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210120131559.1971359-4-arnd@kernel.org
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8fdb4417 |
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20-Jan-2021 |
Arnd Bergmann <arnd@arndb.de> |
clocksource/drivers/tango: Remove tango driver The tango platform is getting removed, so the driver is no longer needed. Cc: Marc Gonzalez <marc.w.gonzalez@free.fr> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210120131559.1971359-3-arnd@kernel.org
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33105406 |
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20-Jan-2021 |
Arnd Bergmann <arnd@arndb.de> |
clocksource/drivers/u300: Remove the u300 driver The ST-Ericsson U300 platform is getting removed, so this driver is no longer needed. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210120131559.1971359-2-arnd@kernel.org
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523d83ef |
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15-Jan-2021 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
clocksource/drivers/efm32: Drop unused timer code Support for this machine was just removed, so drop the now unused timer code, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210115155130.185010-4-u.kleine-koenig@pengutronix.de
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#
ab310544 |
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28-Oct-2020 |
Kefeng Wang <wangkefeng.wang@huawei.com> |
clocksource/drivers/riscv: Make RISCV_TIMER depends on RISCV_SBI The riscv timer is set via SBI timer call, let's make RISCV_TIMER depends on RISCV_SBI, and it also fixes some build issue. Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems") Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20201028131230.72907-1-wangkefeng.wang@huawei.com
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b6ea209e |
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05-Nov-2020 |
Vineet Gupta <Vineet.Gupta1@synopsys.com> |
clocksource/drivers/nps: Remove EZChip NPS clocksource driver NPS platform has been removed from ARC port and there are no in-tree users of it now. So RIP ! Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20201105212210.1891598-2-vgupta@synopsys.com
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77f6c0b8 |
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23-Sep-2020 |
Arnd Bergmann <arnd@arndb.de> |
timekeeping: remove arch_gettimeoffset With Arm EBSA110 gone, nothing uses it any more, so the corresponding code and the Kconfig option can be removed. Acked-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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2bc3fc87 |
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17-Aug-2020 |
Anup Patel <anup.patel@wdc.com> |
RISC-V: Remove CLINT related code from timer and arch Right now the RISC-V timer driver is convoluted to support: 1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for clocksource and SBI timer calls for clockevent device. 2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO counter register for clocksource and CLINT MMIO compare register for clockevent device. We now have a separate CLINT timer driver which also provide CLINT based IPI operations so let's remove CLINT MMIO related code from arch/riscv directory and RISC-V timer driver. Signed-off-by: Anup Patel <anup.patel@wdc.com> Tested-by: Emil Renner Berhing <kernel@esmil.dk> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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2ac6795f |
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17-Aug-2020 |
Anup Patel <anup.patel@wdc.com> |
clocksource/drivers: Add CLINT timer driver We add a separate CLINT timer driver for Linux RISC-V M-mode (i.e. RISC-V NoMMU kernel). The CLINT MMIO device provides three things: 1. 64bit free running counter register 2. 64bit per-CPU time compare registers 3. 32bit per-CPU inter-processor interrupt registers Unlike other timer devices, CLINT provides IPI registers along with timer registers. To use CLINT IPI registers, the CLINT timer driver provides IPI related callbacks to arch/riscv. Signed-off-by: Anup Patel <anup.patel@wdc.com> Tested-by: Emil Renner Berhing <kernel@esmil.dk> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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5ecafc12 |
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22-Jul-2020 |
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> |
clocksource/drivers/ingenic: Add support for the Ingenic X1000 OST. X1000 and SoCs after X1000 (such as X1500 and X1830) had a separate OST, it no longer belongs to TCU. This driver will register both a clocksource and a sched_clock to the system. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Co-developed-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200722171804.97559-3-zhouyanjie@wanyeetech.com
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a6d0812a |
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07-Jul-2020 |
Anson Huang <Anson.Huang@nxp.com> |
clocksource/drivers/imx: Add support for i.MX TPM driver with ARM64 Allows building and compile-testing the i.MX TPM driver for ARM64. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1594178168-13007-1-git-send-email-Anson.Huang@nxp.com
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#
48b41c5e |
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03-Jun-2020 |
Benjamin Gaignard <benjamin.gaignard@linaro.org> |
clocksource: Add Low Power STM32 timers driver Implement clock event driver using low power STM32 timers. Low power timer counters running even when CPUs are stopped. It could be used as clock event broadcaster to wake up CPUs but not like a clocksource because each it rise an interrupt the counter restart from 0. Low power timers have a 16 bits counter and a prescaler which allow to divide the clock per power of 2 to up 128 to target a 32KHz rate. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Pascal Paillet <p.paillet@st.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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7d7de1a6 |
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21-May-2020 |
Serge Semin <Sergey.Semin@baikalelectronics.ru> |
clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes Currently clocksource framework doesn't support the clocks with variable frequency. Since MIPS GIC timer ticks rate might be unstable on some platforms, we must make sure that it justifies the clocksource requirements. MIPS GIC timer is incremented with the CPU cluster reference clocks rate. So in case if CPU frequency changes, the MIPS GIC tick rate changes synchronously. Due to this the clocksource subsystem can't rely on the timer to measure system clocks anymore. This commit marks the MIPS GIC based clocksource as unstable if reference clock (normally it's a CPU reference clocks) rate changes. The clocksource will execute a watchdog thread, which lowers the MIPS GIC timer rating to zero and fallbacks to a new stable one. Note we don't need to set the CLOCK_SOURCE_MUST_VERIFY flag to the MIPS GIC clocksource since normally the timer is stable. The only reason why it gets unstable is due to the ref clock rate change, which event we detect here in the driver by means of the clocks event notifier. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200521204818.25436-9-Sergey.Semin@baikalelectronics.ru
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83cba953 |
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13-May-2020 |
Johan Hovold <johan@kernel.org> |
clocksource/drivers/rda: drop redundant Kconfig dependency Since commit 2f8a26c166eb ("clocksource: Improve GENERIC_CLOCKEVENTS dependency") all clocksource drivers depend on GENERIC_CLOCKEVENTS so drop the redundant attribute from the RDA-timer entry which was added later. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200513122548.16974-1-johan@kernel.org
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bfed0ede |
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17-Apr-2020 |
Rob Herring <robh@kernel.org> |
clocksource/drivers/versatile: Allow CONFIG_CLKSRC_VERSATILE to be disabled The timer-versatile driver provides a sched_clock for certain Arm Ltd. reference platforms. Specifically, it is used on Versatile and 32-bit VExpress. It is not needed for those platforms with an arch timer (all the 64-bit ones) yet CONFIG_MFD_VEXPRESS_SYSREG does still need to be enabled. In that case, the timer-versatile can only be disabled when COMPILE_TEST is enabled which is not desirable. Let's use the sub-arch kconfig symbols instead. Realview platforms don't have the sysregs that this driver uses so correct the help text. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200417212045.16917-1-robh@kernel.org
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25259f7a |
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26-Apr-2020 |
Michael Ellerman <mpe@ellerman.id.au> |
clocksource/drivers/timer-microchip-pit64b: Select CONFIG_TIMER_OF This driver is an OF driver, it depends on OF, and uses TIMER_OF_DECLARE, so it should select CONFIG_TIMER_OF. Without CONFIG_TIMER_OF enabled this can lead to warnings such as: powerpc-linux-ld: warning: orphan section `__timer_of_table' from `drivers/clocksource/timer-microchip-pit64b.o' being placed in section `__timer_of_table'. Because TIMER_OF_TABLES in vmlinux.lds.h doesn't emit anything into the linker script when CONFIG_TIMER_OF is not enabled. Fixes: 625022a5f160 ("clocksource/drivers/timer-microchip-pit64b: Add Microchip PIT64B support") Cc: stable@vger.kernel.org # v5.6+ Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200426124356.3929682-1-mpe@ellerman.id.au
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ca7b72b5 |
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12-Feb-2020 |
Maarten ter Huurne <maarten@treewalker.org> |
clocksource: Add driver for the Ingenic JZ47xx OST OST is the OS Timer, a 64-bit timer/counter with buffered reading. SoCs before the JZ4770 had (if any) a 32-bit OST; the JZ4770 and JZ4780 have a 64-bit OST. This driver will register both a clocksource and a sched_clock to the system. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200212180408.30872-1-paul@crapouillou.net
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625022a5 |
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13-Dec-2019 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
clocksource/drivers/timer-microchip-pit64b: Add Microchip PIT64B support Add driver for Microchip PIT64B timer. Timer could be used in continuous mode or oneshot mode. The hardware has 2x32 bit registers for period emulating a 64 bit timer. The LSB_PR and MSB_PR registers are used to set the period value (compare value). TLSB and TMSB keeps the current value of the counter. After a compare the TLSB and TMSB register resets. The driver uses PIT64B timer for clocksource or clockevent. First requested timer would be registered as clockevent, second one would be registered as clocksource. Individual PIT64B hardware resources were used for clocksource and clockevent to be able to support high resolution timers with this hardware implementation. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1576235962-30123-3-git-send-email-claudiu.beznea@microchip.com
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#
06293463 |
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27-Nov-2019 |
Randy Dunlap <rdunlap@infradead.org> |
clocksource: Fix Kconfig miscues Fix lots of typo, spelling, punctuation, and grammar miscues in drivers/clocksource/Kconfig. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: John Stultz <john.stultz@linaro.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/4deb42a9-82f2-72f9-891f-972a9a399f4f@infradead.org
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9ca9fe69 |
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20-Nov-2019 |
Krzysztof Kozlowski <krzk@kernel.org> |
clocksource: Fix Kconfig indentation Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191120134236.15959-1-krzk@kernel.org
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22731423 |
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16-Oct-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
clocksource/drivers/renesas-ostm: Convert to timer_of Convert the Renesas OSTM driver to use the timer_of framework. This reduces the driver object size by 367 bytes (with gcc 7.4.0). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191016144747.29538-4-geert+renesas@glider.be
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1ce861ce |
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13-Aug-2019 |
Alexandre Belloni <alexandre.belloni@bootlin.com> |
clocksource/drivers/tcb_clksrc: Register delay timer Implement and register delay timer to allow get_cycles() to work properly. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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34e93683 |
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24-Jul-2019 |
Paul Cercueil <paul@crapouillou.net> |
clocksource: Add a new timer-ingenic driver This driver handles the TCU (Timer Counter Unit) present on the Ingenic JZ47xx SoCs, and provides the kernel with a system timer, a clocksource and a sched_clock. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
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721154f9 |
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24-Jun-2019 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
clocksource/drivers/davinci: Add support for clockevents Currently the clocksource and clockevent support for davinci platforms lives in mach-davinci. It hard-codes many things, uses global variables, implements functionalities unused by any platform and has code fragments scattered across many (often unrelated) files. Implement a new, modern and simplified timer driver and put it into drivers/clocksource. We still need to support legacy board files so export a config structure and a function that allows machine code to register the timer. The timer we're using is 64-bit but can be programmed in dual 32-bit mode (both chained and unchained). On all davinci SoCs except for da830 we're using both halves. Lower half for clockevents and upper half for clocksource. On da830 we're using the lower half for both with the help of a compare register. This patch contains the core code and support for clockevent. The clocksource code will be included in a subsequent patch. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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7117a44b |
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05-Jun-2019 |
Bai Ping <ping.bai@nxp.com> |
clocksource/drivers/sysctr: Add nxp system counter timer driver support The system counter (sys_ctr) is a programmable system counter which provides a shared time base to the Cortex A15, A7, A53 etc cores. It is intended for use in applications where the counter is always powered on and supports multiple, unrelated clocks. The sys_ctr hardware supports: - 56-bit counter width (roll-over time greater than 40 years) - compare frame(64-bit compare value) contains programmable interrupt generation when compare value <= counter value. [dlezcano] Fixed over 80 chars length warning Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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acb4bb3f |
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03-Jun-2019 |
Dmitry Osipenko <digetx@gmail.com> |
clocksource/drivers/tegra: Support COMPILE_TEST universally Remove build dependency on ARM for compile-testing to allow non-arch specific build-bots (like Intel's test robot) to compile the driver and report about problems. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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ec8f24b7 |
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19-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2f982703 |
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26-Apr-2019 |
Alexandre Belloni <alexandre.belloni@bootlin.com> |
clocksource/drivers/timer-atmel-pit: Rework Kconfig option Allow building the PIT driver when COMPILE_TEST is enabled. Also remove its default value so it can be disabled. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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6275f494 |
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26-Apr-2019 |
Alexandre Belloni <alexandre.belloni@bootlin.com> |
clocksource/drivers/tcb_clksrc: Move Kconfig option Move the ATMEL_TCB_CLKSRC option to drivers/clocksource and make it silent if COMPILE_TEST is not selected. Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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dfc82faa |
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08-Apr-2019 |
David Abdurachmanov <david.abdurachmanov@gmail.com> |
clocksource/drivers/sp804: Add COMPILE_TEST to CONFIG_ARM_TIMER_SP804 This is only used on arm and arm64 platforms. Add COMPILE_TEST option. Tested with 5.1-rc3+ on Fedora/RISCV. CONFIG_ARM_TIMER_SP804 no more shows up in riscv config. Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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13e0b405 |
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25-Jan-2019 |
Linus Walleij <linus.walleij@linaro.org> |
clocksource/drivers/ixp4xx: Add driver This adds a new slightly rewritten timer driver for the Intel IXP4xx clocksource, clockevent and delay timer. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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99834eea |
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05-Mar-2019 |
Arnd Bergmann <arnd@arndb.de> |
clocksource/drivers/npcm: select TIMER_OF When this is disabled, we get a link failure: drivers/clocksource/timer-npcm7xx.o: In function `npcm7xx_timer_init': timer-npcm7xx.c:(.init.text+0xf): undefined reference to `timer_of_init' Fixes: 1c00289ecd12 ("clocksource/drivers/npcm: Add NPCM7xx timer driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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b58f28f3 |
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26-Feb-2019 |
Sugaya Taichi <sugaya.taichi@socionext.com> |
clocksource/drivers/timer-milbeaut: Introduce timer for Milbeaut SoCs Add timer driver for Milbeaut SoCs series. The timer has two 32-bit width down counters, one of which is configured as a clockevent device and the other is configured as a clock source. Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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b4822dc7 |
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21-Feb-2019 |
Joseph Lo <josephl@nvidia.com> |
clocksource/drivers/tegra: Add Tegra210 timer support Add support for the Tegra210 timer that runs at oscillator clock (TMR10-TMR13). We need these timers to work as clock event device and to replace the ARMv8 architected timer due to it can't survive across the power cycle of the CPU core or CPUPORESET signal. So it can't be a wake-up source when CPU suspends in power down state. Also convert the original driver to use timer-of API. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
c950ca8c |
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12-Jan-2019 |
Samuel Holland <samuel@sholland.org> |
clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability The Allwinner A64 SoC is known[1] to have an unstable architectural timer, which manifests itself most obviously in the time jumping forward a multiple of 95 years[2][3]. This coincides with 2^56 cycles at a timer frequency of 24 MHz, implying that the time went slightly backward (and this was interpreted by the kernel as it jumping forward and wrapping around past the epoch). Investigation revealed instability in the low bits of CNTVCT at the point a high bit rolls over. This leads to power-of-two cycle forward and backward jumps. (Testing shows that forward jumps are about twice as likely as backward jumps.) Since the counter value returns to normal after an indeterminate read, each "jump" really consists of both a forward and backward jump from the software perspective. Unless the kernel is trapping CNTVCT reads, a userspace program is able to read the register in a loop faster than it changes. A test program running on all 4 CPU cores that reported jumps larger than 100 ms was run for 13.6 hours and reported the following: Count | Event -------+--------------------------- 9940 | jumped backward 699ms 268 | jumped backward 1398ms 1 | jumped backward 2097ms 16020 | jumped forward 175ms 6443 | jumped forward 699ms 2976 | jumped forward 1398ms 9 | jumped forward 356516ms 9 | jumped forward 357215ms 4 | jumped forward 714430ms 1 | jumped forward 3578440ms This works out to a jump larger than 100 ms about every 5.5 seconds on each CPU core. The largest jump (almost an hour!) was the following sequence of reads: 0x0000007fffffffff → 0x00000093feffffff → 0x0000008000000000 Note that the middle bits don't necessarily all read as all zeroes or all ones during the anomalous behavior; however the low 10 bits checked by the function in this patch have never been observed with any other value. Also note that smaller jumps are much more common, with backward jumps of 2048 (2^11) cycles observed over 400 times per second on each core. (Of course, this is partially explained by lower bits rolling over more frequently.) Any one of these could have caused the 95 year time skip. Similar anomalies were observed while reading CNTPCT (after patching the kernel to allow reads from userspace). However, the CNTPCT jumps are much less frequent, and only small jumps were observed. The same program as before (except now reading CNTPCT) observed after 72 hours: Count | Event -------+--------------------------- 17 | jumped backward 699ms 52 | jumped forward 175ms 2831 | jumped forward 699ms 5 | jumped forward 1398ms Further investigation showed that the instability in CNTPCT/CNTVCT also affected the respective timer's TVAL register. The following values were observed immediately after writing CNVT_TVAL to 0x10000000: CNTVCT | CNTV_TVAL | CNTV_CVAL | CNTV_TVAL Error --------------------+------------+--------------------+----------------- 0x000000d4a2d8bfff | 0x10003fff | 0x000000d4b2d8bfff | +0x00004000 0x000000d4a2d94000 | 0x0fffffff | 0x000000d4b2d97fff | -0x00004000 0x000000d4a2d97fff | 0x10003fff | 0x000000d4b2d97fff | +0x00004000 0x000000d4a2d9c000 | 0x0fffffff | 0x000000d4b2d9ffff | -0x00004000 The pattern of errors in CNTV_TVAL seemed to depend on exactly which value was written to it. For example, after writing 0x10101010: CNTVCT | CNTV_TVAL | CNTV_CVAL | CNTV_TVAL Error --------------------+------------+--------------------+----------------- 0x000001ac3effffff | 0x1110100f | 0x000001ac4f10100f | +0x1000000 0x000001ac40000000 | 0x1010100f | 0x000001ac5110100f | -0x1000000 0x000001ac58ffffff | 0x1110100f | 0x000001ac6910100f | +0x1000000 0x000001ac66000000 | 0x1010100f | 0x000001ac7710100f | -0x1000000 0x000001ac6affffff | 0x1110100f | 0x000001ac7b10100f | +0x1000000 0x000001ac6e000000 | 0x1010100f | 0x000001ac7f10100f | -0x1000000 I was also twice able to reproduce the issue covered by Allwinner's workaround[4], that writing to TVAL sometimes fails, and both CVAL and TVAL are left with entirely bogus values. One was the following values: CNTVCT | CNTV_TVAL | CNTV_CVAL --------------------+------------+-------------------------------------- 0x000000d4a2d6014c | 0x8fbd5721 | 0x000000d132935fff (615s in the past) Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> ======================================================================== Because the CPU can read the CNTPCT/CNTVCT registers faster than they change, performing two reads of the register and comparing the high bits (like other workarounds) is not a workable solution. And because the timer can jump both forward and backward, no pair of reads can distinguish a good value from a bad one. The only way to guarantee a good value from consecutive reads would be to read _three_ times, and take the middle value only if the three values are 1) each unique and 2) increasing. This takes at minimum 3 counter cycles (125 ns), or more if an anomaly is detected. However, since there is a distinct pattern to the bad values, we can optimize the common case (1022/1024 of the time) to a single read by simply ignoring values that match the error pattern. This still takes no more than 3 cycles in the worst case, and requires much less code. As an additional safety check, we still limit the loop iteration to the number of max-frequency (1.2 GHz) CPU cycles in three 24 MHz counter periods. For the TVAL registers, the simple solution is to not use them. Instead, read or write the CVAL and calculate the TVAL value in software. Although the manufacturer is aware of at least part of the erratum[4], there is no official name for it. For now, use the kernel-internal name "UNKNOWN1". [1]: https://github.com/armbian/build/commit/a08cd6fe7ae9 [2]: https://forum.armbian.com/topic/3458-a64-datetime-clock-issue/ [3]: https://irclog.whitequark.org/linux-sunxi/2018-01-26 [4]: https://github.com/Allwinner-Homlet/H6-BSP4.9-linux/blob/master/drivers/clocksource/arm_arch_timer.c#L272 Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Cc: stable@vger.kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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7f83a132 |
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10-Dec-2018 |
Manivannan Sadhasivam <mani@kernel.org> |
clocksource/drivers/rda: Add clock driver for RDA8810PL SoC Add clock driver for RDA Micro RDA8810PL SoC supporting OSTIMER and HWTIMER. RDA8810PL has two independent timers: OSTIMER (56 bit) and HWTIMER (64 bit). Each timer provides optional interrupt support. In this driver, OSTIMER is used for clockevents and HWTIMER is used for clocksource. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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92e0d143 |
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04-Dec-2018 |
Anup Patel <anup@brainfault.org> |
clocksource/drivers/riscv_timer: Provide the sched_clock Currently, we don't have a sched_clock registered for RISC-V systems. This means Linux time keeping will use jiffies (running at HZ) as the default sched_clock. To avoid this, we explicity provide sched_clock using RISC-V rdtime instruction (similar to riscv_timer clocksource). Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
bf287607 |
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19-Nov-2018 |
Alexey Brodkin <alexey.brodkin@synopsys.com> |
clocksource/drivers/arc_timer: Utilize generic sched_clock It turned out we used to use default implementation of sched_clock() from kernel/sched/clock.c which was as precise as 1/HZ, i.e. by default we had 10 msec granularity of time measurement. Now given ARC built-in timers are clocked with the same frequency as CPU cores we may get much higher precision of time tracking. Thus we switch to generic sched_clock which really reads ARC hardware counters. This is especially helpful for measuring short events. That's what we used to have: ------------------------------>8------------------------ $ perf stat /bin/sh -c /root/lmbench-master/bin/arc/hello > /dev/null Performance counter stats for '/bin/sh -c /root/lmbench-master/bin/arc/hello': 10.000000 task-clock (msec) # 2.832 CPUs utilized 1 context-switches # 0.100 K/sec 1 cpu-migrations # 0.100 K/sec 63 page-faults # 0.006 M/sec 3049480 cycles # 0.305 GHz 1091259 instructions # 0.36 insn per cycle 256828 branches # 25.683 M/sec 27026 branch-misses # 10.52% of all branches 0.003530687 seconds time elapsed 0.000000000 seconds user 0.010000000 seconds sys ------------------------------>8------------------------ And now we'll see: ------------------------------>8------------------------ $ perf stat /bin/sh -c /root/lmbench-master/bin/arc/hello > /dev/null Performance counter stats for '/bin/sh -c /root/lmbench-master/bin/arc/hello': 3.004322 task-clock (msec) # 0.865 CPUs utilized 1 context-switches # 0.333 K/sec 1 cpu-migrations # 0.333 K/sec 63 page-faults # 0.021 M/sec 2986734 cycles # 0.994 GHz 1087466 instructions # 0.36 insn per cycle 255209 branches # 84.947 M/sec 26002 branch-misses # 10.19% of all branches 0.003474829 seconds time elapsed 0.003519000 seconds user 0.000000000 seconds sys ------------------------------>8------------------------ Note how much more meaningful is the second output - time spent for execution pretty much matches number of cycles spent (we're runnign @ 1GHz here). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org Acked-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
df181e38 |
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04-Nov-2018 |
Anson Huang <anson.huang@nxp.com> |
clocksource/drivers/imx-gpt: Add support for ARM64 This patch allows building and compile-testing the i.MX GPT driver also for ARM64. The delay_timer is only supported on ARMv7. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
85b6fcad |
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15-Nov-2018 |
Linus Walleij <linus.walleij@linaro.org> |
clocksource/drivers/ux500: Drop Ux500 custom SCHED_CLOCK The two drivers used for Ux500 sched_clock use two Kconfig symbols to select which of the two gets used as sched_clock. This isn't right: the workaround is trying to make sure that the NONSTOP timer is used for sched_clock in order to keep that clock ticking consistently over a suspend/resume cycle. (Otherwise sched_clock simply stops during suspend and continues after resume). This will notably affect any timetstamped debug prints, so that they show the absolute number of seconds since the system was booted and does not loose wall-clock time during suspend and resume as if time stood still. The real way to fix this problem is to make sched_clock take advantage of any NONSTOP clock source on the system and adjust accordingly, not to try to work around this by using a different sched_clock depending on what system we are compiling for. This can solve the problem for everyone instead of providing a local solution. Cc: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
33745c3c |
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02-Nov-2018 |
Guo Ren <ren_guo@c-sky.com> |
clocksource/drivers/c-sky: Add gx6605s SOC system timer The driver is for gx6605s SOC system timer and there are two same timers in gx6605s. We use one for clkevt and another one for clksrc. The timer is mmio map to access, so we need give mmio address in dts. The counter at 0x0 offset is clock event. The counter at 0x40 offset is clock source. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
a7ad38b0 |
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02-Nov-2018 |
Guo Ren <ren_guo@c-sky.com> |
clocksource/drivers/c-sky: Add C-SKY SMP timer The driver is for C-SKY SMP timer. It only supports oneshot event and 32bit overflow for clocksource. Per cpu core has one timer and all timers share one clock-counter-input from the same clocksource. This use mfcr&mtcr instructions to access the regs. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
62b01943 |
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04-Aug-2018 |
Palmer Dabbelt <palmer@dabbelt.com> |
clocksource: new RISC-V SBI timer driver The RISC-V ISA defines a per-hart real-time clock and timer, which is present on all systems. The clock is accessed via the 'rdtime' pseudo-instruction (which reads a CSR), and the timer is set via an SBI call. Contains various improvements from Atish Patra <atish.patra@wdc.com>. Signed-off-by: Dmitriy Cherkasov <dmitriy@oss-tech.org> Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> [hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(), minor cleanups, merged hotplug cpu support and other improvements from Atish] Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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#
8a1ece26 |
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07-May-2018 |
Chunyan Zhang <chunyan.zhang@spreadtrum.com> |
clocksource/drivers/sprd: Fix Kconfig dependency SPRD arch doesn't select SPRD_TIMER, so this config would not appear even if ARCH_SPRD is set but COMPILE_TEST not. Fix the dependency of this config with SPRD arch, and set a default value for it, also leave other choices for EXPERT. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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1c00289e |
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08-Mar-2018 |
Tomer Maimon <tmaimon77@gmail.com> |
clocksource/drivers/npcm: Add NPCM7xx timer driver Add Nuvoton BMC NPCM7xx timer driver. The clocksource Enable 24-bit TIMER0 and TIMER1 counters, while TIMER0 serve as clockevent and TIMER1 serve as clocksource. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Brendan Higgins <brendanhiggins@xxxxxxxxxx> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
bd2746f0 |
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06-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
clocksource/atmel-st: Add 'depends on HAS_IOMEM' to fix unmet dependency The ATMEL_ST config selects MFD_SYSCON, but does not depend on HAS_IOMEM. Compile testing on architecture without HAS_IOMEM causes "unmet direct dependencies" in Kconfig phase. Detected by "make ARCH=score allyesconfig". Add the proper dependency to the ATMEL_ST config. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1520335233-11277-1-git-send-email-yamada.masahiro@socionext.com
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#
b79a7325 |
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21-Feb-2018 |
James Hogan <jhogan@kernel.org> |
clocksource: Remove metag generic timer driver Now that arch/metag/ has been removed, remove the metag generic per-thread timer driver. It is of no value without the architecture code. Signed-off-by: James Hogan <jhogan@kernel.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-metag@vger.kernel.org
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af04aa85 |
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14-Feb-2018 |
Keerthy <j-keerthy@ti.com> |
ARM: OMAP: Move dmtimer driver out of plat-omap to drivers under clocksource Move the dmtimer driver out of plat-omap to clocksource. So that non-omap devices also could use this. No Code changes done to the driver file only renamed to timer-ti-dm.c. Also removed the config dependencies for OMAP_DM_TIMER. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Tested-by: Ladislav Michl <ladis@linux-mips.org> [tony@atomide.com: add select omap_dm_timer for omap16xx] Signed-off-by: Tony Lindgren <tony@atomide.com>
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#
35dbb74a |
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11-Dec-2017 |
Rick Chen <rickchen36@gmail.com> |
clocksource/drivers/atcpit100: Add andestech atcpit100 timer ATCPIT100 is often used on the Andes architecture, This timer provide 4 PIT channels. Each PIT channel is a multi-function timer, can be configured as 32,16,8 bit timers or PWM as well. For system timer it will set channel 1 32-bit timer0 as clock source and count downwards until underflow and restart again. It also set channel 0 32-bit timer0 as clock event and count downwards until condition match. It will generate an interrupt for handling periodically. Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Add andestech atcpit100 timer
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#
d04af490 |
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08-Jan-2018 |
Benjamin Gaignard <benjamin.gaignard@st.com> |
clocksource/drivers/stm32: Convert the driver to timer_of primitives Convert the driver to use the timer_of() helpers. This allows the removal of a custom private structure, factors out and simplifies the code. [Daniel Lezcano]: Respin against the critical fix patch and massaged the changelog. Tested-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Benjamin Gaignard <benjamin.gaignard@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1515418139-23276-12-git-send-email-daniel.lezcano@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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#
067bc914 |
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08-Jan-2018 |
Baolin Wang <baolin.wang@spreadtrum.com> |
clocksource/drivers/spreadtrum: Add timer driver for the Spreadtrum SC9860 platform The Spreadtrum SC9860 platform will use the architected timers as local clock events, but we also need a broadcast timer device to wake up the CPUs when the CPUs are in sleep mode. The Spreadtrum timer can support 32-bit or 64-bit counters, as well as supporting period mode or one-shot mode. Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Philippe Ombredanne <pombredanne@nexb.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1515418139-23276-8-git-send-email-daniel.lezcano@linaro.org [ Minor readability edits. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
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#
2f8a26c1 |
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05-Sep-2017 |
Arnd Bergmann <arnd@arndb.de> |
clocksource: Improve GENERIC_CLOCKEVENTS dependency We regularly run into build errors when a clocksource driver selects CONFIG_TIMER_OF while CONFIG_GENERIC_CLOCKEVENTS is disabled: In file included from drivers/clocksource/timer-of.c:25:0: drivers/clocksource/timer-of.h:35:28: error: field 'clkevt' has incomplete type At the moment, three drivers can show this behavior: ARMV7M_SYSTICK, CLKSRC_ST_LPC and CLKSRC_NPS. We could add further dependencies as we did many times, but I have looked a little bit more at what architectures are left that don't use GENERIC_CLOCKEVENTS, and this shows that there is a better solution. On arch/frv and arch/ia64, we never select CONFIG_GENERIC_CLOCKEVENTS and we also don't use ARCH_USES_GETTIMEOFFSET, which would block the clocksource Kconfig menu. On m68k, some platforms use CONFIG_GENERIC_CLOCKEVENTS, some use ARCH_USES_GETTIMEOFFSET, and some use neither of them. The good news is that there is no configuration that does not set CONFIG_GENERIC_CLOCKEVENTS but that wants to enable any of the Kconfig symbols in the menu, so we can simply replace the dependency with the stricter one. While in theory one could have a clocksource driver without the clockevent infrastructure, this seems unlikely to be relevant in the future any more. We can probably drop some of the other dependencies as well now, e.g. there should generally be no reason to depend on CONFIG_ARM unless the driver uses architecture specific assembly. Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
059ab7b8 |
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01-Aug-2017 |
Dong Aisheng <aisheng.dong@nxp.com> |
clocksource/drivers/imx-tpm: Add imx tpm timer support IMX Timer/PWM Module (TPM) supports both timer and pwm function while this patch only adds the timer support. PWM would be added later. The TPM counter, compare and capture registers are clocked by an asynchronous clock that can remain enabled in low power modes. NOTE: We observed in a very small probability, the bus fabric contention between GPU and A7 may results a few cycles delay of writing CNT registers which may cause the min_delta event got missed, so we need add a ETIME check here in case it happened. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
599dc457 |
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18-Jul-2017 |
Matt Redfearn <matt.redfearn@mips.com> |
clocksource/drivers/Kconfig: Fix CLKSRC_PISTACHIO dependencies In v4.13, CLKSRC_PISTACHIO can select TIMER_OF on architectures without GENERIC_CLOCKEVENTS, resulting in a struct clock_event_device missing some required features and build breakage compiling timer_of.c. One of the symbols selecting TIMER_OF is CLKSRC_PISTACHIO, so add the dependency on GENERIC_CLOCKEVENTS. Thanks to kbuild test robot for finding this error (https://lkml.org/lkml/2017/7/16/249) Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Suggested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
239751ed |
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06-Jun-2017 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/sun4i: Switch to the timer-of common init Previously a framework to factor out the drivers init function has been merged. Use this common framework in this driver, we get: Before: text data bss dec hex filename 1787 384 12 2183 887 drivers/clocksource/sun4i_timer.o After: text data bss dec hex filename 1407 512 0 1919 77f drivers/clocksource/sun4i_timer.o Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Chen-Yu Tsai <wens@csie.org>
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#
4be78a86 |
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23-Feb-2017 |
Andreas Färber <afaerber@suse.de> |
clocksource: Add Owl timer The Actions Semi S500 SoC provides four timers, 2Hz0/1 and 32-bit TIMER0/1. Use TIMER0 as clocksource and TIMER1 as clockevents. Based on LeMaker linux-actions tree. An S500 datasheet can be found on the LeMaker Guitar pages: http://www.lemaker.org/product-guitar-download-29.html Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
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dc11bae7 |
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04-Jun-2017 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers: Add timer-of common init routine The different drivers are all using the same pattern when initializing. 1. Get the base address 2. Get the irq number 3. Get the clock 4. Prepare and enable the clock 5. Get the rate 6. Request an interrupt Instead of repeating again and again these steps in all the drivers, let's provide a common init routine to give the opportunity to factor all of them out. We can expect a significant kernel size improvement when the common routine will be used in all the drivers. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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fa1bffab |
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26-May-2017 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers: Rename CLKSRC_ACPI to TIMER_ACPI The config option name is now renamed to 'TIMER_ACPI' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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#
bb0eb050 |
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26-May-2017 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers: Rename CLKSRC_OF to TIMER_OF The config option name is now renamed to 'TIMER_OF' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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#
8e093102 |
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26-May-2017 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
Revert "clockevents: Add a clkevt-of mechanism like clksrc-of" After discussing it, this feature is dropped as it is not considered adequate: https://patchwork.kernel.org/patch/9639317/ There is no user of this macro yet, so there is no impact on the drivers. This reverts commit 376bc27150f180d9f5eddec6a14117780177589d. Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
ec14ba1e |
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18-May-2017 |
Linus Walleij <linus.walleij@linaro.org> |
clocksource/drivers/fttmr010: Merge Moxa into FTTMR010 This merges the Moxa Art timer driver into the Faraday FTTMR010 driver and replaces all Kconfig symbols to use the Faraday driver instead. We are now so similar that the drivers can be merged by just adding a few lines to the Faraday timer. Differences: - The Faraday driver explicitly sets the counter to count upwards for the clocksource, removing the need for the clocksource core to invert the value. - The Faraday driver also handles sched_clock() On the Aspeed, the counter can only count downwards, so support the timers in downward-counting mode as well, and flag the Aspeed to use this mode. This mode was tested on the Gemini so I have high hopes that it'll work fine on the Aspeed as well. After this we have one driver for all three SoCs and a generic Faraday FTTMR010 timer driver, which is nice. Cc: Joel Stanley <joel@jms.id.au> Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
f5bf0ee4 |
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24-Mar-2017 |
Linus Walleij <linus.walleij@linaro.org> |
clocksource/drivers/gemini: Rename Gemini timer to Faraday After some research it turns out that the "Gemini" timer is actually a generic IP block from Faraday Technology named FTTMR010, so as to not make things too confusing we need to rename the driver and its symbols to make sense. The implementation remains the same in this patch but we fix the copy-paste error in the timer name "nomadik_mtu" as we're at it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
5e0a39d0 |
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31-Jan-2017 |
Alexander Kochetkov <al.kochet@gmail.com> |
clocksource/drivers/rockchip_timer: Implement clocksource timer The clock supplying the arm-global-timer on the rk3188 is coming from the the cpu clock itself and thus changes its rate everytime cpufreq adjusts the cpu frequency making this timer unsuitable as a stable clocksource and sched clock. The rk3188, rk3288 and following socs share a separate timer block already handled by the rockchip-timer driver. Therefore adapt this driver to also be able to act as clocksource and sched clock on rk3188. In order to test clocksource you can run following commands and check how much time it take in real. On rk3188 it take about ~45 seconds. cpufreq-set -f 1.6GHZ date; sleep 60; date In order to use the patch you need to declare two timers in the dts file. The first timer will be initialized as clockevent provider and the second one as clocksource. The clockevent must be from alive subsystem as it used as backup for the local timers at sleep time. The patch does not break compatibility with older device tree files. The older device tree files contain only one timer. The timer will be initialized as clockevent, as expected. rk3288 (and probably anything newer) is irrelevant to this patch, as it has the arch timer interface. This patch may be useful for Cortex-A9/A5 based parts. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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fa8d815f |
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26-Jan-2017 |
Marc Zyngier <maz@kernel.org> |
arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Cortex-A73 (all versions) counter read can return a wrong value when the counter crosses a 32bit boundary. The workaround involves performing the read twice, and to return one or the other depending on whether a transition has taken place. Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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bb42ca47 |
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06-Feb-2017 |
Ding Tianhong <dingtianhong@huawei.com> |
clocksource/drivers/arm_arch_timer: Work around Hisilicon erratum 161010101 Erratum Hisilicon-161010101 says that the ARM generic timer counter "has the potential to contain an erroneous value when the timer value changes". Accesses to TVAL (both read and write) are also affected due to the implicit counter read. Accesses to CVAL are not affected. The workaround is to reread the system count registers until the value of the second read is larger than the first one by less than 32, the system counter can be guaranteed not to return wrong value twice by back-to-back read and the error value is always larger than the correct one by 32. Writes to TVAL are replaced with an equivalent write to CVAL. Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> [Mark: split patch, fix Kconfig, reword commit message] Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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16d10ef2 |
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06-Feb-2017 |
Ding Tianhong <dingtianhong@huawei.com> |
clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure Currently we have code inline in the arch timer probe path to cater for Freescale erratum A-008585, complete with ifdeffery. This is a little ugly, and will get worse as we try to add more errata handling. This patch refactors the handling of Freescale erratum A-008585. Now the erratum is described in a generic arch_timer_erratum_workaround structure, and the probe path can iterate over these to detect errata and enable workarounds. This will simplify the addition and maintenance of code handling Hisilicon erratum 161010101. Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> [Mark: split patch, correct Kconfig, reword commit message] Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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fb6002a8 |
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27-Jan-2017 |
Chris Brandt <chris.brandt@renesas.com> |
clocksource/drivers/ostm: Add renesas-ostm timer driver This patch adds a OSTM driver for the Renesas architecture. The OS Timer (OSTM) has independent channels that can be used as a freerun or interval times. This driver uses the first probed device as a clocksource and then any additional devices as clock events. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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4750535b |
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22-Jan-2017 |
Linus Walleij <linus.walleij@linaro.org> |
clocksource/drivers/gemini: Add driver for the Cortina Gemini This is a rewrite of the Gemini timer driver in arch/arm/mach-gemini/timer.c trying to do everything the device tree way: - Make every IO-access relative to a base address and dynamic so we can do a dynamic ioremap and get going. - Do not poke around directly in the global syscon registers, access them using the syscon regmap style design pattern for the one register we need to check. - Find register range and interrupt from the device tree. Cc: Janos Laube <janos.dev@gmail.com> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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376bc271 |
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19-Apr-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clockevents: Add a clkevt-of mechanism like clksrc-of The current code uses the CLOCKSOURCE_OF_DECLARE macro to fill the clksrc table with a t-uple (name, init_function). Unfortunately it ends up to the clockevent and the clocksource being both initialized with this macro. It is not a problem by itself but there is not a clear distinction between a clockevent and a clocksource in the code initialization path. Somebody can argue there are the same IP block and the same DT node. But conceptually from the software side, there are two distincts entities and as is they should be initialized separetely. Some drivers which do not have a clocksource end up by using the CLOCKSOURCE_OF_DECLARE macro to declare a clockevent. Another result is the fuzzy organization in the clocksource directory, where the clockevents are implemented in the same file than the clocksources or file labelled timer-something implementing a clocksource. This patch provides another macro to specifically declare a clockevent in the same way than the clocksource and gives the opportunity to write two separate drivers, one for the clocksource and another for the clockevents. Hopefully, that can help to do some housework in the directory, perhaps split the drivers in to entities, for example: - clksrc-rockchip.c - clkevt-rockchip.c Also, it gives the possibility to declare clocksources separately in the DT and then use a clocksource from IP block while while clockevents are used from another IP block. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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c4c9a040 |
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31-Oct-2016 |
Vineet Gupta <vgupta@synopsys.com> |
clocksource: import ARC timer driver This adds support for - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP from @CNT to @LIMIT, before optionally triggering an interrupt. These are programmed using ARC auxiliary register interface. These are present in all ARC cores (ARC700 and ARC HS38) TIMER0 serves as clockevent for all ARC linux builds. TIMER1 is used for clocksource in arc700 builds. - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in ARC HS38 cores. These are independnet IP blocks with different programming model respectively. Link: http://lkml.kernel.org/r/20161111231132.GA4186@mai Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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9995f4f1 |
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13-Oct-2016 |
Rich Felker <dalias@libc.org> |
clocksource: Add J-Core timer/clocksource driver At the hardware level, the J-Core PIT is integrated with the interrupt controller, but it is represented as its own device and has an independent programming interface. It provides a 12-bit countdown timer, which is not presently used, and a periodic timer. The interval length for the latter is programmable via a 32-bit throttle register whose units are determined by a bus-period register. The periodic timer is used to implement both periodic and oneshot clock event modes; in oneshot mode the interrupt handler simply disables the timer as soon as it fires. Despite its device tree node representing an interrupt for the PIT, the actual irq generated is programmable, not hard-wired. The driver is responsible for programming the PIT to generate the hardware irq number that the DT assigns to it. On SMP configurations, J-Core provides cpu-local instances of the PIT; no broadcast timer is needed. This driver supports the creation of the necessary per-cpu clock_event_device instances. A nanosecond-resolution clocksource is provided using the J-Core "RTC" registers, which give a 64-bit seconds count and 32-bit nanoseconds that wrap every second. The driver converts these to a full-range 32-bit nanoseconds count. Signed-off-by: Rich Felker <dalias@libc.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/b591ff12cc5ebf63d1edc98da26046f95a233814.1476393790.git.dalias@libc.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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f6dc1576 |
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22-Sep-2016 |
Scott Wood <oss@buserror.net> |
arm64: arch_timer: Work around QorIQ Erratum A-008585 Erratum A-008585 says that the ARM generic timer counter "has the potential to contain an erroneous value for a small number of core clock cycles every time the timer value changes". Accesses to TVAL (both read and write) are also affected due to the implicit counter read. Accesses to CVAL are not affected. The workaround is to reread TVAL and count registers until successive reads return the same value. Writes to TVAL are replaced with an equivalent write to CVAL. The workaround is to reread TVAL and count registers until successive reads return the same value, and when writing TVAL to retry until counter reads before and after the write return the same value. The workaround is enabled if the fsl,erratum-a008585 property is found in the timer node in the device tree. This can be overridden with the clocksource.arm_arch_timer.fsl-a008585 boot parameter, which allows KVM users to enable the workaround until a mechanism is implemented to automatically communicate this information. This erratum can be found on LS1043A and LS2080A. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Scott Wood <oss@buserror.net> [will: renamed read macro to reflect that it's not usually unstable] Signed-off-by: Will Deacon <will.deacon@arm.com>
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f1a4c1f3 |
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24-Aug-2016 |
Chanwoo Choi <cw00.choi@samsung.com> |
clocksource: exynos_mct: Add the support for ARM64 This patch allows building and compile-testing the driver also for ARM64. The delay_timer is only supported on ARMv7. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> [k.kozlowski: Adjusted commit msg] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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46fd5c6b |
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27-Jun-2016 |
Will Deacon <will@kernel.org> |
clocksource/drivers/arm_arch_timer: Control the evtstrm via the cmdline Disabling the eventstream can be useful for both remotely debugging a deployed production system and development of code using WFE-based polling loops. Whilst this can currently be controlled via a Kconfig option (CONFIG_ARM_ARCH_TIMER_EVTSTREAM), it's often desirable to toggle the feature on the command line, so this patch adds a new command-line option ("clocksource.arm_arch_timer.evtstrm") to do just that. The default behaviour is determined based on CONFIG_ARM_ARCH_TIMER_EVTSTREAM. Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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5cc87a4d |
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07-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/versatile: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach, allowing the user to compile the driver on different platforms. The current option let the user to select the clocksource or not. The Kconfig option policy is to let the platform to select the timer automatically. Add the COMPILE_TEST option, so the prompt to select the driver will be showed only when COMPILE_TEST is set and will let this driver to compile on different platform, thus increasing the compilation test coverage. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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b988d3f0 |
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06-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/timer-atmel-st: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach, allowing the user to compile the driver on different platforms. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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67a87a43 |
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06-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/arm_global_timer: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach, allowing the user to compile the driver on different platforms. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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568c0342 |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/integrator-ap: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_INTEGRATOR_AP_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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c12547a0 |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/keystone: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_KEYSTONE_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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d683b9dc |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/nspire: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_NSPIRE_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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85f98db4 |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/u300: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_U300_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Due on the delay specific code, this driver will compile only on the ARM architecture. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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f3550d49 |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/prima2: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_PRIMA2_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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d81c50a0 |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/mxs: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_MXS_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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419be9e3 |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/moxart: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_MOXART_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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b56d5d21 |
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03-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/atlas7: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_ATLAS7_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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ecf0efdc |
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02-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/clps_711x: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_CLPS711X_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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1cad71e3 |
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02-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/bcm_kona: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_BCM_KONA_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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e2146d86 |
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02-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/armv7m_systick: Add the COMPILE_TEST option In order to increase the compilation test coverage, add the COMPILE_TEST so the driver can be compiled even if it does not belong to the platform or the architecture. The io.h header inclusion is also added as it the driver does not compile on UM platform. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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2ea879a7 |
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02-Jun-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/bcm2835: Add the COMPILE_TEST option Change the Kconfig option logic to fullfil with the current approach. A new Kconfig option is added, CONFIG_BCM2835_TIMER and is selected by the platform. Then the clocksource's Kconfig is changed to make this option selectable by the user if the COMPILE_TEST option is set. Otherwise, it is up to the platform's Kconfig to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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89355274 |
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14-Jun-2016 |
Neil Armstrong <narmstrong@baylibre.com> |
clocksource/drivers/oxnas-rps: Add Oxford Semiconductor RPS Dual Timer Add clocksource and clockevent driver from dual RPS timer. The HW provides a dual one-shot or periodic 24bit timers, the drivers set the first one as tick event source and the second as a continuous scheduler clock source. The timer can use 1, 16 or 256 as pre-dividers, thus the clocksource uses 16 by default. CC: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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de37b0b5 |
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16-Jun-2016 |
Alexandre Belloni <alexandre.belloni@bootlin.com> |
clocksource/drivers/samsung_pwm: Fix typo in Kconfig Correct the typo in "driver" word in the option description. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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a5322457 |
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17-Oct-2015 |
Noam Camus <noamc@ezchip.com> |
clocksource: Add NPS400 timers driver Add internal tick generator which is shared by all cores. Each cluster of cores view it through dedicated address. This is used for SMP system where all CPUs synced by same clock source. Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: John Stultz <john.stultz@linaro.org> Acked-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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0302637f |
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25-Apr-2016 |
Vladimir Murzin <vladimir.murzin@arm.com> |
clockevents/driversi/mps2: add MPS2 Timer driver MPS2 platform has simple 32 bits general purpose countdown timers. The driver uses the first detected timer as a clocksource and the rest of the timers as a clockevent Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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1b18fd20 |
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09-Feb-2016 |
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> |
clocksource/drivers/lpc32xx: Support timer-based ARM delay This commit implements the ARM timer-based delay timer for the LPC32xx, LPC18xx, LPC43xx family of SoCs. Also, add a dependency to restrict compiling this driver for the ARM architecture. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Joachim Eastwood <manabian@gmail.com>
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d7023e62 |
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25-Jan-2016 |
Richard Weinberger <richard@nod.at> |
clocksource: Fix dependencies for archs w/o HAS_IOMEM Not every arch has io memory. So, unbreak the build by fixing the dependencies. Signed-off-by: Richard Weinberger <richard@nod.at> Cc: user-mode-linux-devel@lists.sourceforge.net Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1453760661-1444-21-git-send-email-richard@nod.at Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2be6d9bf |
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25-Jan-2016 |
Arnd Bergmann <arnd@arndb.de> |
clocksource: Select CLKSRC_MMIO where needed The Tegra clocksource implementation uses the clocksource_mmio helper functions, but currently can be configured without them, which fails: drivers/clocksource/built-in.o: In function `tegra20_init_timer': :(.init.text+0xac): undefined reference to `clocksource_mmio_init' :(.init.text+0x140): undefined reference to `clocksource_mmio_readl_up' The same problem exists for Digicolor: drivers/clocksource/built-in.o: In function `digicolor_timer_init': :(.init.text+0xfa): undefined reference to `clocksource_mmio_init' :(.init.text+0x14c): undefined reference to `clocksource_mmio_readl_down' I've inspected the Kconfig file to look for other cases that I have not yet run into, and added an explicit 'select' to each one to ensure we can successfully link the drivers. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1453737776-1960372-1-git-send-email-arnd@arndb.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
03724ac3 |
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08-Jan-2016 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/fsl_ftm_timer: Fix CLKSRC_MMIO dependency Select CLKSRC_MMIO when FSL_FTM_TIMER is enabled. Otherwise it fails to compile on i386 with COMPILE_TEST=y. " on i386: when CLKSRC_MMIO is not enabled: drivers/built-in.o: In function `ftm_timer_init': fsl_ftm_timer.c:(.init.text+0x6842): undefined reference to `clocksource_mmio_readl_up' fsl_ftm_timer.c:(.init.text+0x6855): undefined reference to `clocksource_mmio_init' " Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
863ee050 |
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02-Jan-2016 |
Richard Weinberger <richard@nod.at> |
clocksource/drivers: Fix dependencies for !HAS_IOMEM archs Not every arch has io memory. So, unbreak the build by fixing the dependencies. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
0881841f |
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13-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/tango-xtal: Replace code by clocksource_mmio_init The current code to initialize, register and read the clocksource is already factored out in mmio.c via the clocksource_mmio_init function. Factor out the code with the clocksource_mmio_init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
46e7c3c6 |
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09-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/h8300: Increase the compilation test coverage Add the COMPILE_TEST option so the drivers can be compiled on different architecture with the 'allyesconfig' kernel configuration. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
97a23beb |
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09-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/h8300_timer8: Separate the Kconfig option from the arch The current Kconfig option is the H8300 arch option. In order to comply to the current rule, let's create a specific option for the timer8 and select it from the arch's Kconfig. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
0901f184 |
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04-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/Kconfig: Add missing GENERIC_CLOCKEVENTS dependency In order to compile on all arch without error with 'allyesconfig' make sure the platform selected the GENERIC_CLOCKEVENTS. Without this patch the new added drivers will prevent the kernel to compile on PARISC. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
ef49336b |
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02-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/fsl-ftm: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
778c5696 |
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01-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/samsung-pwm: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
39366ef4 |
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01-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/exynos_mct: Fix Kconfig and add COMPILE_TEST option Let the platform's Kconfig to select the clock instead of having a reverse dependency from the driver to the platform options. Add the COMPILE_TEST option for the compilation test coverage. Due to the non portable 'delay' code, this driver is only compilable on ARM. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
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#
1becd6ed |
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01-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/prcmu: Fix Kconfig and add COMPILE_TEST option Let the platform's Kconfig to select the clock instead of having a reverse dependency from the driver to the platform options. Add the COMPILE_TEST option for the compilation test coverage. This change is debatable as the option itself in the Kconfig allows to select the driver for the platform or not. This change will make the prcmu timer always selected. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
70329653 |
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01-Nov-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/nomadik_mtu: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the non portable code for the delay timer, this option is only available for the ARM architecture. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
ddcf48c7 |
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31-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/lpc32xx: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
b9755841 |
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31-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/asm9260: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
57f49318 |
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31-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/cadence_ttc: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. The driver depends on the common clock framework, thus the dependency added on COMMON_CLK. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
b4bdf7ef |
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31-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/vt8500: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
adce4bc8 |
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31-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/tegra2: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the non portable code for the delay timer, this option is only available for the ARM architecture. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
f0c5afb7 |
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31-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/sun5i: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. The driver depends on the common clock framework, thus the dependency added on COMMON_CLK. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
b4fcd48b |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/sun4i: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
5b097f6b |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/dw_apb: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
e6c1db13 |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/digicolor: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
c9165549 |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/orion: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. The driver is using the atomic_io API which is not portable, so the compilation is restricted to ARM only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
0b7a7bb7 |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/meson6: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
9519e80c |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/armada-370-xp: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the non portable 'delay' code, the compilation is restricted to the ARM architecture only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
40ada2aa |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/rockchip: Add COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Due to the dsb() usage in the driver, this driver is only compilable on ARM and ARM64. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
fbca9eab |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/mediatek: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
dfdb1652 |
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30-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/pistachio: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
5a7351f0 |
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29-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/tango: Add COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
5ae996cb |
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09-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/pxa_timer: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
389d9b58 |
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09-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/pxa_timer: Move the Kconfig rule Instead of having the clocksource's Kconfig depending on the arch, let the arch to select the timer it needs. The CLKSRC_OF dependency is removed because already selected by the ARCH_PXA, and it is added for SA1100. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
baacaf83 |
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09-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/st_lpc: Add the COMPILE_TEST option Increase the compilation test coverage by adding the COMPILE_TEST option. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
2ffdf71b |
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09-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/st_lpc: Fix Kconfig dependency Change the Kconfig selection rule by letting the STI arch to select the timer. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
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#
3dc0e9f6 |
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09-Oct-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clocksource/drivers/qcom: Make COMPILE_TEST enabled for ARM architecture In order to be consistent with the rest of the drivers compilation, let's introduce the COMPILE_TEST option. Unfortunately, the delay.h code is not portable, so the compilation test coverage will be restricted to the ARM architecture. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
3da6d49e |
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16-Nov-2015 |
Arnd Bergmann <arnd@arndb.de> |
clocksource: Disallow drivers for ARCH_USES_GETTIMEOFFSET We can now select clocksource drivers like ti-32k and CONFIG_OF on ancient machines that still use gettimeoffset, and the combination results in a link error. arch/arm/kernel/built-in.o: In function `time_init': (.init.text+0xc28): undefined reference to `clocksource_probe' The reason for this is that the Makefile is hidden behind CONFIG_ARCH_USES_GETTIMEOFFSET, but the Kconfig file is not, and it has shown up just now because the ti-32k driver was added and can be selected using COMPILE_TEST on all platforms. This patch hides the Kconfig menu in CONFIG_ARCH_USES_GETTIMEOFFSET as well. Fixes: dfedaf105d60 "clocksource: ti-32k: make it depend on GENERIC_CLOCKSOURCE" Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Felipe Balbi <balbi@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/7579471.4N90fYPQOK@wuerfel Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
dfedaf10 |
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16-Oct-2015 |
Felipe Balbi <balbi@ti.com> |
clocksource: ti-32k: make it depend on GENERIC_CLOCKSOURCE the new ti 32k clocksource driver should depend on GENERIC_CLOCKSOURCE because of its reliance on sched_clock_register(). Let's enable that to avoid any possible build errors and/or warnings on randbuilds. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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#
fe851f56 |
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29-Sep-2015 |
Felipe Balbi <balbi@ti.com> |
clocksource: add TI 32.768 Hz counter driver Introduce a new clocksource driver for Texas Instruments 32.768 Hz device which is available on most OMAP-like devices. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
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#
ccd63ce4 |
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09-Oct-2015 |
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> |
clocksource/drivers/tango_xtal: Add new timer for Tango SoCs Sigma Designs Tango platforms provide a 27 MHz crystal oscillator. Use it for clocksource, sched_clock, and delay_timer. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
ae281cbd |
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28-Sep-2015 |
Marc Zyngier <maz@kernel.org> |
clocksource / arm_arch_timer: Convert to ACPI probing It is now absolutely trivial to convert the arch timer driver to use ACPI probing, just like its DT counterpart. Let's enjoy another crapectomy. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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#
aad83b15 |
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28-Sep-2015 |
Marc Zyngier <maz@kernel.org> |
clocksource: Add new CLKSRC_{PROBE,ACPI} config symbols The clocksource probing infrastructure currently depends on CONFIG_CLKSRC_OF, which depends on CONFIG_OF. In order to make this infrastructure selectable even if CONFIG_OF is not selected, introduce a new CONFIG_CLKSRC_PROBE (which allow the infrastructure to be compiled in), and CONFIG_CLKSRC_ACPI (which is the pendent of CONFIG_CLKSRC_OF for ACPI). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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#
84583983 |
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07-Aug-2015 |
Ezequiel Garcia <ezequiel.garcia@imgtec.com> |
CLOCKSOURCE: Add Pistachio clocksource-only driver The Pistachio SoC provides four general purpose timers, and allow to implement a clocksource driver. This driver can be used as a replacement for the MIPS GIC and MIPS R4K clocksources and sched clocks, which are clocked from the CPU clock. Given the general purpose timers are clocked from an independent clock, this new clocksource driver will be useful to introduce CPUFreq support for Pistachio machines. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
02760b11 |
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17-Jun-2015 |
Antonio Borneo <borneo.antonio@gmail.com> |
clockevents/drivers/Kconfig: Replace USE_OF with OF USE_OF is used as intermediate Kconfig option by few arch's (ARM, MIPS, Xtensa); in all these cases it implies setting option OF too. Replace the only instance of USE_OF in clocksource with OF. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
70bef01c |
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26-May-2015 |
Lee Jones <lee.jones@linaro.org> |
clocksource: sti: Provide support for the ST LPC Clocksource IP This IP is shared with Watchdog and RTC functionality. All 3 of these devices are mutually exclusive from one another i.e. Only 1 IP can be used at any given time. We use the device-driver model combined with a DT 'mode' property to enforce this. The ST LPC Clocksource IP can be used as the system (tick) timer. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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#
002af195 |
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23-Jun-2015 |
Guenter Roeck <linux@roeck-us.net> |
ARM: Fix build if CLKDEV_LOOKUP is not configured mips:allmodconfig fails to build with drivers/clocksource/timer-sp804.c: In function '__sp804_clocksource_and_sched_clock_init': drivers/clocksource/timer-sp804.c:88:3: error: implicit declaration of function 'clk_get_sys' because CLKDEV_LOOKUP is not configured and the driver depends on it. Fixes: 0b7402dce445 ("ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource") Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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#
618b902d |
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27-Jan-2015 |
Yoshinori Sato <ysato@users.sourceforge.jp> |
h8300: clocksource h8300_timer8: 8bit clockevent device h8300_timer16 / h8300_tpu: 16bit clocksource Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
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#
1cb6c215 |
|
20-Jun-2015 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
clocksource: Increase dependencies of timer-stm32 to limit build wreckage This driver leaks out into arch/parisc builds that don't have CONFIG_GENERIC_CLOCKEVENTS, leading to the following (truncated) wreckage: CC drivers/clocksource/timer-stm32.o drivers/clocksource/timer-stm32.c:38:28: error: field 'evtdev' has incomplete type drivers/clocksource/timer-stm32.c:44:19: warning: 'enum clock_event_mode' declared inside parameter list drivers/clocksource/timer-stm32.c:44:19: warning: its scope is only this definition or declaration, which is probably not what you want drivers/clocksource/timer-stm32.c:43:62: error: parameter 1 ('mode') has incomplete type drivers/clocksource/timer-stm32.c:43:13: error: function declaration isn't a prototype drivers/clocksource/timer-stm32.c: In function 'stm32_clock_event_set_mode': drivers/clocksource/timer-stm32.c:47:3: error: type defaults to 'int' in declaration of '__mptr' drivers/clocksource/timer-stm32.c:47:3: warning: initialization from incompatible pointer type drivers/clocksource/timer-stm32.c:51:7: error: 'CLOCK_EVT_MODE_PERIODIC' undeclared (first use in this function) drivers/clocksource/timer-stm32.c:51:7: note: each undeclared identifier is reported only once for each function it appears in drivers/clocksource/timer-stm32.c:56:7: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) Tighten up the dependencies to limit where it gets built by copying the style of the Kconfig line for CLKSRC_EFM32 a few lines above. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Chanwoo Choi <cw00.choi@samsung.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1434841352-24300-1-git-send-email-paul.gortmaker@windriver.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
bea5af41 |
|
15-May-2015 |
Shawn Guo <shawn.guo@linaro.org> |
ARM: imx: move timer driver into drivers/clocksource After the cleanup on imx timer driver, now it's ready to be moved into drivers/clocksource/. Let's do it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
e37e4593 |
|
22-May-2015 |
Maxime Coquelin <mcoquelin.stm32@gmail.com> |
clockevents/drivers: Add STM32 Timer driver STM32 MCUs feature 16 and 32 bits general purpose timers with prescalers. The drivers detects whether the time is 16 or 32 bits, and applies a 1024 prescaler value if it is 16 bits. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
|
#
4958ebb3 |
|
09-May-2015 |
Maxime Coquelin <mcoquelin.stm32@gmail.com> |
clocksource/drivers/armv7m_systick: Add ARM System timer driver This patch adds clocksource support for ARMv7-M's System timer, also known as SysTick. Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
050dd322 |
|
11-May-2015 |
Joachim Eastwood <manabian@gmail.com> |
clocksource/drivers/lpc32xx: Add the lpc32xx timer driver Add support for using the NXP LPC timer as clocksource and clock event. These timers are present on many NXP devices including LPC32xx, LPC17xx, LPC18xx and LPC43xx. The timer has a 32-bit timer counter register with a programmable 32-bit prescaler. It supports up to 4 compare match values with interrupt generation and reset/stop timer counter action. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Arnd Bergmann <arnd@arndb.de>
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#
e44d89f1 |
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28-May-2015 |
Sudeep Holla <sudeep.holla@arm.com> |
ARM: 8382/1: clocksource: make ARM_TIMER_SP804 depend on GENERIC_SCHED_CLOCK Commit 5261ef2ea836 ("ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource") moved SP804 to drivers/clocksource resulting in it being selectable on platforms/architectures without the config GENERIC_SCHED_CLOCK enabled. Due to that, it results in the following build failure(e.g. x86_64 allmodconfig) drivers/built-in.o: In function `__sp804_clocksource_and_sched_clock_init': (.init.text+0x1a0e7): undefined reference to `sched_clock_register' This patch fixes the build by making ARM_TIMER_SP804 depend on GENERIC_SCHED_CLOCK Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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#
0b7402dc |
|
18-May-2015 |
Sudeep Holla <sudeep.holla@arm.com> |
ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource The ARM Dual-Timer SP804 module is peripheral found not only on ARM32 platforms but also on ARM64 platforms. This patch moves the driver out of arch/arm to driver/clocksource so that it can be used on ARM64 platforms also. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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#
7ab7ef74 |
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19-Mar-2015 |
Alexandre Belloni <alexandre.belloni@bootlin.com> |
clocksource: atmel-st: select MFD_SYSCON Enforce MFD_SYSCON selection as the driver needs it. Else, it will still compile with some warning about X1, x2 or sr being used uninitialized. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
ff37015b |
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07-Mar-2015 |
Dengcheng Zhu <dzhu@wavecomp.com> |
CLOCKSOURCE: versatile: Add PLAT_VERSATILE dependency GENERIC_SCHED_CLOCK can be selected by architectures other than ARM. The current dependencies of CLKSRC_VERSATILE make it possible that other architectures will have CLKSRC_VERSATILE available in configuration once they select GENERIC_SCHED_CLOCK, whereas this clock source should be solely available to ARM in reality. This patch adds one more dependency to CLKSRC_VERSATILE to fix the issue. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Reported-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: LKML <linux-kernel@vger.kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9476/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
11bc26fe |
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26-Mar-2015 |
Richard Weinberger <richard@nod.at> |
clocksource/drivers: Fix various !CONFIG_HAS_IOMEM build errors Fix !CONFIG_HAS_IOMEM related build failures in three clocksource drivers. The build failures have the pattern of: drivers/clocksource/sh_cmt.c: In function ‘sh_cmt_map_memory’: drivers/clocksource/sh_cmt.c:920:2: error: implicit declaration of function ‘ioremap_nocache’ [-Werror=implicit-function-declaration] cmt->mapbase = ioremap_nocache(mem->start, resource_size(mem)); Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: maxime.ripard@free-electrons.com Link: http://lkml.kernel.org/r/1427362029-6511-1-git-send-email-daniel.lezcano@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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#
b53cdd03 |
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12-Mar-2015 |
Alexandre Belloni <alexandre.belloni@bootlin.com> |
ARM: at91: time: move the system timer driver to drivers/clocksource Import at91rm9200_time.c from mach-at91 as timer-atmel-st.c. Further cleanup is required to get rid of the mach-at91 headers. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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#
a8b1b9fc |
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23-Feb-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clockevents: asm9260: Fix compilation error with sparc/sparc64 allyesconfig The Kconfig options for the asm9260 timer is wrong as it can be selected by another platform with allyes config and thus leading to a compilation failure as some non arch related code is pulled by the compilation. Fix this by having the platform Kconfig to select the timer as it is done for the others drivers. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Oleksij Rempel <linux@rempel-privat.de> Conflicts: drivers/clocksource/Kconfig
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#
9b8bb773 |
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26-Jan-2015 |
Baruch Siach <baruch@tkos.co.il> |
clocksource: Driver for Conexant Digicolor SoC timer Add clocksource driver to the Conexant CX92755 SoC, part of the Digicolor SoCs series. Hardware provides 8 timers, A to H. Timer A is dedicated to a future watchdog driver so we don't use it here. Use timer B for sched_clock, and timer C for clock_event. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
468b8c4c |
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25-Jan-2015 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
clockevents: rockchip: Add rockchip timer for rk3288 The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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#
8d8bd7be |
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08-Jan-2015 |
Oleksij Rempel <linux@rempel-privat.de> |
ARM: clocksource: Add asm9260_timer driver In some cases asm9260 looks similar to iMX2x. One of exceptions is timer controller. So this patch introduces new driver for this special case. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
e074ff86 |
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21-Dec-2014 |
Dmitry Baryshkov <dbaryshkov@gmail.com> |
ARM: 8251/1: clocksource: enable pxa_timer for SA-1100 platform SA-11x0 platform used the same IP block as was used on PXA. Consequently it makes sense to have only one driver. Enable pxa_timer clocksource for StrongARM platform. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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#
910978e7 |
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07-Jul-2014 |
Thierry Reding <treding@nvidia.com> |
clocksource: Build Tegra timer on 32-bit ARM only Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which can be selected by the various SoCs. This is useful to disable building the driver on Tegra132 (64-bit ARM) where it doesn't currently compile but also isn't needed (yet). Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
e12aa828 |
|
12-Nov-2014 |
Andrew Bresticker <abrestic@chromium.org> |
clocksource: mips-gic: Add device-tree support Parse the GIC timer frequency and interrupt from the device-tree. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8421/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
fa5635a2 |
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20-Oct-2014 |
Andrew Bresticker <abrestic@chromium.org> |
MIPS: Move GIC clocksource driver to drivers/clocksource/ Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
7b6b0a45 |
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18-Nov-2014 |
Beniamino Galvani <b.galvani@gmail.com> |
clocksource: meson6: Select CLKSRC_MMIO Select CLKSRC_MMIO when the meson6_timer driver is enabled since it depends on clocksource MMIO functions. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Carlo Caione <carlo@caione.org>
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#
e4a6b378 |
|
28-Sep-2014 |
Carlo Caione <carlo@caione.org> |
ARM: meson6: clocksource: Add Meson6 timer support Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E. The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
b052ff30 |
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02-Sep-2014 |
Maxime Ripard <mripard@kernel.org> |
ARM: at91: PIT: Move the driver to drivers/clocksource Now that we don't depend on anyting in the mach-at91 directory, we can just move the driver to where it belongs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Conflicts: arch/arm/mach-at91/Kconfig arch/arm/mach-at91/Makefile
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#
3252a646 |
|
04-Jul-2014 |
Doug Anderson <dianders@chromium.org> |
clocksource: exynos_mct: Only use 32-bits where possible The MCT has a nice 64-bit counter. That means that we _can_ register as a 64-bit clocksource and sched_clock. ...but that doesn't mean we should. The 64-bit counter is read by reading two 32-bit registers. That means reading needs to be something like: - Read upper half - Read lower half - Read upper half and confirm that it hasn't changed. That wouldn't be terrible, but: - THe MCT isn't very fast to access (hundreds of nanoseconds). - The clocksource is queried _all the time_. In total system profiles of real workloads on ChromeOS, we've seen exynos_frc_read() taking 2% or more of CPU time even after optimizing the 3 reads above to 2 (see below). The MCT is clocked at ~24MHz on all known systems. That means that the 32-bit half of the counter rolls over every ~178 seconds. This inspired an optimization in ChromeOS to cache the upper half between calls, moving 3 reads to 2. ...but we can do better! Having a 32-bit timer that flips every 178 seconds is more than sufficient for Linux. Let's just use the lower half of the MCT. Times on 5420 to do 1000000 gettimeofday() calls from userspace: * Original code: 1323852 us * ChromeOS cache upper half: 1173084 us * ChromeOS + ldmia to optimize: 1045674 us * Use lower 32-bit only (this code): 1014429 us As you can see, the time used doesn't increase linearly with the number of reads and we can make 64-bit work almost as fast as 32-bit with a bit of assembly code. But since there's no real gain for 64-bit, let's go with the simplest and fastest implementation. Note: with this change roughly half the time for gettimeofday() is spent in exynos_frc_read(). The rest is timer / system call overhead. Also note: this patch disables the use of the MCT on ARM64 systems until we've sorted out how to make "cycles_t" always 32-bit. Really ARM64 systems should be using arch timers anyway. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
40c96312 |
|
08-Jul-2014 |
Chen Gang <gang.chen.5i5j@gmail.com> |
clocksource: Kconfig: Let EM_TIMER_STI depend on HAS_IOMEM In 'em_sti.c', it will call devm_ioremap_resource() which need HAS_IOMEM. So need let EM_TIMER_STI depend on HAS_IOMEM, too. The related error (with allmodconfig under score): LD init/built-in.o em_sti.c:(.text.em_sti_probe+0x84): undefined reference to `devm_ioremap_resource' make: *** [vmlinux] Error 1 Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
ecb3530d |
|
18-Jul-2014 |
Matthias Brugger <matthias.bgg@gmail.com> |
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
7e139187 |
|
18-Jul-2014 |
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
clocksource: sh_mtu2: Tidy up Kconfig typo for MTU2 It should be "MTU2" instead of "TMU2" Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
58394271 |
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16-Jun-2014 |
Jean Delvare <jdelvare@suse.de> |
clocksource: Add a Kconfig menu Move the clocksource Kconfig entries into their own menu, so that they don't pollute the main device driver menu. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/20140616114845.343e9960@endymion.delvare Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
b33cdd28 |
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26-May-2014 |
Arnd Bergmann <arnd@arndb.de> |
ARM: vexpress: refine dependencies for new code The versatile express changes for 3.16 introduced a number of build regressions for randconfig kernels by not tracking dependencies between the components right. This patch tries to rectify that: * the mach-vexpress code cannot link without the syscfg driver, which in turn needs MFD_VEXPRESS_SYSREG * various drivers call devm_regmap_init_vexpress_config(), which has to be exported so it can be used by loadable modules * the configuration bus uses OF DT helper functions that are not available to platforms disable CONFIG_OF * The sysreg driver exports GPIOs through gpiolib, which can be disabled on some platforms. * The clocksource code cannot be built on platforms that don't use modern timekeeping but rely on gettimeoffset. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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#
2529c3a3 |
|
23-May-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
clocksource: Add Freescale FlexTimer Module (FTM) timer support The Freescale FlexTimer Module time reference is a 16-bit counter that can be used as an unsigned or signed increase counter. CNTIN defines the starting value of the count and MOD defines the final value of the count. The value of CNTIN is loaded into the FTM counter, and the counter increments until the value of MOD is reached, at which point the counter is reloaded with the value of CNTIN. That's also when an overflow interrupt will be generated. Here using the 'evt' prefix or postfix as clock event device and the 'src' as clock source device. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jingchang Lu <b35083@freescale.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
220e2a8d |
|
16-Apr-2014 |
Pawel Moll <pawel.moll@arm.com> |
clocksource: Sched clock source for Versatile Express This patch adds a trival sched clock source using free running, 24MHz clocked counter present in the ARM Ltd. reference platforms (Versatile, RealView, Versatile Express) System Registers block. This code replaces the call in the VE machine code. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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#
87291a92 |
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20-Mar-2014 |
Geert Uytterhoeven <geert+renesas@glider.be> |
clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS If GENERIC_CLOCKEVENTS=n: drivers/clocksource/sh_cmt.c:54:28: error: field 'ced' has incomplete type drivers/clocksource/sh_cmt.c: In function 'sh_cmt_interrupt': drivers/clocksource/sh_cmt.c:407:23: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/sh_mtu2.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/sh_mtu2.c: In function 'ced_to_sh_mtu2': drivers/clocksource/sh_mtu2.c:184:70: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/sh_mtu2.c: At top level: drivers/clocksource/sh_mtu2.c:188:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] drivers/clocksource/sh_tmu.c:45:28: error: field 'ced' has incomplete type drivers/clocksource/sh_tmu.c: In function 'sh_tmu_interrupt': drivers/clocksource/sh_tmu.c:207:21: error: 'CLOCK_EVT_MODE_ONESHOT' undeclared (first use in this function) drivers/clocksource/em_sti.c:44:28: error: field 'ced' has incomplete type drivers/clocksource/em_sti.c: In function 'ced_to_em_sti': drivers/clocksource/em_sti.c:251:69: warning: initialization from incompatible pointer type [enabled by default] drivers/clocksource/em_sti.c: At top level: drivers/clocksource/em_sti.c:255:16: warning: 'enum clock_event_mode' declared inside parameter list [enabled by default] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Magnus Damm <damm@opensource.se> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1395324352-9146-1-git-send-email-geert@linux-m68k.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
fd3f1270 |
|
19-Feb-2014 |
Magnus Damm <damm@opensource.se> |
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI Add Kconfig entries for CMT, MTU2, TMU and STI to drivers/clocksource/Kconfig. This will allow us to get rid of duplicated entires in architecture code such as arch/sh and arch/arm/mach-shmobile. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
3f8e8cee |
|
29-Jan-2014 |
Kumar Gala <galak@codeaurora.org> |
clocksource: qcom: Move clocksource code out of mach-msm We intend to share the clocksource code for MSM platforms between legacy and multiplatform supported qcom SoCs. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Kumar Gala <galak@codeaurora.org>
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#
67905540 |
|
06-Nov-2013 |
Maxime Ripard <mripard@kernel.org> |
clocksource: Add Allwinner SoCs HS timers driver Most of the Allwinner SoCs (at this time, all but the A10) also have a High Speed timers that are not using the 24MHz oscillator as a source but rather the AHB clock running much faster. The IP is slightly different between the A10s/A13 and the one used in the A20/A31, since the latter have 4 timers available, while the former have only 2 of them. [dlezcano] : Fixed conflict with b788beda "Order Kconfig options alphabetically" Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
|
#
09ca2757 |
|
19-Nov-2013 |
Axel Lin <axel.lin@ingics.com> |
clocksource: time-efm32: Select CLKSRC_MMIO The time-efm32 driver uses the clocksource MMIO functions. Thus it needs to select CLKSRC_MMIO in Kconfig. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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#
77f7ce9a |
|
20-Nov-2013 |
Stephen Boyd <sboyd@codeaurora.org> |
clocksource: arm_arch_timer: Hide eventstream Kconfig on non-ARM Pavel Machek reports that this config is exposed on x86 where the ARM architected timers aren't even present. Make it depend on the ARM architected timers being selected so that non-ARM builds aren't asked about it. Reported-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
71c568c0 |
|
14-Oct-2013 |
Maxime Ripard <mripard@kernel.org> |
clocksource: sun4i: Select CLKSRC_MMIO The Allwinner SoCs timer use the clocksource MMIO functions. We thus need to select them in Kconfig. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
9c9b7818 |
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03-Oct-2013 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
clocksource: Provide timekeeping for efm32 SoCs An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
037f6377 |
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23-Aug-2013 |
Will Deacon <will@kernel.org> |
drivers: clocksource: add support for ARM architected timer event stream The ARM architected timer can generate events (used for waking up CPUs executing the wfe instruction) at a frequency represented as a power-of-2 divisor of the clock rate. An event stream might be used: - To implement wfe-based timeouts for userspace locking implementations. - To impose a timeout on a wfe for safeguarding against any programming error in case an expected event is not generated. This patch computes the event stream frequency aiming for a period of 100us between events. It uses ARM/ARM64 specific backends to configure and enable the event stream. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Will Deacon <will.deacon@arm.com> [sudeep: moving ARM/ARM64 changes into separate patches and adding Kconfig option] Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
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#
7b0dd72a |
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18-Sep-2013 |
Jean Pihet <jean.pihet@linaro.org> |
arm: clocksource: mvebu: Use the main timer as clock source from DT This commit: 573145f08c2b92c45498468afbbba909f6ce6135 clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE replaced a call to the driver's timer initialization by a call to clocksource_of_init(). However, it failed to select CONFIG_CLKSRC_OF. Fix this by selecting CONFIG_CLKSRC_OF for Armada370/XP machines. Without this change the kernel is stuck at: 'Calibrating delay loop...'. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
6792e636 |
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16-Jun-2013 |
Tomasz Figa <tomasz.figa@gmail.com> |
clocksource: samsung_pwm_timer: Do not use clocksource_mmio In case of Samsung PWM timer, clocksource MMIO can not be used, because custom suspend/resume callbacks are required. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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#
c1b40e44 |
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25-Jun-2013 |
Stuart Menefy <stuart.menefy@st.com> |
clocksource: arm_global_timer: Add ARM global timer support This is a simple driver for the global timer module found in the Cortex A9-MP cores from revision r1p0 onwards. This should be able to perform the functions of the system timer and the local timer in an SMP system. The global timer has the following features: The global timer is a 64-bit incrementing counter with an auto-incrementing feature. It continues incrementing after sending interrupts. The global timer is memory mapped in the private memory region. The global timer is accessible to all Cortex-A9 processors in the cluster. Each Cortex-A9 processor has a private 64-bit comparator that is used to assert a private interrupt when the global timer has reached the comparator value. All the Cortex-A9 processors in a design use the banked ID, ID27, for this interrupt. ID27 is sent to the Interrupt Controller as a Private Peripheral Interrupt. The global timer is clocked by PERIPHCLK. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Rob Herring <robherring2@gmail.com> CC: Linus Walleij <linus.walleij@linaro.org> CC: Will Deacon <will.deacon@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
0c1dcfd5 |
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11-Jun-2013 |
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> |
clocksource: Add Marvell Orion SoC timer This patch add a DT enabled driver for timers found on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, and Discovery Innovation). It installs a free- running clocksource on timer0 and a clockevent source on timer1. Corresponding device tree documentation is also added. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
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#
10021488 |
|
04-Jun-2013 |
Heiko Stuebner <heiko@sntech.de> |
clocksource: dw_apb_timer_of: use clocksource_of_init dw_apb_timer_init used to search the devicetree for matching timer devices, making calls to it from board files necessary. Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE. With this change the function gets called once for each timer node and tracks these number of calls to attach clockevent and clocksource devices to the nodes. Also remove the calls to dw_apb_timer_init from all previous users, as clocksource_of_init is the default for init_time now. Tested on the upcoming rk3066 code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
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#
1b4eca0f |
|
04-Jun-2013 |
Heiko Stuebner <heiko@sntech.de> |
clocksource: dw_apb_timer_of: select DW_APB_TIMER dw_apb_timer_of is the driver part facing devicetree platforms and calls into dw_apb_timer with the data gathered from the dt. Currently the two platforms using the dw_apb_timer_of select both the options for the core timer and the dt addon. As dw_apb_timer_of always depends on dw_apb_timer let it select DW_APB_TIMER itself without the need for every platform to do it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
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#
c1967249 |
|
29-May-2013 |
Jingchang Lu <b35083@freescale.com> |
clocksource: Add Freescale Vybrid pit timer support Add Freescale Vybrid Family period interrupt timer support. Signed-off-by: Jingchang Lu <b35083@freescale.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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#
f9bb48a2 |
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23-Apr-2013 |
Tomasz Figa <t.figa@samsung.com> |
clocksource: samsung_pwm_timer: Add support for non-DT platforms This patch extends the driver to support platforms that still use legacy ATAGS-based boot, without device tree, by providing an exported function that can be used from platform code to initialize the clocksource. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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#
77d84434 |
|
23-Apr-2013 |
Tomasz Figa <t.figa@samsung.com> |
clocksource: samsung_pwm_timer: Let platforms select the driver This patch modifies the way of enabling the driver to let the platforms select it in their Kconfig instead of specifying particular platforms in Kconfig entry of the driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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#
f1189989 |
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20-Apr-2013 |
Tomasz Figa <t.figa@samsung.com> |
clocksource: add samsung pwm timer driver This adds a new clocksource driver for the PWM timer that is present in most Samsung SoCs, based on the existing driver in arch/arm/plat-samsung/samsung-time.c and many changes implemented by Tomasz Figa. Originally, the conversion of all Samsung machines to the new driver was planned for 3.10, but that work ended up being too late and too invasive just before the merge window. Unfortunately, other changes in the Exynos platform resulted in some Exynos4 setups, particularly the Universal C210 board to be broken. In order to fix that with minimum risk, so we now leave the existing pwm clocksource driver in place for all older platforms and use the new driver only for device tree enabled boards. This way, we can get the broken machines running again using DT descriptions. All clocksource changes were implemented by Tomasz, while the DT registration was rewritten by Arnd. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de>
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#
0583fe47 |
|
10-Apr-2013 |
Rob Herring <rob.herring@calxeda.com> |
ARM: convert arm/arm64 arch timer to use CLKSRC_OF init This converts arm and arm64 to use CLKSRC_OF DT based initialization for the arch timer. A new function arch_timer_arch_init is added to allow for arch specific setup. This has a side effect of enabling sched_clock on omap5 and exynos5. There should not be any reason not to use the arch timers for sched_clock. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-sh@vger.kernel.org Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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#
119fd635 |
|
24-Mar-2013 |
Maxime Ripard <mripard@kernel.org> |
clocksource: sunxi: Rename sunxi to sun4i During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
4f0f234f |
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20-Mar-2013 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynq: Move timer to generic location Move zynq timer out of mach folder to generic location and enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
6938d75a |
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09-Mar-2013 |
Thomas Abraham <thomas.abraham@linaro.org> |
ARM: EXYNOS: move mct driver to drivers/clocksource Move the multi core timer (mct) driver to from mach-exynos to drivers/clocksource and update the Kconfig and makefiles. Cc: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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#
a2c5d4ed |
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09-Oct-2012 |
James Hogan <jhogan@kernel.org> |
metag: Time keeping Add time keeping code for metag. Meta hardware threads have 2 timers. The background timer (TXTIMER) is used as a free-running time base, and the interrupt timer (TXTIMERI) is used for the timer interrupt. Both counters traditionally count at approximately 1MHz. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
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#
1aee5d7a |
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20-Nov-2012 |
Mark Rutland <mark.rutland@arm.com> |
arm64: move from arm_generic to arm_arch_timer The arch_timer driver supports a superset of the functionality of the arm_generic driver, and is not tied to a particular arch. This patch moves arm64 to use the arch_timer driver, gaining additional functionality in doing so, and removes the (now unused) arm_generic driver. Timer-related hooks specific to arm64 are moved into arch/arm64/kernel/time.c. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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#
8a4da6e3 |
|
12-Nov-2012 |
Mark Rutland <mark.rutland@arm.com> |
arm: arch_timer: move core to drivers/clocksource The core functionality of the arch_timer driver is not directly tied to anything under arch/arm, and can be split out. This patch factors out the core of the arch_timer driver, so it can be shared with other architectures. A couple of functions are added so that architecture-specific code can interact with the driver without needing to touch its internals. The ARM_ARCH_TIMER config variable is moved out to drivers/clocksource/Kconfig, existing uses in arch/arm are replaced with HAVE_ARM_ARCH_TIMER, which selects it. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
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#
ff7ec345 |
|
13-Jan-2013 |
Tony Prisk <linux@prisktech.co.nz> |
timer: vt8500: Move timer code to drivers/clocksource This patch moves arch-vt8500/timer.c into drivers/clocksource and updates the necessary Kconfig/Makefile options. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
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#
ae278a93 |
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19-Nov-2012 |
Stephen Warren <swarren@nvidia.com> |
clocksource: add common of_clksrc_init() function It is desirable to move all clocksource drivers to drivers/clocksource, yet each requires its own initialization function. We'd rather not pollute <linux/> with a header for each function. Instead, create a single of_clksrc_init() function which will determine which clocksource driver to initialize based on device tree. Based on a similar patch for drivers/irqchip by Thomas Petazzoni. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
b2ac5d75 |
|
12-Nov-2012 |
Maxime Ripard <mripard@kernel.org> |
clocksource: sunxi: Add Allwinner A1X Timer Driver Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Thomas Gleixner <tglx@linutronix.de> CC: John Stultz <johnstul@us.ibm.com>
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#
694e33a7 |
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18-Oct-2012 |
Linus Walleij <linus.walleij@linaro.org> |
ARM: plat-nomadik: move MTU, kill plat-nomadik This moves the MTU timer driver from arch/arm/plat-nomadik to drivers/clocksource and moves the header file to the platform_data directory. As this moves the last file being compiled to an object out of arch/arm/plat-nomadik, we have to "turn off the light" and delete the plat-nomadik directory, because it is not allowed to have an empty Makefile in a plat-* directory. This is probably also a desired side effect of depopulating the arch/arm directory of drivers. Luckily we have just deleted all the <plat/*> include files prior to this so by moving the last one we may delete the directory. After this all the Ux500 and Nomadik device drivers live outside of the arch/arm hierarchy. Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
985c0679 |
|
05-Mar-2012 |
Marc Zyngier <maz@kernel.org> |
arm64: Generic timers support This patch adds support for the ARM generic timers with A64 instructions for accessing the timer registers. It uses the physical counter as the clock source and the virtual counter as sched_clock. The timer frequency can be specified via DT or read from the CNTFRQ_EL0 register. The physical counter is also accessible from user space allowing fast gettimeofday() implementation. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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#
cfda5901 |
|
11-Jul-2012 |
Dinh Nguyen <dinguyen@altera.com> |
clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer Make a common device tree glue for clocksource/dw_apb_timer. Move mach-picoxcell/time.c to be a generic device tree application of the dw_apb_timer. Configure mach-picoxcell to use the dw_apb_timer_of device tree implementation in drivers/clocksource. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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#
6fe9cbd1 |
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13-Jun-2012 |
Gregory CLEMENT <gregory.clement@bootlin.com> |
clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver Timer 0 is used as free-running clocksource, while timer 1 is used as clock_event_device. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Yehuda Yitschak <yehuday@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com> Acked-by: Andrew Lunn <andrew@lunn.ch> CC: Thomas Gleixner <tglx@linutronix.de> CC: John Stultz <johnstul@us.ibm.com>
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#
29746f48 |
|
13-Apr-2012 |
Linus Walleij <linus.walleij@linaro.org> |
ARM: ux500: delete U5500 support This platform has been obsoleted and was only available inside of ST-Ericsson, no users of this code are left in the world. This deletes the core U5500 support entirely in the same manner as the obsoleted U8500 silicon was previously deleted. The cpu_is_u5500() macros that can read out the CPU ID is left until the next kernel cycle, this makes it possible to merge deletion of dependent drivers without breakage. This also has the upside of removing the mailbox driver which was our only driver that was outside the drivers/* hiearchy, now the machine directory only handles machines and nothing else. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Jonas Aberg <jonas.aberg@stericsson.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Ulf Hansson <ulf.hansson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
489bccea |
|
27-May-2011 |
Mattias Wallin <mattias.wallin@stericsson.com> |
clocksource: add DBX500 PRCMU Timer support This patch adds the DBX500 PRCMU Timer driver as a clocksource and as sched_clock. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e6220bdc |
|
09-Jun-2011 |
Thomas Gleixner <tglx@linutronix.de> |
i8253: Create common clockevent implementation arm, mips and x86 implement i8253 based clockevents. All the same code copied. Create a common implementation in drivers/clocksource/i8253.c. About time to rename drivers/clocksource/ to something else. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Stultz <john.stultz@linaro.org> Link: http://lkml.kernel.org/r/20110609130621.921710458@linutronix.de
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#
06c3df49 |
|
05-Jun-2011 |
Jamie Iles <jamie@jamieiles.com> |
clocksource: apb: Share APB timer code with other platforms The APB timers are an IP block from Synopsys (DesignWare APB timers) and are also found in other systems including ARM SoC's. This patch adds functions for creating clock_event_devices and clocksources from APB timers but does not do the resource allocation. This is handled in a higher layer to allow the timers to be created from multiple methods such as platform_devices. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: John Stultz <john.stultz@linaro.org>
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#
15f304b6 |
|
01-Jun-2011 |
Ralf Baechle <ralf@linux-mips.org> |
i8253: Consolidate all kernel definitions of i8253_lock Move them to drivers/clocksource/i8253.c and remove the implementations in arch/ [ tglx: Avoid the extra file in lib - folded arch patches in. The export will become conditional in a later step ] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Link: http://lkml.kernel.org/r/20110601180610.221426078@duck.linux-mips.net Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
442c8176 |
|
08-May-2011 |
Russell King <rmk+kernel@arm.linux.org.uk> |
clocksource: add common mmio clocksource Add a generic mmio clocksource, covering both 32-bit and 16-bit register access sizes, for up or down counters. This can be used to easily create clocksources for simple counter-based implementations. Cc: Alessandro Rubini <rubini@unipv.it> Cc: Colin Cross <ccross@android.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Erik Gilling <konkers@android.com> Acked-by: "Hans J. Koch" <hjk@hansjkoch.de> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: linux-omap@vger.kernel.org Acked-by: Nicolas Pitre <nico@fluxnic.net> Cc: Olof Johansson <olof@lixom.net> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Cc: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
#
89c0b8e2 |
|
08-May-2011 |
Russell King <rmk+kernel@arm.linux.org.uk> |
clocksource: add common i8253 PIT clocksource This is based upon both arch/arm/mach-footbridge/isa-timer.c and arch/x86/kernel/i8253.c. Acked-by: John Stultz <john.stultz@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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#
9c8f05c2 |
|
05-Mar-2010 |
Randy Dunlap <randy.dunlap@oracle.com> |
MFGPT: move clocksource menu Move the CS5535 MFGPT hrtimer kconfig option to be with the other MFGPT options. This makes it easier to find and also removes it from the main "Device Drivers" menu, where it should not have been. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Acked-by: Andres Salomon <dilinger@collabora.co.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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c30d7d2b |
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14-Dec-2009 |
Andres Salomon <dilinger@collabora.co.uk> |
cs5535: add a generic clock event MFGPT driver This is based on the old code in arch/x86/kernel/mfgpt_32.c, but is modular and not Geode-specific. There's no reason why the clock event device needs to be registered so early at boot; the clockevent code is perfectly capable of dynamic switching. [akpm@linux-foundation.org: add linux/irq.h include] Signed-off-by: Andres Salomon <dilinger@collabora.co.uk> Cc: Jordan Crouse <jordan@cosmicpenguin.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: john stultz <johnstul@us.ibm.com> Cc: Chris Ball <cjb@laptop.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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