History log of /linux-master/drivers/clk/socfpga/clk-s10.c
Revision Date Author Comments
# 65f9e1be 23-Oct-2023 Gustavo A. R. Silva <gustavoars@kernel.org>

clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data

In order to gain the bounds-checking coverage that __counted_by provides
to flexible-array members at run-time via CONFIG_UBSAN_BOUNDS (for array
indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions),
we must make sure that the counter member, in this case `num`, is updated
before the first access to the flex-array member, in this case array `hws`.

commit f316cdff8d67 ("clk: Annotate struct clk_hw_onecell_data with
__counted_by") introduced `__counted_by` for `struct clk_hw_onecell_data`
together with changes to relocate some of assignments of counter `num`
before `hws` is accessed:

include/linux/clk-provider.h:
1380 struct clk_hw_onecell_data {
1381 unsigned int num;
1382 struct clk_hw *hws[] __counted_by(num);
1383 };

However, this structure is used as a member in other structs, in this
case in `struct sstratix10_clock_data`:

drivers/clk/socfpga/stratix10-clk.h:
9 struct stratix10_clock_data {
10 void __iomem *base;
11
12 /* Must be last */
13 struct clk_hw_onecell_data clk_data;
14 };

Hence, we need to move the assignments to `clk_data->clk_data.num` after
allocations for `struct stratix10_clock_data` and before accessing the
flexible array `clk_data->clk_data.hws`. And, as assignments for both
`clk_data->clk_data.num` and `clk_data->base` are originally adjacent to
each other, relocate both assignments together.

Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/385c516c498e07eb9a521107e16a7efd26e86ea5.1698117815.git.gustavoars@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# a96cbb14 18-Jul-2023 Rob Herring <robh@kernel.org>

clk: Explicitly include correct DT includes

The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> # samsung
Acked-by: Heiko Stuebner <heiko@sntech.de> #rockchip
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # versaclock5
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org
Acked-by: Abel Vesa <abel.vesa@linaro.org> #imx
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 6f3cf248 17-Feb-2022 Tom Rix <trix@redhat.com>

clk: socfpga: cleanup spdx tags

Replace tabs with spaces in SPDX tag

Signed-off-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20220217173453.3262672-1-trix@redhat.com
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# b739bca9 07-Sep-2021 Cai Huoqing <caihuoqing@baidu.com>

clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource()

Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Link: https://lore.kernel.org/r/20210907085144.4458-1-caihuoqing@baidu.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 6855ee83 10-Jun-2021 Dinh Nguyen <dinguyen@kernel.org>

clk: agilex/stratix10: fix bypass representation

Each of these clocks(s2f_usr0/1, sdmmc_clk, gpio_db, emac_ptp,
emac0/1/2) have a bypass setting that can use the boot_clk. The
previous representation was not correct.

Fix the representation.

Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210611025201.118799-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# efbe21df 10-Jun-2021 Dinh Nguyen <dinguyen@kernel.org>

clk: agilex/stratix10: remove noc_clk

Early documentation had a noc_clk, but in reality, it's just the
noc_free_clk. Remove the noc_clk clock and just use the noc_free_clk.

Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210611025201.118799-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# ba7e2584 02-Mar-2021 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: Convert to s10/agilex/n5x to use clk_hw

As recommended by Stephen Boyd, convert the Agilex/Stratix10/n5x clock
driver to use the clk_hw registration method.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210302214151.1333447-3-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# b02cf0c4 31-Aug-2020 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clk

The fixed divider the emac_ptp_free_clk should be 2, not 4.

Fixes: 07afb8db7340 ("clk: socfpga: stratix10: add clock driver for
Stratix10 platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20200831202657.8224-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 762d961a 12-May-2020 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: use new parent data scheme

Convert, where possible, the stratix10 clock driver to the new parent
data scheme by specifying the parent data for clocks that have multiple
parents.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200512181647.5071-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 8c0e783d 14-Jan-2020 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: simplify parameter passing

Just pass the clock pointer structure to the various register functions.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200114160726.19771-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 16e3c572 25-Jun-2019 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: fix divider entry for the emac clocks

The fixed dividers for the emac clocks should be 2 not 4.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 3b5015c4 24-Jun-2019 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: add additional clocks needed for the NAND IP

The nand_clk is actually called the nand_x_clk and the parent is the
l4_mp_clk, not the l4_main_clk. The nand_clk is a child of the
nand_x_clk and has a fixed divider of 4. The same is true for the
nand_ecc_clk.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 74684cce 07-Jun-2019 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: fix divider entry for the emac clocks

The fixed dividers for the emac clocks should be 2 not 4.

Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# b488517b 02-Jan-2019 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: fix naming convention for the fixed-clocks

The fixed clocks in the DTS file have a hyphen, but the clock driver has
the fixed clocks using underbar. Thus the clock driver cannot detect the
other fixed clocks correctly. Change the fixed clock names to a hyphen.

Fixes: 07afb8db7340 ("clk: socfpga: stratix10: add clock driver for
Stratix10 platform")
Cc: linux-stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 51b9a379 26-Jun-2018 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: fix the sdmmc_free_clk mux

The first parent of the sdmmc_free_clk should be the main_sdmmc_clk.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 2772ffd9 26-Jun-2018 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: fix the parents of mpu_free_clk

Add a clock mux that is used as a parent for the mpu_free_clk.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# a6131547 02-May-2018 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: suppress unbinding platform's clock driver

The Stratix10 clock driver is essential to system operation, so their
removal should never happen.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 1ace0dfd 02-May-2018 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: use platform driver APIs

Use platform driver APIs to map memory so that it will automatically free
the memory in case of errors.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
[sboyd@kernel.org: Return -ENOMEM error pointers, check for error
pointer at call site]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 07afb8db 21-Mar-2018 Dinh Nguyen <dinguyen@kernel.org>

clk: socfpga: stratix10: add clock driver for Stratix10 platform

Add a clock driver for the Stratix10 SoC. The driver is similar to the
Cyclone5/Arria10 platforms, with the exception that this driver only uses
one single clock binding.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>