History log of /linux-master/drivers/clk/mediatek/clk-mt8195-infra_ao.c
Revision Date Author Comments
# 61ca6ee7 30-Apr-2023 Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

clk: mediatek: Make mtk_clk_simple_remove() return void

__mtk_clk_simple_remove() and so also mtk_clk_simple_remove() return
zero unconditionally. Make them return no value instead and convert the
drivers making use of it to platform_driver's .remove_new().

This makes the semantics in the callers of mtk_clk_simple_remove() clearer
and prepares for the quest to make platform driver's remove function return
void. There is no semantic change.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230430190233.878921-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 65c9ad77 06-Mar-2023 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriate

Add a MODULE_DEVICE_TABLE() on all clocks that can be built as modules
to allow auto-load at boot.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks
Link: https://lore.kernel.org/r/20230306140543.1813621-50-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# a451da86 06-Mar-2023 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

clk: mediatek: Add MODULE_LICENSE() where missing

In order to successfully build clock drivers as modules it is required
to declare a module license: add it where missing.
While at it, also change the MODULE_LICENSE text from "GPL v2" to
"GPL" (which means the same) on clk-mt7981-eth.c.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks
Link: https://lore.kernel.org/r/20230306140543.1813621-38-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 164d240d 06-Mar-2023 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

clk: mediatek: Switch to module_platform_driver() where possible

Lots of clock drivers have got both .probe() and a .remove() callbacks:
switch from builtin_platform_driver() to module_platform_driver() so
that we actually register the .remove() callback.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks
Link: https://lore.kernel.org/r/20230306140543.1813621-37-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 3cc53c57 19-Jul-2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

clk: mediatek: mt8195: Add reset idx for USB/PCIe T-PHY

Add the reset idx for the t-phy port 1, used as either USB or
PCI-Express (secondary controller) PHY, depending on board-specific
configuration/layout.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220720102817.237483-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 3f10f49c 19-Jul-2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

clk: mediatek: mt8195-infra_ao: Set pwrmcu clocks as critical

The pwrmcu is responsible for power management and idle states in SSPM:
on older SoCs this was managed in Linux drivers like sspm/mcupm/eemgpu
but, at least on MT8195, this functionality was transferred to the ATF
firmware.
For this reason, turning off the pwrmcu related clocks from the kernel
will lead to unability to resume the platform after suspend and other
currently unknown PM related side-effects.

Set the PWRMCU and PWRMCU_BUS_H clocks as critical to prevent the
kernel from turning them off, fixing the aforementioned issue.

Fixes: e2edf59dec0b ("clk: mediatek: Add MT8195 infrastructure clock support")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220719093316.37253-1-angelogioacchino.delregno@collabora.com
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# c39da7d0 28-Jun-2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1

Add the reset idx for PCIe P0, P1, located in infra_ao RST2 registers.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220629105205.173471-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# a0bc8ae5 23-May-2022 Rex-BC Chen <rex-bc.chen@mediatek.com>

clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195

The infra_ao reset is needed for MT8192 and MT8195.
- Add mtk_clk_rst_desc for MT8192 and MT8195
- Add register reset controller function for MT8192 infra_ao.
- Move definition of infra reset from cl-mt8183.c to reset.h
because it's the same definition with MT8192 and MT8195.
- Add new definition of infra reset_4 for MT8192 and MT8195.
- Add infra_ao_idx_map for MT8192 and MT8195.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
[Nícolas: Test for MT8192]
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-15-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# cd3a77a0 08-Feb-2022 Chen-Yu Tsai <wenst@chromium.org>

clk: mediatek: mt8195: Hook up mtk_clk_simple_remove()

Various small clock controllers only have clock gates, and utilize
mtk_clk_simple_probe() as their driver probe function.

Now that we have a matching remove function, hook it up for the relevant
drivers. This was done with the following command:

sed -i -e '/mtk_clk_simple_probe/a \
.remove = mtk_clk_simple_remove,' drivers/clk/mediatek/clk-mt8195-*.c

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220208124034.414635-29-wenst@chromium.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# e2edf59d 13-Sep-2021 Chun-Jie Chen <chun-jie.chen@mediatek.com>

clk: mediatek: Add MT8195 infrastructure clock support

Add MT8195 infrastructure clock controller which provides
clock gate control for basic IP like pwm, uart, spi and so on.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210914021633.26377-10-chun-jie.chen@mediatek.com
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>