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ba7c8d27 |
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22-Mar-2023 |
Álvaro Fernández Rojas <noltari@gmail.com> |
clk: bcm: Add BCM63268 timer clock and reset driver Add driver for BCM63268 timer clock and reset controller. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Link: https://lore.kernel.org/r/20230322171515.120353-5-noltari@gmail.com [sboyd@kernel.org: Mark reset ops const, fixup includes] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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45b9fc58 |
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07-Jul-2022 |
William Zhang <william.zhang@broadcom.com> |
clk: bcm: bcmbca: Replace ARCH_BCM_63XX with ARCH_BCMBCA Prepare for the BCM63138 ARCH_BCM_63XX migration to ARCH_BCMBCA. Make CLK_BCM_63XX depending and setting default on ARCH_BCMBCA. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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73a203b0 |
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03-Sep-2020 |
Maxime Ripard <maxime@cerno.tech> |
clk: bcm: dvp: Select the reset framework The DVP driver depends both on the RESET_SIMPLE driver but also on the reset framework itself. Let's make sure we have it enabled. Fixes: 1bc95972715a ("clk: bcm: Add BCM2711 DVP driver") Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200903082636.3844629-1-maxime@cerno.tech Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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1bc95972 |
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11-Jun-2020 |
Maxime Ripard <maxime@cerno.tech> |
clk: bcm: Add BCM2711 DVP driver The HDMI block has a block that controls clocks and reset signals to the HDMI0 and HDMI1 controllers. Let's expose that through a clock driver implementing a clock and reset provider. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/bb60d97fc76b61c2eabef5a02ebd664c0f57ede0.1591867332.git-series.maxime@cerno.tech Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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1c099779 |
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02-May-2019 |
Jonas Gorski <jonas.gorski@gmail.com> |
clk: add BCM63XX gated clock controller driver Add a driver for the gated clock controller found on MIPS based BCM63XX SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [sboyd@kernel.org: Remove module.h include and associated things for a non-modular driver, add static on data tables, drop of_match_ptr() usage, fix spdx tag to be a C++ style comment] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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4e85e535 |
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12-Jun-2019 |
Nicolas Saenz Julienne <nsaenzjulienne@suse.de> |
clk: bcm283x: add driver interfacing with Raspberry Pi's firmware Raspberry Pi's firmware offers an interface though which update it's clock's frequencies. This is specially useful in order to change the CPU clock (pllb_arm) which is 'owned' by the firmware and we're unable to scale using the register interface provided by clk-bcm2835. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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789bc177 |
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09-May-2019 |
Florian Fainelli <f.fainelli@gmail.com> |
clk: bcm: Allow CLK_BCM2835 for ARCH_BRCMSTB ARCH_BRCMSTB needs to use the BCM2835 clock driver for chips like BCM7211 which adopted that clock controller, make that possible and the driver default to be enabled for ARCH_BRCMSTB. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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5d59f12a |
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09-May-2019 |
Florian Fainelli <f.fainelli@gmail.com> |
clk: bcm: Make BCM2835 clock drivers selectable Make the BCM2835 clock driver selectable by other architectures/platforms. ARCH_BRCMSTB will be selecting that driver in the next commit since new chips like 7211 use the same CPRMAN clock controller that this driver supports. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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ec8f24b7 |
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19-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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04c3767f |
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28-Sep-2017 |
Florian Fainelli <f.fainelli@gmail.com> |
clk: bcm: Add Broadcom Hurricane 2 clock support Add support for the Broadcom Hurricane 2 SoC clock controller. We can re-use the existing iProc clock library since the SoC's architecture is largely the same as its predecessors. For now, we just initialize the iProc ARM PLL. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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654cdd32 |
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05-Jun-2017 |
Sandeep Tripathy <sandeep.tripathy@broadcom.com> |
clk: bcm: Add clocks for Stingray SOC This patch adds support for Stingray clocks in iproc ccf. The Stingray SOC has various plls based on iproc pll architecture. Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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100edfe3 |
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23-Nov-2016 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: bcm: Make COMMON_CLK_IPROC into a library The broadcom clk driver Kconfig file selects and depends on the COMMON_CLK_IPROC config for different SoC specific drivers. Let's simplify this by always selecting the COMMON_CLK_IPROC config, turning it into a set of library code. We still want to retain the SoC specific options, so we leave those in place. Since we're here we also drop COMMON_CLK dependency because that's implicitly handled by including this file in drivers/clk/Kconfig in the right place and also make CLK_BCM_KONA default to y on the architecture it exists for instead of plain default y. Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <ray.jui@broadcom.com> Cc: Jon Mason <jonmason@broadcom.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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b7d79eb4 |
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22-Nov-2016 |
Florian Fainelli <f.fainelli@gmail.com> |
clk: bcm: Fix unmet Kconfig dependencies for CLK_BCM_63XX With commit f4e871509959 ("clk: iproc: Make clocks visible options"), COMMON_CLK_IPROC gained a dependency on ARCH_BCM_IPROC, yet CLK_BCM_63XX also selects that option, this causes the following Kconfig warning: warning: (CLK_BCM_63XX) selects COMMON_CLK_IPROC which has unmet direct dependencies ((ARCH_BCM_IPROC || COMPILE_TEST) && COMMON_CLK) Fix this by adding proper depends for COMMON_CLK_IPROC Fixes: f4e871509959 ("clk: iproc: Make clocks visible options") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> [sboyd@codeaurora.org: Drop default part as it's redundant] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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f4e87150 |
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29-Oct-2015 |
Jon Mason <jonmason@broadcom.com> |
clk: iproc: Make clocks visible options Make the clocks visible options that can be selected by anyone. This avoids the problems of: 1) Select is a reverse dependency and is hard for people to understand and can sometimes be a pain to track down 2) Build coverage goes down because configs are hidden 3) Code bloat Patch suggested by Stephen Boyd Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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7160aa1e |
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29-Oct-2015 |
Florian Fainelli <f.fainelli@gmail.com> |
clk: bcm: Add BCM63138 clock support BCM63138 has a simple clocking domain which is primarily the ARMPLL clocking complex, from which the ARM (CPU), APB and AXI clocks would be derived from. Since the ARMPLL controller is entirely compatible with the iProc ARM PLL, we just initialize it without additional parameters. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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addc3ba6 |
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29-Oct-2015 |
Florian Fainelli <f.fainelli@gmail.com> |
clk: bcm: Add BCM63138 clock support BCM63138 has a simple clocking domain which is primarily the ARMPLL clocking complex, from which the ARM (CPU), APB and AXI clocks would be derived from. Since the ARMPLL controller is entirely compatible with the iProc ARM PLL, we just initialize it without additional parameters. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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1e9bc9d6 |
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15-Oct-2015 |
Arnd Bergmann <arnd@arndb.de> |
ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled When CONFIG_CYGNUS is set but CONFIG_COMMON_CLK_IPROC is disabled, the following link failures are caused: drivers/built-in.o: In function `cygnus_armpll_init': :(.init.text+0x1d290): undefined reference to `iproc_armpll_setup' drivers/built-in.o: In function `cygnus_genpll_clk_init': :(.init.text+0x1d2c4): undefined reference to `iproc_pll_clk_setup' drivers/built-in.o: In function `cygnus_lcpll0_clk_init': :(.init.text+0x1d304): undefined reference to `iproc_pll_clk_setup' drivers/built-in.o: In function `cygnus_mipipll_clk_init': :(.init.text+0x1d344): undefined reference to `iproc_pll_clk_setup' drivers/built-in.o: In function `cygnus_asiu_init': :(.init.text+0x1d370): undefined reference to `iproc_asiu_setup' It is fixed it by always selecting COMMON_CLK_IPROC from ARCH_BCM_IPROC, and making COMMON_CLK_IPROC a silent option (thus preventing it from being erroneously disabled by a user). Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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4a7748c3 |
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13-Oct-2015 |
Javier Martinez Canillas <javier@osg.samsung.com> |
clk: Allow drivers to build if COMPILE_TEST is enabled These drivers only have runtime but no build time dependencies so can be built for testing purposes if the Kconfig COMPILE_TEST option is enabled. This is useful to have more build coverage and make sure that drivers are not affected by changes that could cause build regressions. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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5fe225c1 |
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05-May-2015 |
Ray Jui <rjui@broadcom.com> |
clk: iproc: add initial common clock support This adds basic and generic support for various iProc PLLs and clocks including the ARMPLL, GENPLL, LCPLL, MIPIPLL, and ASIU clocks. SoCs under the iProc architecture can define their specific register offsets and clock parameters for their PLL and clock controllers. These parameters can be passed as arugments into the generic iProc PLL and clock setup functions Derived from code originally provided by Jonathan Richardson <jonathar@broadcom.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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7d3723ba |
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21-Apr-2014 |
Alex Elder <elder@linaro.org> |
clk: bcm21664: use common clock framework Define the set of CCUs and provided clocks sufficient to satisfy the needs of all the existing clock references for BCM21664. Replace the "fake" fixed-rate clocks used previously with "real" ones. Note that only the minimal set of these clocks and CCUs is defined here. More clock definitions will need to be added as required by the addition of additional drivers. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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1f27f152 |
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13-Feb-2014 |
Alex Elder <elder@linaro.org> |
clk: bcm281xx: add initial clock framework support Add code for device tree support of clocks in the BCM281xx family of SoCs. Machines in this family use peripheral clocks implemented by "Kona" clock control units (CCUs). (Other Broadcom SoC families use Kona style CCUs as well, but support for them is not yet upstream.) A BCM281xx SoC has multiple CCUs, each of which manages a set of clocks on the SoC. A Kona peripheral clock is composite clock that may include a gate, a parent clock multiplexor, and zero, one or two dividers. There is a variety of gate types, and many gates implement hardware-managed gating (often called "auto-gating"). Most dividers divide their input clock signal by an integer value (one or more). There are also "fractional" dividers which allow division by non-integer values. To accomodate such dividers, clock rates and dividers are generally maintained by the code in "scaled" form, which allows integer and fractional dividers to be handled in a uniform way. If present, the gate for a Kona peripheral clock must be enabled when a change is made to its multiplexor or one of its dividers. Additionally, dividers and multiplexors have trigger registers which must be used whenever the divider value or selected parent clock is changed. The same trigger is often used for a divider and multiplexor, and a BCM281xx peripheral clock occasionally has two triggers. The gate, dividers, and parent clock selector are treated in this code as "components" of a peripheral clock. Their functionality is implemented directly--e.g. the common clock framework gate implementation is not used for a Kona peripheral clock gate. (This has being considered though, and the intention is to evolve this code to leverage common code as much as possible.) The source code is divided into three general portions: drivers/clk/bcm/clk-kona.h drivers/clk/bcm/clk-kona.c These implement the basic Kona clock functionality, including the clk_ops methods and various routines to manipulate registers and interpret their values. This includes some functions used to set clocks to a desired initial state (though this feature is only partially implemented here). drivers/clk/bcm/clk-kona-setup.c This contains generic run-time initialization code for data structures representing Kona CCUs and clocks. This encapsulates the clock structure initialization that can't be done statically. Note that there is a great deal of validity-checking code here, making explicit certain assumptions in the code. This is mostly useful for adding new clock definitions and could possibly be disabled for production use. drivers/clk/bcm/clk-bcm281xx.c This file defines the specific CCUs used by BCM281XX family SoCs, as well as the specific clocks implemented by each. It declares a device tree clock match entry for each CCU defined. include/dt-bindings/clock/bcm281xx.h This file defines the selector (index) values used to identify a particular clock provided by a CCU. It consists entirely of C preprocessor constants, to be used by both the C source and device tree source files. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
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