#
0ec74ad3 |
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26-Jan-2024 |
Jan Dakinevich <jan.dakinevich@salutedevices.com> |
regmap: rework ->max_register handling When regmap consists of single register, 'regmap' subsystem is unable to understand whether ->max_register is set or not, because in both cases it is equal to zero. It leads to that the logic based on value of ->max_register doesn't work. For example using of REGCACHE_FLAT fails. This patch introduces an extra parameter to regmap config, indicating that zero value in ->max_register is authentic. Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com> Link: https://lore.kernel.org/r/20240126200836.1829995-1-jan.dakinevich@salutedevices.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
fea88064 |
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03-Dec-2023 |
Matthias Reichl <hias@horus.com> |
regmap: fix bogus error on regcache_sync success Since commit 0ec7731655de ("regmap: Ensure range selector registers are updated after cache sync") opening pcm512x based soundcards fail with EINVAL and dmesg shows sync cache and pm_runtime_get errors: [ 228.794676] pcm512x 1-004c: Failed to sync cache: -22 [ 228.794740] pcm512x 1-004c: ASoC: error at snd_soc_pcm_component_pm_runtime_get on pcm512x.1-004c: -22 This is caused by the cache check result leaking out into the regcache_sync return value. Fix this by making the check local-only, as the comment above the regcache_read call states a non-zero return value means there's nothing to do so the return value should not be altered. Fixes: 0ec7731655de ("regmap: Ensure range selector registers are updated after cache sync") Cc: stable@vger.kernel.org Signed-off-by: Matthias Reichl <hias@horus.com> Link: https://lore.kernel.org/r/20231203222216.96547-1-hias@horus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
0ec77316 |
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26-Oct-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Ensure range selector registers are updated after cache sync When we sync the register cache we do so with the cache bypassed in order to avoid overhead from writing the synced values back into the cache. If the regmap has ranges and the selector register for those ranges is in a register which is cached this has the unfortunate side effect of meaning that the physical and cached copies of the selector register can be out of sync after a cache sync. The cache will have whatever the selector was when the sync started and the hardware will have the selector for the register that was synced last. Fix this by rewriting all cached selector registers after every sync, ensuring that the hardware and cache have the same content. This will result in extra writes that wouldn't otherwise be needed but is simple so hopefully robust. We don't read from the hardware since not all devices have physical read support. Given that nobody noticed this until now it is likely that we are rarely if ever hitting this case. Reported-by: Hector Martin <marcan@marcan.st> Cc: stable@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20231026-regmap-fix-selector-sync-v1-1-633ded82770d@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
78908f45 |
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17-Jul-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Let users check if a register is cached The HDA driver has a use case for checking if a register is cached which it bodges in awkwardly and unclearly. Provide an API which allows it to directly do what it's trying to do. Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230717-regmap-cache-check-v1-1-73ef688afae3@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
039fd2e4 |
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22-Jun-2023 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
regmap: cache: Revert "Add 64-bit mode support" There is no support for 64-bit data size in regmap, so there is no point to have it in regmap cache. This reverts commit 8b7663de6e2bfe3c40e1846e1c4625f33d138757. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230622183613.58762-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
b460a522 |
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18-Jul-2023 |
Mark Brown <broonie@kernel.org> |
regcache: Push async I/O request down into the rbtree cache Currently the regcache core unconditionally enables async I/O for all cache types, causing problems for the maple tree cache which dynamically allocates the buffers used to write registers to the device since async requires the buffers to be kept around until the I/O has been completed. This use of async I/O is mainly for the rbtree cache which stores data in a format directly usable for regmap_raw_write(), though there is a special case for single register writes which would also have allowed it to be used with the flat cache. It is a bit of a landmine for other caches since it implicitly converts sync operations to async, and with modern hardware it is not clear that async I/O is actually a performance win as shown by the performance work David Jander did with SPI. In multi core systems the cost of managing concurrency ends up swamping the performance benefit and almost all modern systems are multi core. Address this by pushing the enablement of async I/O down into the rbtree cache where it is actively used, avoiding surprises for other cache implementations. Reported-by: Charles Keepax <ckeepax@opensource.cirrus.com> Fixes: bfa0b38c1483 ("regmap: maple: Implement block sync for the maple tree cache") Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Tested-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230719-regcache-async-rbtree-v1-1-b03d30cf1daf@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
44e46572 |
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13-Jun-2023 |
Takashi Iwai <tiwai@suse.de> |
regmap: regcache: Don't sync read-only registers regcache_maple_sync() tries to sync all cached values no matter whether it's writable or not. OTOH, regache_sync_val() does care the wrtability and returns -EIO for a read-only register. This results in an error message like: snd_hda_codec_realtek hdaudioC0D0: Unable to sync register 0x2f0009. -5 and the sync loop is aborted incompletely. This patch adds the writable register check to regcache_sync_val() for addressing the bug above. Note that, although we may add the check in the caller side (regcache_maple_sync()), here we put in regcache_sync_val(), so that a similar case like this can be avoided in future. Fixes: f033c26de5a5 ("regmap: Add maple tree based register cache") Link: https://lore.kernel.org/r/877cs7g6f1.wl-tiwai@suse.de Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20230613112240.3361-1-tiwai@suse.de Signed-off-by: Mark Brown <broonie@kernel.org>
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#
d32758ac |
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10-Jun-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Don't check for changes in regcache_set_val() The only user of regcache_set_val() ignores the return value so we may as well not bother checking if the value we are trying to set is the same as the value already stored. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-regcache-set-val-no-ret-v1-1-9a6932760cf8@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
bfa0b38c |
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11-Jun-2023 |
Mark Brown <broonie@kernel.org> |
regmap: maple: Implement block sync for the maple tree cache For register maps where we can write multiple values in a single bus operation it is generally much faster to do so. Improve the performance of maple tree cache syncs on such devices by identifying blocks of adjacent registers that need to be written out and combining them into a single operation. Combining writes does mean that we need to allocate a scratch buffer and format the data into it but it is expected that for most cases where caches are in use the cost of I/O will be much greater than the cost of doing the allocation and format. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-regcache-maple-sync-raw-v1-1-8ddeb4e2b9ab@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f033c26d |
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29-Mar-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Add maple tree based register cache The current state of the art for sparse register maps is the rbtree cache. This works well for most applications but isn't always ideal for sparser register maps since the rbtree can get deep, requiring a lot of walking. Fortunately the kernel has a data structure intended to address this very problem, the maple tree. Provide an initial implementation of a register cache based on the maple tree to start taking advantage of it. The entries stored in the maple tree are arrays of register values, with the maple tree keys holding the register addresses. We store data in host native format rather than device native format as we do for rbtree, this will be a benefit for devices where we don't marshal data within regmap and simplifies the code but will result in additional CPU overhead when syncing the cache on devices where we do marshal data in regmap. This should work well for a lot of devices, though there's some additional areas that could be looked at such as caching the last accessed entry like we do for rbtree and trying to minimise the maple tree level locking. We should also use bulk writes rather than single register writes when resyncing the cache where possible, even if we don't store in device native format. Very small register maps may continue to to better with rbtree longer term. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230325-regcache-maple-v3-2-23e271f93dc7@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
05933e2d |
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29-Mar-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Factor out single value register syncing In order to support sparse caches that don't store data in raw format factor out the parts of the raw block sync implementation that deal with writing a single register via _regmap_write(). Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230325-regcache-maple-v3-1-23e271f93dc7@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
1e2bae6a |
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24-Mar-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Removed compressed cache support The compressed register cache support has assumptions that make it hard to cover in testing, mainly that it requires raw registers defaults be provided. Rather than either address these assumptions or leave it untested by the forthcoming KUnit tests let's remove it, the use case is quite thin and there are no current users. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230324-regcache-lzo-v1-1-08c5d63e2a5e@kernel.org
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#
2d38e861 |
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24-Mar-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Clarify error for unknown cache types The error message printed when we fail to locate the cache type the map requested says it can't find a compress type rather than a cache type, fix that. Since the compressed type is the only one currently compiled conditionally it's likely to be the missing type but that might not always be true and is still unclear. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230324-regcache-unknown-v1-1-80deecbf196b@kernel.org
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#
2c89db8f |
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25-Mar-2023 |
Mark Brown <broonie@kernel.org> |
regmap: Handle sparse caches in the default sync If there is no cache entry available we will get -ENOENT from the cache implementation, handle this gracefully and skip rather than treating it as an error. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230325-regcache-sparse-sync-v1-1-2a890239d061@kernel.org
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#
24d80fde |
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13-Mar-2023 |
Alexander Stein <alexander.stein@ew.tq-group.com> |
regmap: cache: Silence checkpatch warning checkpatch.pl warned: WARNING: ENOSYS means 'invalid syscall nr' and nothing else Align the return value to regcache_drop_region(). Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20230313071812.13577-2-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
fd883d79 |
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13-Mar-2023 |
Alexander Stein <alexander.stein@ew.tq-group.com> |
regmap: cache: Return error in cache sync operations for REGCACHE_NONE There is no sense in doing a cache sync on REGCACHE_NONE regmaps. Instead of panicking the kernel due to missing cache_ops, return an error to client driver. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20230313071812.13577-1-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
a5201d42 |
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29-Jun-2022 |
Schspa Shi <schspa@gmail.com> |
regmap: cache: Add extra parameter check in regcache_init When num_reg_defaults > 0 but reg_defaults is NULL, there will be a NULL pointer exception. Current code has no such usage, but as additional hardening, also check this to prevent any chance of crashing. Signed-off-by: Schspa Shi <schspa@gmail.com> Link: https://lore.kernel.org/r/20220629130951.63040-1-schspa@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
3d0afe9c |
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22-Jun-2022 |
Mark Brown <broonie@kernel.org> |
regmap: Don't warn about cache only mode for devices with no cache For devices with no cache it can make sense to use cache only mode as a mechanism for trapping writes to hardware which is inaccessible but since no cache is equivalent to cache bypass we force such devices into bypass mode. This means that our check that bypass and cache only mode aren't both enabled simultanously is less sensible for devices without a cache so relax it. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220622171723.1235749-1-broonie@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
72607f37 |
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03-Jun-2022 |
Xiang wangx <wangxiang@cdjrlc.com> |
regmap: cache: Fix syntax errors in comments Delete the redundant word 'the'. Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com> Link: https://lore.kernel.org/r/20220604041603.9697-1-wangxiang@cdjrlc.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
d6409475 |
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25-Apr-2022 |
Jeongtae Park <jtp.park@samsung.com> |
regmap: cache: set max_register with reg_stride Current logic does not consider multi-stride cases, the max_register have to calculate with reg_stride because it is a kind of address range. Signed-off-by: Jeongtae Park <jtp.park@samsung.com> Link: https://lore.kernel.org/r/20220425114613.15934-1-jtp.park@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
b67498d6 |
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21-Jan-2021 |
Jiapeng Zhong <abaci-bugfix@linux.alibaba.com> |
regmap: Assign boolean values to a bool variable Fix the following coccicheck warnings: ./drivers/base/regmap/regcache.c:71:3-18: WARNING: Assignment of 0/1 to bool variable. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com> Link: https://lore.kernel.org/r/1611215961-33725-1-git-send-email-abaci-bugfix@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
05669b63 |
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17-Sep-2020 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
regmap: fix page selection for noinc writes Non-incrementing writes can fail if register + length crosses page border. However for non-incrementing writes we should not check for page border crossing. Fix this by passing additional flag to _regmap_raw_write and passing length to _regmap_select_page basing on the flag. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: cdf6b11daa77 ("regmap: Add regmap_noinc_write API") Link: https://lore.kernel.org/r/20200917153405.3139200-2-dmitry.baryshkov@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
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#
37613fa5 |
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25-Apr-2019 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
regmap: add proper SPDX identifiers on files that did not have them. There were a few files in the regmap code that did not have SPDX identifiers on them, so fix that up. At the same time, remove the "free form" text that specified the license of the file, as that is impossible for any tool to properly parse. Also, as Mark loves // comment markers, convert all of the headers to be the same to make things look consistent :) Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f458e610 |
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08-Jun-2017 |
Mark Brown <broonie@kernel.org> |
regmap: Fix typo in IS_ENABLED() check Reported-by: Andreas Ziegler <andreas.ziegler@fau.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
34a730aa |
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02-Jun-2017 |
Jonas Gorski <jonas.gorski@gmail.com> |
regmap: make LZO cache optional Commit 2cbbb579bcbe3 ("regmap: Add the LZO cache support") added support for LZO compression in regcache, but there were never any users added afterwards. Since LZO support itself has its own size, it currently is rather a deoptimization. So make it optional by introducing a symbol that can be selected by drivers wanting to make use of it. Saves e.g. ~46 kB on MIPS (size of LZO support + regcache LZO code). Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
2cf8e2df |
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12-Jan-2017 |
Charles Keepax <ckeepax@opensource.wolfsonmicro.com> |
regmap: Fixup the kernel-doc comments on functions/structures Most of the kernel-doc comments in regmap don't actually generate correctly. This patch fixes up a few common issues, corrects some typos and adds some missing argument descriptions. The most common issues being using a : after the function name which causes the short description to not render correctly and not separating the long and short descriptions of the function. There are quite a few instances of arguments not being described or given the wrong name as well. This patch doesn't fixup functions/structures that are currently missing descriptions. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
b2c7f5d9 |
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29-Jul-2016 |
Maarten ter Huurne <maarten@treewalker.org> |
regmap: cache: Fix num_reg_defaults computation from reg_defaults_raw In 3245d460 (regmap: cache: Fall back to register by register read for cache defaults) non-readable registers are skipped when initializing reg_defaults, but are still included in num_reg_defaults. So there can be uninitialized entries at the end of reg_defaults, which can cause problems when the register cache initializes from the full array. Fixed it by excluding non-readable registers from the count as well. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
267c8586 |
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23-Mar-2016 |
Andrew F. Davis <afd@ti.com> |
regmap: cache: Fix typo in cache_bypass parameter description Setting the flag 'cache_bypass' will bypass the cache not the hardware. Fix this comment here. Fixes: 0eef6b0415f5 ("regmap: Fix doc comment") Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
3245d460 |
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02-Feb-2016 |
Mark Brown <broonie@kernel.org> |
regmap: cache: Fall back to register by register read for cache defaults If we are unable to read the cache defaults for a regmap then fall back on attempting to read them word by word. This is going to be painfully slow for large regmaps but might be adequate for smaller ones. Signed-off-by: Mark Brown <broonie@kernel.org> [maciej: Use cache_bypass around read and skipping of unreadable regs] Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
d51fe1f3 |
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13-Jan-2016 |
Maciej S. Szmigiero <mail@maciej.szmigiero.name> |
regmap: pass buffer size to regmap_raw_read() in regcache_hw_init() regcache_hw_init() uses regmap_raw_read() to initialize cache when reg_defaults_raw isn't provided. The last parameter to regmap_raw_read() is buffer size in bytes, however regcache_hw_init() called it with number of registers to read instead, which cause problem if they aren't one byte wide in cache. This wasn't triggered by any of current in-tree drivers since they either have one-byte registers or provide reg_defaults_raw explicitly. Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
167f7066 |
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10-Dec-2015 |
Xiubo Li <lixiubo@cmss.chinamobile.com> |
regmap: cache: Move the num_reg_defaults check as early as possible If the register defaults are provided by the driver without the number by mistake, it should just return an error with one promotion. This should be as early as possible, then there is no need to verify the register defaults' stride and the other code followed. Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
8cfe2fd3 |
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10-Dec-2015 |
Xiubo Li <lixiubo@cmss.chinamobile.com> |
regmap: cache: Add warning info for the cache check If there is no cache used for the drivers, the register defaults or the register defaults raw are not need any more. This patch will check this and print a warning. Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
8b7663de |
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08-Dec-2015 |
Xiubo Li <lixiubo@cmss.chinamobile.com> |
regmap: cache: Add 64-bit mode support Since the mmio has support the 64-bit has been supported for the 64-bit platform, so should the regcache core too. Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
2fd6902e |
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08-Dec-2015 |
Xiubo Li <lixiubo@cmss.chinamobile.com> |
regmap: cache: To suppress the noise of checkpatch There will be some warning like the following when checking new patches near this code: "WARNING: Missing a blank line after declarations" This patch will suppress this warning. Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
621a5f7a |
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26-Sep-2015 |
Viresh Kumar <viresh.kumar@linaro.org> |
debugfs: Pass bool pointer to debugfs_create_bool() Its a bit odd that debugfs_create_bool() takes 'u32 *' as an argument, when all it needs is a boolean pointer. It would be better to update this API to make it accept 'bool *' instead, as that will make it more consistent and often more convenient. Over that bool takes just a byte. That required updates to all user sites as well, in the same commit updating the API. regmap core was also using debugfs_{read|write}_file_bool(), directly and variable types were updated for that to be bool as well. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
67921a1a |
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21-Aug-2015 |
Markus Pargmann <mpa@pengutronix.de> |
regmap: Split use_single_rw internally into use_single_read/write use_single_rw currently reflects the capabilities of the connected device. The capabilities of the bus are currently missing for this variable. As there are read only and write only buses we need seperate values for use_single_rw to also reflect tha capabilities of the bus. This patch splits use_single_rw into use_single_read and use_single_write. The initialization is changed to check the configuration for use_single_rw and to check the capabilities of the used bus. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
1c79771a |
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05-May-2015 |
Kevin Cernekee <cernekee@chromium.org> |
regmap: Use regcache_mark_dirty() to indicate power loss or reset Existing regmap users call regcache_mark_dirty() as part of the suspend/resume sequence, to tell regcache that non-default values need to be resynced post-resume. Add an internal "no_sync_defaults" regmap flag to remember this state, so that regcache_sync() can differentiate between these two cases: 1) HW was reset, so any cache values that match map->reg_defaults can be safely skipped. On some chips there are a lot of registers in the reg_defaults list, so this optimization speeds things up quite a bit. 2) HW was not reset (maybe it was just clock-gated), so if we cached any writes, they should be sent to the hardware regardless of whether they match the HW default. Currently this will write out all values in the regcache, since we don't maintain per-register dirty bits. Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Kevin Cernekee <cernekee@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
3969fa08 |
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05-May-2015 |
Kevin Cernekee <cernekee@chromium.org> |
regmap: Add a helper function for regcache sync test We're going to add another "does this register need syncing?" check, so rather than repeating it in three places, we'll separate all of the relevant logic into a helper function. Signed-off-by: Kevin Cernekee <cernekee@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f58078da |
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19-Mar-2015 |
Steven Rostedt <rostedt@goodmis.org> |
regmap: Move tracing header into drivers/base/regmap The tracing events for regmap are confined to the regmap subsystem. It also requires accessing an internal header. Instead of including the internal header from a generic file location, move the tracing file into the regmap directory. Also rename the regmap tracing header to trace.h, as it is redundant to keep the regmap.h name when it is in the regmap directory. Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
c6b570d9 |
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08-Mar-2015 |
Philipp Zabel <p.zabel@pengutronix.de> |
regmap: introduce regmap_name to fix syscon regmap trace events This patch fixes a NULL pointer dereference when enabling regmap event tracing in the presence of a syscon regmap, introduced by commit bdb0066df96e ("mfd: syscon: Decouple syscon interface from platform devices"). That patch introduced syscon regmaps that have their dev field set to NULL. The regmap trace events expect it to point to a valid struct device and feed it to dev_name(): $ echo 1 > /sys/kernel/debug/tracing/events/regmap/enable Unable to handle kernel NULL pointer dereference at virtual address 0000002c pgd = 80004000 [0000002c] *pgd=00000000 Internal error: Oops: 17 [#1] SMP ARM Modules linked in: coda videobuf2_vmalloc CPU: 0 PID: 304 Comm: kworker/0:2 Not tainted 4.0.0-rc2+ #9197 Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) Workqueue: events_freezable thermal_zone_device_check task: 9f25a200 ti: 9f1ee000 task.ti: 9f1ee000 PC is at ftrace_raw_event_regmap_block+0x3c/0xe4 LR is at _regmap_raw_read+0x1bc/0x1cc pc : [<803636e8>] lr : [<80365f2c>] psr: 600f0093 sp : 9f1efd78 ip : 9f1efdb8 fp : 9f1efdb4 r10: 00000004 r9 : 00000001 r8 : 00000001 r7 : 00000180 r6 : 00000000 r5 : 9f00e3c0 r4 : 00000003 r3 : 00000001 r2 : 00000180 r1 : 00000000 r0 : 9f00e3c0 Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 2d91004a DAC: 00000015 Process kworker/0:2 (pid: 304, stack limit = 0x9f1ee210) Stack: (0x9f1efd78 to 0x9f1f0000) fd60: 9f1efda4 9f1efd88 fd80: 800708c0 805f9510 80927140 800f0013 9f1fc800 9eb2f490 00000000 00000180 fda0: 808e3840 00000001 9f1efdfc 9f1efdb8 80365f2c 803636b8 805f8958 800708e0 fdc0: a00f0013 803636ac 9f16de00 00000180 80927140 9f1fc800 9f1fc800 9f1efe6c fde0: 9f1efe6c 9f732400 00000000 00000000 9f1efe1c 9f1efe00 80365f70 80365d7c fe00: 80365f3c 9f1fc800 9f1fc800 00000180 9f1efe44 9f1efe20 803656a4 80365f48 fe20: 9f1fc800 00000180 9f1efe6c 9f1efe6c 9f732400 00000000 9f1efe64 9f1efe48 fe40: 803657bc 80365634 00000001 9e95f910 9f1fc800 9f1efeb4 9f1efe8c 9f1efe68 fe60: 80452ac0 80365778 9f1efe8c 9f1efe78 9e93d400 9e93d5e8 9f1efeb4 9f72ef40 fe80: 9f1efeac 9f1efe90 8044e11c 80452998 8045298c 9e93d608 9e93d400 808e1978 fea0: 9f1efecc 9f1efeb0 8044fd14 8044e0d0 ffffffff 9f25a200 9e93d608 9e481380 fec0: 9f1efedc 9f1efed0 8044fde8 8044fcec 9f1eff1c 9f1efee0 80038d50 8044fdd8 fee0: 9f1ee020 9f72ef40 9e481398 00000000 00000008 9f72ef54 9f1ee020 9f72ef40 ff00: 9e481398 9e481380 00000008 9f72ef40 9f1eff5c 9f1eff20 80039754 80038bfc ff20: 00000000 9e481380 80894100 808e1662 00000000 9e4f2ec0 00000000 9e481380 ff40: 800396f8 00000000 00000000 00000000 9f1effac 9f1eff60 8003e020 80039704 ff60: ffffffff 00000000 ffffffff 9e481380 00000000 00000000 9f1eff78 9f1eff78 ff80: 00000000 00000000 9f1eff88 9f1eff88 9e4f2ec0 8003df30 00000000 00000000 ffa0: 00000000 9f1effb0 8000eb60 8003df3c 00000000 00000000 00000000 00000000 ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff ffffffff Backtrace: [<803636ac>] (ftrace_raw_event_regmap_block) from [<80365f2c>] (_regmap_raw_read+0x1bc/0x1cc) r9:00000001 r8:808e3840 r7:00000180 r6:00000000 r5:9eb2f490 r4:9f1fc800 [<80365d70>] (_regmap_raw_read) from [<80365f70>] (_regmap_bus_read+0x34/0x6c) r10:00000000 r9:00000000 r8:9f732400 r7:9f1efe6c r6:9f1efe6c r5:9f1fc800 r4:9f1fc800 [<80365f3c>] (_regmap_bus_read) from [<803656a4>] (_regmap_read+0x7c/0x144) r6:00000180 r5:9f1fc800 r4:9f1fc800 r3:80365f3c [<80365628>] (_regmap_read) from [<803657bc>] (regmap_read+0x50/0x70) r9:00000000 r8:9f732400 r7:9f1efe6c r6:9f1efe6c r5:00000180 r4:9f1fc800 [<8036576c>] (regmap_read) from [<80452ac0>] (imx_get_temp+0x134/0x1a4) r6:9f1efeb4 r5:9f1fc800 r4:9e95f910 r3:00000001 [<8045298c>] (imx_get_temp) from [<8044e11c>] (thermal_zone_get_temp+0x58/0x74) r7:9f72ef40 r6:9f1efeb4 r5:9e93d5e8 r4:9e93d400 [<8044e0c4>] (thermal_zone_get_temp) from [<8044fd14>] (thermal_zone_device_update+0x34/0xec) r6:808e1978 r5:9e93d400 r4:9e93d608 r3:8045298c [<8044fce0>] (thermal_zone_device_update) from [<8044fde8>] (thermal_zone_device_check+0x1c/0x20) r5:9e481380 r4:9e93d608 [<8044fdcc>] (thermal_zone_device_check) from [<80038d50>] (process_one_work+0x160/0x3d4) [<80038bf0>] (process_one_work) from [<80039754>] (worker_thread+0x5c/0x4f4) r10:9f72ef40 r9:00000008 r8:9e481380 r7:9e481398 r6:9f72ef40 r5:9f1ee020 r4:9f72ef54 [<800396f8>] (worker_thread) from [<8003e020>] (kthread+0xf0/0x108) r10:00000000 r9:00000000 r8:00000000 r7:800396f8 r6:9e481380 r5:00000000 r4:9e4f2ec0 [<8003df30>] (kthread) from [<8000eb60>] (ret_from_fork+0x14/0x34) r7:00000000 r6:00000000 r5:8003df30 r4:9e4f2ec0 Code: e3140040 1a00001a e3140020 1a000016 (e596002c) ---[ end trace 193c15c2494ec960 ]--- Fixes: bdb0066df96e (mfd: syscon: Decouple syscon interface from platform devices) Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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#
4ceba98d |
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04-Mar-2015 |
Takashi Iwai <tiwai@suse.de> |
regmap: Skip read-only registers in regcache_sync() regcache_sync() spews warnings when a value was cached for a read-only register as it tries to write all registers no matter whether they are writable or not. This patch adds regmap_wrtieable() checks for avoiding it in regcache_sync_block_single() and regcache_block_raw(). Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
e39be3a3 |
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09-Oct-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
regmap: cache: Sort include headers alphabetically If the inlcude headers aren't sorted alphabetically, then the logical choice is to append new ones, however that creates a lot of potential for conflicts or duplicates because every change will then add new includes in the same location. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
fb70067e |
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09-Oct-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
regmap: cache: Fix possible ZERO_SIZE_PTR pointer dereferencing error. When all the registers are volatile(unlikely, but logically and mostly will happen for some 'device' who has very few registers), then the count will be euqal to 0, then kmalloc() will return ZERO_SIZE_PTR, which equals to ((void *)16). So this patch fix this with just doing the zero check before calling kmalloc(). If the count == 0, so we can make sure that all the registers are volatile, so no cache is need. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
06f9c24e |
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09-Oct-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
regmap: cache: use kmalloc_array instead of kmalloc This patch fixes checkpatch.pl warning for regmap cache. WARNING : prefer kmalloc_array over kmalloc with multiply Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
fbba43c5 |
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09-Oct-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
regmap: cache: speed regcache_hw_init() up. This may speed regcache_hw_init() up for some cases that there has volatile registers. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
ba3f1c85 |
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09-Oct-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
regmap: cache: fix errno in regcache_hw_init() When kmalloc() fails, we should return -ENOMEM. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
5bd83ed0 |
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09-Oct-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
regmap: cache: cleanup regcache_hw_init() Remove the redundant code for regmap cache. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
439e8211 |
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09-Oct-2014 |
Xiubo Li <Li.Xiubo@freescale.com> |
regmap: cache: fix errno in regcache_hw_init() When kmalloc() fails, we should return -ENOMEM. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f29a4320 |
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16-Sep-2014 |
Jarkko Nikula <jarkko.nikula@linux.intel.com> |
regmap: cache: Do not fail silently from regcache_sync calls Call stack of regcache_sync calls may not emit any error message even if operation was cancelled due an error in I/O driver. One such a silent error is for instance if I2C bus driver doesn't receive ACK from the I2C device and returns -EREMOTEIO. Since many users of regcache_sync() don't check and print the error there is no any indication that HW registers are potentially out of sync. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
5c1ebe7f |
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27-Aug-2014 |
Mark Brown <broonie@linaro.org> |
regmap: Don't attempt block writes when syncing cache on single_rw devices If the device can't support block writes then don't attempt to use raw syncing which will automatically generate block writes for adjacent registers, use the existing _single() block syncing implementation. Reported-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org
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83f8475c |
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18-Mar-2014 |
Dylan Reid <dgreid@chromium.org> |
regmap: cache: Don't attempt to sync non-writeable registers In the regcache_default_sync, if a register isn't writeable, then _regmap_write will return an error and the rest of the sync will be aborted. Avoid this by checking if a register is writeable before trying to sync it. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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75617328 |
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18-Mar-2014 |
Dylan Reid <dgreid@chromium.org> |
regmap: cache: Step by stride in default sync The default sync operation was still assuming a stride of one, fix it to respect the reg_stride set in the map. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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#
7a7a70b4 |
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21-Feb-2014 |
Charles Keepax <ckeepax@opensource.wolfsonmicro.com> |
regmap: Check stride of register patch as we register it Currently, we check the registers in the patch are aligned to the register stride everytime we sync the cache and the first time the patch is written out is unchecked. This patch checks the register patch when we first register it so the first writes are no longer unchecked and then doesn't check on subsequent syncs as the patch will be unchanged. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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#
78ba73ee |
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24-Jan-2014 |
Dylan Reid <dgreid@chromium.org> |
regmap: cache: Handle stride > 1 in sync_block_raw_flush regcache_sync_block_raw_flush takes the address of the base register and the address of one past the last register to write to. "count" is the number of registers in the range, not the number of bytes, it should be (end addr - start addr) / stride. Without accounting for strides greater than one, registers past the end might be synced or the writeable_reg callback at the beginning of _regmap_raw_write will fail and nothing will be written. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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affbe886 |
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10-Oct-2013 |
Mark Brown <broonie@linaro.org> |
regmap: Use async I/O during cache sync Try to speed up I/O a little by not synchronising until we are finished scheduling writes. A brief survey of existing users suggests we have none that would currently benefit from an async cache sync. Signed-off-by: Mark Brown <broonie@linaro.org>
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0a819809 |
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08-Oct-2013 |
Mark Brown <broonie@linaro.org> |
regmap: Simplify the initiation of async I/O Rather than passing a flag around through the entire call stack store it in the regmap struct and read it when required. This minimises the visibility of the feature through the API, minimising the code updates needed to use it more widely. Signed-off-by: Mark Brown <broonie@linaro.org>
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3f4ff561 |
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29-Aug-2013 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: rbtree: Make cache_present bitmap per node With devices which have a dense and small register map but placed at a large offset the global cache_present bitmap imposes a huge memory overhead. Making the cache_present per rbtree node avoids the issue and easily reduces the memory footprint by a factor of ten. For devices with a more sparse map or without a large base register offset the memory usage might increase slightly by a few bytes, but not significantly. E.g. for a device which has ~50 registers at offset 0x4000 the memory footprint of the register cache goes down form 2496 bytes to 175 bytes. Moving the bitmap to a per node basis means that the handling of the bitmap is now cache implementation specific and can no longer be managed by the core. The regcache_sync_block() function is extended by a additional parameter so that the cache implementation can tell the core which registers in the block are set and which are not. The parameter is optional and if NULL the core assumes that all registers are set. The rbtree cache also needs to implement its own drop callback instead of relying on the core to handle this. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
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515f2261 |
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08-Aug-2013 |
Ionut Nicu <ioan.nicu.ext@nsn.com> |
regmap: regcache: allow read-only regs to be cached The regmap_writeable() check should not be done in regcache_write() because this prevents read-only registers to be cached. After a read on a read-only register its value will not be stored in the cache and the next time someone will try to read it the value will be read from the bus instead of the cache. Instead the regmap_writeable() check should be done in _regmap_write() to prevent callers from writing to read-only registers. Signed-off-by: Ionut Nicu <ioan.nicu.ext@nsn.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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2d49b598 |
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05-Aug-2013 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: cache: Make sure to sync the last register in a block regcache_sync_block_raw_flush() expects the address of the register after last register that needs to be synced as its parameter. But the last call to regcache_sync_block_raw_flush() in regcache_sync_block_raw() passes the address of the last register in the block. This effectively always skips over the last register in a block, even if it needs to be synced. In order to fix it increase the address by one register. The issue was introduced in commit 75a5f89 ("regmap: cache: Write consecutive registers in a single block write"). Cc: stable@vger.kernel.org # 3.10+ Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
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d856fce4 |
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02-Jun-2013 |
Maarten ter Huurne <maarten@treewalker.org> |
regmap: Implemented default cache sync operation This can be used for cache types for which syncing values one by one is equally efficient as syncing a range, such as the flat cache. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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f20c783c |
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23-May-2013 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: regcache: Fixup locking for custom lock callbacks The parameter passed to the regmap lock/unlock callbacks needs to be map->lock_arg, regcache passes just map. This works fine in the case that no custom locking callbacks are used since in this case map->lock_arg equals map, but will break when custom locking callbacks are used. The issue was introduced in commit 0d4529c5("regmap: make lock/unlock functions customizable") and is fixed by this patch. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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81485f52 |
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23-May-2013 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: regcache: Fixup locking for custom lock callbacks The parameter passed to the regmap lock/unlock callbacks needs to be map->lock_arg, regcache passes just map. This works fine in the case that no custom locking callbacks are used, since in this case map->lock_arg equals map, but will break when custom locking callbacks are used. The issue was introduced in commit 0d4529c5 ("regmap: make lock/unlock functions customizable") and is fixed by this patch. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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697e85bc |
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08-May-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Add support for discarding parts of the register cache Allow drivers to discard parts of the register cache, for example if part of the hardware has been reset. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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9659293c |
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04-Apr-2013 |
Stratos Karafotis <stratosk@semaphore.gr> |
regmap: cache: Fix format specifier in dev_dbg Fix format specifier in dev_dbg and suppress the following warning drivers/base/regmap/regcache.c: In function ‘regcache_sync_block_raw_flush’: drivers/base/regmap/regcache.c:593:2: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t’ [-Wformat] Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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f52687af |
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04-Apr-2013 |
Sachin Kamat <sachin.kamat@linaro.org> |
regmap: cache: Make regcache_sync_block_raw static regcache_sync_block_raw is used only in this file. Hence make it static. Silences the following warning: drivers/base/regmap/regcache.c:608:5: warning: symbol 'regcache_sync_block_raw' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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75a5f89f |
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29-Mar-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Write consecutive registers in a single block write When syncing blocks of data using raw writes combine the writes into a single block write, saving us bus overhead for setup, addressing and teardown. Currently the block write is done unconditionally as it is expected that hardware which has a register format which can support raw writes will support auto incrementing writes, this decision may need to be revised in future. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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#
cfdeb8c3 |
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29-Mar-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Split raw and non-raw syncs For code clarity after implementing block writes split out the raw and non-raw I/O sync implementations. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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#
f8bd822c |
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29-Mar-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Factor out block sync The idea of holding blocks of registers in device format is shared between at least rbtree and lzo cache formats so split out the loop that does the sync from the rbtree code so optimisations on it can be reused. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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#
78493f2d |
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29-Mar-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Factor out reg_present support from rbtree cache The idea of maintaining a bitmap of present registers is something that can usefully be used by other cache types that maintain blocks of cached registers so move the code out of the rbtree cache and into the generic regcache code. Refactor the interface slightly as we go to wrap the set bit and enlarge bitmap operations (since we never do one without the other) and make it more robust for reads of uncached registers by bounds checking before we look at the bitmap. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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#
8817796b |
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13-Mar-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Provide a get address of value operation Provide a helper to do the size based index into a block of registers and use it when reading a value. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
eb4cb76f |
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21-Feb-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Store caches in native register format where possible This allows the cached data to be sent directly to the device when we sync it. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
325acab4 |
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21-Feb-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Use regcache_get_value() to check if we updated Factor things out a little. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
879082c9 |
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21-Feb-2013 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: cache: Pass the map rather than the word size when updating values It's more idiomatic to pass the map structure around and this means we can use other bits of information from the map. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
2ac902ce |
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19-Dec-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: flat: Add flat cache type While for I2C and SPI devices the overhead of using rbtree for devices with only one block of registers is negligible the same isn't always going to be true for MMIO devices where the I/O costs are very much lower. Cater for these devices by adding a simple flat array type for them where the lookups are simple array accesses, taking us right back to the original ASoC cache implementation. Thanks to Magnus Damm for the discussion which prompted this. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
edc9ae42 |
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09-Apr-2012 |
Stephen Warren <swarren@nvidia.com> |
regmap: implement register striding regmap_config.reg_stride is introduced. All extant register addresses are a multiple of this value. Users of serial-oriented regmap busses will typically set this to 1. Users of the MMIO regmap bus will typically set this based on the value size of their registers, in bytes, so 4 for a 32-bit register. Throughout the regmap code, actual register addresses are used. Wherever the register address is used to index some array of values, the address is divided by the stride to determine the index, or vice-versa. Error- checking is added to all entry-points for register address data to ensure that register addresses actually satisfy the specified stride. The MMIO bus ensures that the specified stride is large enough for the register size. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
a42678c4 |
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04-Apr-2012 |
Stephen Warren <swarren@nvidia.com> |
regmap: introduce fast_io busses, and use a spinlock for them Some bus types have very fast IO. For these, acquiring a mutex for every IO operation is a significant overhead. Allow busses to indicate their IO is fast, and enhance regmap to use a spinlock for those busses. [Currently limited to native endian registers -- broonie] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
f01ee60f |
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09-Apr-2012 |
Stephen Warren <swarren@nvidia.com> |
regmap: implement register striding regmap_config.reg_stride is introduced. All extant register addresses are a multiple of this value. Users of serial-oriented regmap busses will typically set this to 1. Users of the MMIO regmap bus will typically set this based on the value size of their registers, in bytes, so 4 for a 32-bit register. Throughout the regmap code, actual register addresses are used. Wherever the register address is used to index some array of values, the address is divided by the stride to determine the index, or vice-versa. Error- checking is added to all entry-points for register address data to ensure that register addresses actually satisfy the specified stride. The MMIO bus ensures that the specified stride is large enough for the register size. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
bacdbe07 |
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04-Apr-2012 |
Stephen Warren <swarren@nvidia.com> |
regmap: introduce fast_io busses, and use a spinlock for them Some bus types have very fast IO. For these, acquiring a mutex for every IO operation is a significant overhead. Allow busses to indicate their IO is fast, and enhance regmap to use a spinlock for those busses. [Currently limited to native endian registers -- broonie] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
e466de05 |
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03-Apr-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Export regcache_sync_region() regcache_sync_region() isn't going to be useful to most drivers if we don't export it since otherwise they can't use it when built modular. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
51990e82 |
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22-Jan-2012 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
device.h: cleanup users outside of linux/include (C files) For files that are actively using linux/device.h, make sure that they call it out. This will allow us to clean up some of the implicit uses of linux/device.h within include/* without introducing build regressions. Yes, this was created by "cheating" -- i.e. the headers were cleaned up, and then the fallout was found and fixed, and then the two commits were reordered. This ensures we don't introduce build regressions into the git history. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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#
4d4cfd16 |
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23-Feb-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Allow drivers to sync only part of the register cache Provide a regcache_sync_region() operation which allows drivers to write only part of the cache back to the hardware. This is intended for use in cases like power domains or DSP memories where part of the device register map may be reset without fully resetting the device. Fully supporting these devices is likely to require additional work to make specific regions of the register map cache only while they are in reset, but this is enough for most devices. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
ac8d91c8 |
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23-Feb-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Supply ranges to the sync operations In order to allow us to support partial sync operations add minimum and maximum register arguments to the sync operation and update the rbtree and lzo caches to use this new information. The LZO implementation is obviously not good, we could exit the iteration earlier, but there may be room for more wide reaching optimisation there. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
5d5b7d4f |
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23-Feb-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Add tracepoints for cache only and cache bypass Useful for figuring out where the hardware interaction went or came from. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
6ff73738 |
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23-Feb-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Mark the cache as clean after a successful sync Previously the cache would never be marked clean, meaning syncs would never be suppressed which isn't the end of the world but could be inefficient. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
c3ec2328 |
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23-Feb-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Remove default cache sync implementation It's not used as all cache types have sync operations so it's just dead code which never gets tested. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
7d5e525b |
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17-Feb-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Implement support for 32 bit registers and values Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
df00c79f |
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17-Feb-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
regmap: Bypassing cache when initializing cache During regcache_init, if client has not passed the default data of cached register then it is directly read from the hw to initialize cache. This hw register read happens before cache ops are initialized and hence avoiding register read to check for the data available on cache or not by enabling flag of cache_bypass. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
61cddc57 |
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15-Feb-2012 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Fix cache defaults initialization from raw cache defaults Currently registers with a value of 0 are ignored when initializing the register defaults from raw defaults. This worked in the past, because registers without a explicit default were assumed to have a default value of 0. This was changed in commit b03622a8 ("regmap: Ensure rbtree syncs registers set to zero properly"). As a result registers, which have a raw default value of 0 are now assumed to have no default. This again can result in unnecessary writes when syncing the cache. It will also result in unnecessary reads for e.g. the first update operation. In the case where readback is not possible this will even let the update operation fail, if the register has not been written to before. So this patch removes the check. Instead it adds a check to ignore raw defaults for registers which are volatile, since those registers are not cached. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
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#
aa795d12 |
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30-Jan-2012 |
Axel Lin <axel.lin@gmail.com> |
regmap: Remove incorrect unreachable comment in regcache_set_val() regcache_set_val() returns false if cache[idx] != val. Thus it actually is not unreachable. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
8a892d69 |
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25-Jan-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Bypass the cache when applying patches Otherwise any patch that affects a register which is writable may trash cached values. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
d9db7627 |
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25-Jan-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Skip patch application when the cache is not dirty on sync On the basis that if we don't actually need to resync the cache then the patches are probably also already applied. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
7e53b195 |
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25-Jan-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Unexport regcache_write() and regcache_read() They have no current users which is fortunate as they don't take the lock and therefore aren't safe to use externally. We'll need to add new operations if direct cache access is needed. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
22f0d90a |
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20-Jan-2012 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Support register patch sets Device manufacturers frequently provide register sequences, usually not fully documented, to be run at startup in order to provide better defaults for devices (for example, improving performance in the light of silicon evaluation). Support such updates by allowing drivers to register update sets with the core. These updates will be written to the device immediately and will also be rewritten when the cache is synced. The assumption is that the reason for resyncing the cache will always be that the device has been powered off. If this turns out to not be the case then a separate operation can be provided. Currently the implementation only allows a single set of updates to be specified for a device, this could be extended in future. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
94f9ec93 |
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16-Nov-2011 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Move initialization of regcache related fields to regcache_init Move the initialization regcache related fields of the regmap struct to regcache_init. This allows us to keep regmap and regcache code better separated. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
bc7ee556 |
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30-Nov-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Add trace event for successful cache reads Currently we only trace physical reads, there's no instrumentation if the read is satisfied from cache. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
4c691664 |
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18-Nov-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Remove indexed cache type There should be no situation where it offers any advantage over rbtree and there are no current users so remove the code for simplicity. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
b44d48c1 |
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16-Nov-2011 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Drop check whether a register is readable in regcache_read One of the reasons for using a cache is to have a software shadow of a register which is writable but not readable. This allows us to do a read-modify-write operation on such a register. Currently regcache checks whether a register is readable when performing a cached read and returns an error if it is not. Drop this check, since it will prevent us from using the cache for registers where read-back is not possible. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
064d4db1 |
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16-Nov-2011 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Properly round cache_word_size regcache currently only properly works with val bit sizes of 8 or 16, since it will, when calculating the cache word size, round down. This causes the cache storage to be too small to hold the full register value. Fix this by rounding up instead. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
720e4616 |
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16-Nov-2011 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Make reg_config reg_defaults const The reg_defaults field usually points to a static per driver array, which should not be modified. Make requirement this explicit by making reg_defaults const. To allow this the regcache_init code needs some minor changes. Previoulsy the reg_config was not available in regcache_init and regmap->reg_defaults was used to pass the default register set to regcache_init. Now that the reg_config is available we can work on it directly. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
e5e3b8ab |
|
16-Nov-2011 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Move initialization of regcache related fields to regcache_init Move the initialization regcache related fields of the regmap struct to regcache_init. This allows us to keep regmap and regcache code better separated. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
bd061c78 |
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14-Nov-2011 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Fix memory leak in regcache_init error path Make sure all allocated memory gets freed again in case initializing the cache failed. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
021cd616 |
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14-Nov-2011 |
Lars-Peter Clausen <lars@metafoo.de> |
regmap: Fix memory leak in regcache_hw_init error path Make sure reg_defaults_raw gets freed in case of an error. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
8ae0d7e8 |
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26-Oct-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Track if the register cache is dirty and suppress unneeded syncs Allow drivers to optimise out the register cache sync if they didn't need to do one. If the hardware is desynced from the register cache (by power loss for example) then the driver should call regcache_mark_dirty() to let the core know about this. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
1b6bc32f |
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27-May-2011 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
drivers/base: Add export.h for EXPORT_SYMBOL/THIS_MODULE as required. Most of these files were implicitly getting EXPORT_SYMBOL via device.h which was including module.h, but that path will be broken soon. [ with input from Stephen Rothwell <sfr@canb.auug.org.au> ] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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#
8528bdd4 |
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09-Oct-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Allow caches for devices with no defaults We only really need the defaults in order to cut down the number of registers we sync and to satisfy reads while the device is powered off but not all devices are going to need to do that (always on devices like PMICs being the prime example) so don't require those devices to supply a default. Instead only try to fall back to hardware defaults if the driver told us to. Devices using LZO won't be able to instantiate with this, that will require some updates in the LZO code to handle this case. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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#
6e6ace00 |
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09-Oct-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Return a sensible error code if we fail to read the cache If a register isn't cached then let callers know that so they can fall back or error handle appropriately. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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#
f094fea6 |
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04-Oct-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Use bsearch() to search the register defaults Rather than open coding a binary search use the standard bsearch() using the comparison function we're already using for sort() on insert. This fixes a lockup I was observing due to iterating on min <= max rather than min < max when we fail to look up. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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#
0eef6b04 |
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02-Oct-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Fix doc comment Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
c08604b8 |
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03-Oct-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Optimize the lookup path to use binary search Since there are more lookups than insertions in a typical scenario, optimize the linear search into a binary search. For this to work, we need to keep reg_defaults sorted upon insertions, for now be lazy and use sort(). Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
ac77a765 |
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29-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Ensure we scream if we enable cache bypass/only at the same time Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
6eb0f5e0 |
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29-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Implement regcache_cache_bypass helper function Ensure we've got a function so users can enable/disable the cache bypass option. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
beb1a10f |
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29-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Save/restore the bypass state upon syncing Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
13753a90 |
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29-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Lock the sync path, ensure we use the lockless _regmap_write() Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
5fcd2560 |
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29-Sep-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Fix apostrophe usage An apostrophe does not mean "look out, here comes an s!". Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
2cd148f1 |
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29-Sep-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Fix lock used for regcache_cache_only() Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
38f69169 |
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28-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Grab the lock in regcache_cache_only() Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
ec8a365f |
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28-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Modify map->cache_bypass directly In preperation for the upcoming patches, modify map->cache_bypass directly. The helper functions will grab an exclusive lock. Because we'll have acquired the same lock we need to avoid a deadlock. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
a40c2823 |
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28-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Fix regcache_sync generic implementation We want to use regmap_write() to actually write anything to the HW. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
954757d7 |
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27-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Implement generic syncing functionality In the absence of a sync callback, do it manually. This of course can't take advantange of the specific optimizations of each cache type but it will do well enough in most cases. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
92afb286 |
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19-Sep-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: Allow drivers to control cache_only flag Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
e7a6db30 |
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19-Sep-2011 |
Mark Brown <broonie@opensource.wolfsonmicro.com> |
regmap: A cache type of _NONE behaves like a bypassed cache Avoid extra special casing by setting the cache_bypass flag when we're not caching. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
59360089 |
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19-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Add the regcache_sync trace event Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
2cbbb579 |
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19-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Add the LZO cache support This patch adds support for LZO compression when storing the register cache. For a typical device whose register map would normally occupy 25kB or 50kB by using the LZO compression technique, one can get down to ~5-7kB. There might be a performance penalty associated with each individual read/write due to decompressing/compressing the underlying cache, however that should not be noticeable. These memory benefits depend on whether the target architecture can get rid of the memory occupied by the original register defaults cache which is marked as __devinitconst. Nevertheless there will be some memory gain even if the target architecture can't get rid of the original register map, this should be around ~30-32kB instead of 50kB. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
28644c80 |
|
19-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Add the rbtree cache support This patch adds support for the rbtree cache compression type. Each rbnode manages a variable length block of registers. There can be no two nodes with overlapping blocks. Each block has a base register and a currently top register, all the other registers, if any, lie in between these two and in ascending order. The reasoning behind the construction of this rbtree is simple. In the snd_soc_rbtree_cache_init() function, we iterate over the register defaults provided by the regcache core. For each register value that is non-zero we insert it in the rbtree. In order to determine in which rbnode we need to add the register, we first look if there is another register already added that is adjacent to the one we are about to add. If that is the case we append it in that rbnode block, otherwise we create a new rbnode with a single register in its block and add it to the tree. There are various optimizations across the implementation to speed up lookups by caching the most recently used rbnode. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
195af65c |
|
19-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Add the indexed cache support This is the simplest form of a cache available in regcache. Any registers whose default value is 0 are ignored. If any of those registers are modified in the future, they will be placed in the cache on demand. The cache layout is essentially using the provided register defaults by the regcache core directly and does not re-map it to another representation. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#
9fabe24e |
|
19-Sep-2011 |
Dimitris Papastamos <dp@opensource.wolfsonmicro.com> |
regmap: Introduce caching support This patch introduces caching support for regmap. The regcache API has evolved essentially out of ASoC soc-cache so most of the actual caching types (except LZO) have been tested in the past. The purpose of regcache is to optimize in time and space the handling of register caches. Time optimization is achieved by not having to go over a slow bus like I2C to read the value of a register, instead it is cached locally in memory and can be retrieved faster. Regarding space optimization, some of the cache types are better at packing the caches, for e.g. the rbtree and the LZO caches. By doing this the sacrifice in time still wins over doing I2C transactions. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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