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06855063 |
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18-Jan-2023 |
Andrzej Hajda <andrzej.hajda@intel.com> |
locking/arch: Rename all internal __xchg() names to __arch_xchg() Decrease the probability of this internal facility to be used by driver code. Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> [m68k] Acked-by: Palmer Dabbelt <palmer@rivosinc.com> [riscv] Link: https://lore.kernel.org/r/20230118154450.73842-1-andrzej.hajda@intel.com Cc: Linus Torvalds <torvalds@linux-foundation.org>
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eda8dd12 |
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24-Jul-2021 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: use a14 instead of a15 in inline assembly a15 is a frame pointer in the call0 xtensa ABI, don't use it explicitly in the inline assembly. Use a14 instead, as it has the same properties as a15 w.r.t. window overflow. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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b9b12978 |
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25-May-2021 |
Mark Rutland <mark.rutland@arm.com> |
locking/atomic: xtensa: move to ARCH_ATOMIC We'd like all architectures to convert to ARCH_ATOMIC, as once all architectures are converted it will be possible to make significant cleanups to the atomics headers, and this will make it much easier to generically enable atomic functionality (e.g. debug logic in the instrumented wrappers). As a step towards that, this patch migrates xtensa to ARCH_ATOMIC. The arch code provides arch_{atomic,atomic64,xchg,cmpxchg}*(), and common code wraps these with optional instrumentation to provide the regular functions. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Chris Zankel <chris@zankel.net> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210525140232.53872-32-mark.rutland@arm.com
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6988631b |
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25-May-2021 |
Mark Rutland <mark.rutland@arm.com> |
locking/atomic: cmpxchg: make `generic` a prefix The asm-generic implementations of cmpxchg_local() and cmpxchg64_local() use a `_generic` suffix to distinguish themselves from arch code or wrappers used elsewhere. Subsequent patches will add ARCH_ATOMIC support to these implementations, and will distinguish more functions with a `generic` portion. To align with how ARCH_ATOMIC uses an `arch_` prefix, it would be helpful to use a `generic_` prefix rather than a `_generic` suffix. In preparation for this, this patch renames the existing functions to make `generic` a prefix rather than a suffix. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210525140232.53872-12-mark.rutland@arm.com
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cf3b3baa |
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16-Oct-2019 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: use "m" constraint instead of "a" in cmpxchg.h assembly Use "m" constraint instead of "r" for the address, as "m" allows compiler to access adjacent locations using base + offset, while "r" requires updating the base register every time. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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812e708a |
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16-Oct-2019 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: use named assembly arguments in cmpxchg.h Numeric assembly arguments are hard to understand and assembly code that uses them is hard to modify. Use named arguments in __cmpxchg_u32 and xchg_u32. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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f7c34874 |
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20-Dec-2018 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: add exclusive atomics support Implement atomic primitives using exclusive access opcodes available in the recent xtensa cores. Since l32ex/s32ex don't have any memory ordering guarantees don't define __smp_mb__before_atomic/__smp_mb__after_atomic to make them use memw. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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af3d890b |
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01-Jan-2019 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: provide xchg for sizes 1 and 2 This is required for generic queued spinlocks, implement it. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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38fef73c |
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16-Jul-2015 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: implement fake NMI In case perf IRQ is the highest of the medium-level IRQs, and is alone on its level, it may be treated as NMI: - LOCKLEVEL is defined to be one level less than EXCM level, - IRQ masking never lowers current IRQ level, - new fake exception cause code, EXCCAUSE_MAPPED_NMI is assigned to that IRQ; new second level exception handler, do_nmi, assigned to it handles it as NMI, - atomic operations in configurations without s32c1i still need to mask all interrupts. Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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b5514786 |
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27-May-2013 |
Chen Gang <gang.chen@asianux.com> |
arch: xtensa: include: asm: compiling issue, need cmpxchg64() defined. When compiling with 'allmodconfig', some of drivers need cmpxchg64(), xtensa does not supply 64-bit implementation for 'xchg', so use the 'generic' implementation. e.g. (for next-20130527 tree): drivers/block/blockconsole.c:164:2: error: implicit declaration of function ‘cmpxchg64’ [-Werror=implicit-function-declaration] Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
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c4c4594b |
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28-Nov-2012 |
Chris Zankel <chris@zankel.net> |
xtensa: clean up files to make them code-style compliant Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
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219b1e4c |
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10-Nov-2012 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: add s32c1i-based atomic ops implementations Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
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bc5378fc |
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14-Oct-2012 |
Max Filippov <jcmvbkbc@gmail.com> |
xtensa: reorganize SR referencing - reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
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f9aa7e18 |
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28-Mar-2012 |
David Howells <dhowells@redhat.com> |
Disintegrate asm/system.h for Xtensa Disintegrate asm/system.h for Xtensa. Signed-off-by: David Howells <dhowells@redhat.com> cc: Chris Zankel <chris@zankel.net>
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