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47d11326 |
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28-Dec-2018 |
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
sh: sh2: convert to SPDX identifiers Update license to use SPDX-License-Identifier instead of verbose license text. Link: http://lkml.kernel.org/r/87efawcszk.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Cc: Rich Felker <dalias@libc.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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4b6ef05b |
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15-Feb-2016 |
Rich Felker <dalias@libc.org> |
sh: SMP support for SH2 entry.S The SH2 version of entry.S uses global variables, which need to be cpu-local in order to work with SMP. For ease of access from asm, simply use arrays indexed by cpu number, and require the availability of an address (mmio register or properly setup per-cpu memory) from which the current cpu's index can be read. Signed-off-by: Rich Felker <dalias@libc.org>
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5a846aba |
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17-Mar-2016 |
Rich Felker <dalias@libc.org> |
sh: add support for J-Core J2 processor At the CPU/ISA level, the J2 is compatible with SH-2, and thus the changes to add J2 support build on existing SH-2 support. However, J2 does not duplicate the memory-mapped SH-2 features like the cache interface. Instead, the cache interfaces is described in the device tree, and new code is added to be able to access the flat device tree at early boot before it is unflattened. Support is also added for receiving interrupts on trap numbers in the range 16 to 31, since the J-Core aic1 interrupt controller generates these traps. This range was unused but nominally for hardware exceptions on SH-2, and a few values in this range were used for exceptions on SH-2A, but SH-2A has its own version of the relevant code. No individual cpu subtypes are added for J2 since the intent moving forward is to represent SoCs with device tree rather than as hard-coded subtypes in the kernel. The CPU_SUBTYPE_J2 Kconfig item exists only to fit into the existing cpu selection mechanism until it is overhauled. Signed-off-by: Rich Felker <dalias@libc.org>
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3623d138 |
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16-Dec-2015 |
Rich Felker <dalias@libc.org> |
sh: provide unified syscall trap compatible with all SH models Historically SH-2 Linux (and originally uClinux) used a syscall calling convention incompatible with the established SH-3/4 Linux ABI. This choice was made because the trap range used by the existing ABI, 0x10-0x17, overlaps with the hardware exception/interrupt trap range reserved by SH-2, and in particular, with the SH-2A divide-by-zero and division-overflow exceptions. Despite the documented syscall convention using the low bits of the trap number to signal the number of arguments the kernel should expect, no version of the kernel has ever used this information, nor is it useful; all of the registers need to be saved anyway. Therefore, it is possible to pick a new trap number, 0x1f, that is both supported by all existing SH-3/4 kernels and unassigned as a hardware trap in the SH-2 range. This makes it possible to produce SH-2 application binaries that are forwards-compatible with running on SH-3/4 kernels and to treat SH as a unified platform with varying ISA support levels rather than multiple gratuitously-incompatible platforms. This patch adjusts the range checking SH-2 and SH-2A kernels make for the syscall trap to accept the range 0x1f-0x2f rather than just 0x20-0x2f. As a result, trap 0x1f now acts as a syscall for all SH models. Signed-off-by: Rich Felker <dalias@libc.org>
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7a90e00d |
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14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Make sure rte delay slots are nopped out on all parts. Future SH parts do not support any instruction but a nop in the rte delay slot, so make the change for all offending parts. SH-5 is excluded from this, and already has its own set of restrictions with regards to rte delay slot handling. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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f15cbe6f |
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28-Jul-2008 |
Paul Mundt <lethal@linux-sh.org> |
sh: migrate to arch/sh/include/ This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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6e80f5e8 |
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09-Jul-2008 |
Yoshinori Sato <ysato@users.sourceforge.jp> |
sh2(A) exception handler update This patch is By sh2 - Remove duplicate code - Reduce stack usage - Cleanup and little optimize By sh2a - Add missing handler(256 to 511) - Use sh2a instructions handler Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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6c0602b8 |
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13-Mar-2008 |
Kieran Bingham <kbingham@mpc-data.co.uk> |
sh: Fix up the address error exception handler for SH-2. Presently the SH-2/SH-2A address error exception dispatch copies off the register state from the stack and skips over the first register, skewing the rest. Fix up the math here so that the proper register state is handed down to the exception handler itself. Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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74d99a5e |
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26-Nov-2007 |
Paul Mundt <lethal@linux-sh.org> |
sh: SH-2A FPU support. Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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5a4f7c66 |
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20-Nov-2007 |
Paul Mundt <lethal@linux-sh.org> |
sh: Share bug/debug traps across _32 and _64. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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9f9a5de4 |
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11-Jun-2007 |
Paul Mundt <lethal@linux-sh.org> |
sh: Fixup misaligned data for sh2 lockdep. lockdep/irqflags tracing on SH-2 ends up with a misaligned branch, fix it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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3afb209a |
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13-Mar-2007 |
Paul Mundt <lethal@linux-sh.org> |
sh: Fix bogus regs pointer in do_IRQ(). SH-3 and SH-4 were trampling the register, and SH-2 wasn't even setting it in the first place. This ended up with some rather broken behaviour in the sysrq show_regs(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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4aa362bb |
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18-Dec-2006 |
Yoshinori Sato <ysato@users.sourceforge.jp> |
sh: Update SH-2 to use the debug trap jump table. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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f413d0d9 |
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13-Dec-2006 |
Paul Mundt <lethal@linux-sh.org> |
sh: Use a jump call table for debug trap handlers. This rips out most of the needlessly complicated sh_bios and kgdb trap handling, and forces it all through a common fast dispatch path. As more debug traps are inserted, it's important to keep them in sync for all of the parts, not just SH-3/4. As the SH-2 parts are unable to do traps in the >= 0x40 range, we restrict the debug traps to the 0x30-0x3f range on all parts, and also bump the kgdb breakpoint trap down in to this range (from 0xff to 0x3c) so it's possible to use for nommu. Optionally, this table can be padded out to catch spurious traps for SH-3/4, but we don't do that yet.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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e9cfc147 |
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11-Dec-2006 |
Yoshinori Sato <ysato@users.sourceforge.jp> |
sh: Fixup SH-2 BUG() trap handling. This adds in support for the BUG() trap on SH-2. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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afbfb52e |
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04-Dec-2006 |
Paul Mundt <lethal@linux-sh.org> |
sh: stacktrace/lockdep/irqflags tracing support. Wire up all of the essentials for lockdep.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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de398406 |
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05-Nov-2006 |
Yoshinori Sato <ysato@users.sourceforge.jp> |
sh: Exception vector rework and SH-2/SH-2A support. This splits out common bits from the existing exception handler for use between SH-2/SH-2A and SH-3/4, and adds support for the SH-2/2A exceptions. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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