History log of /linux-master/arch/openrisc/boot/dts/or1klitex.dts
Revision Date Author Comments
# 978c7914 26-Aug-2021 Joel Stanley <joel@jms.id.au>

openrisc/litex: Add ethernet device

Add the liteeth ethernet device.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stafford Horne <shorne@gmail.com>


# 7851155a 26-Aug-2021 Joel Stanley <joel@jms.id.au>

openrisc/litex: Update uart address

Recent litex socs will place the UART at 0xe0006800.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stafford Horne <shorne@gmail.com>


# f81cc5ac 19-Sep-2019 Filip Kokosinski <fkokosinski@antmicro.com>

openrisc: add support for LiteX

This adds support for a basic LiteX-based SoC with a mor1kx soft CPU.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
[shorne: Merged in soc-cntl patch, removed CROSS_COMPILE, sort MAINT.]
Signed-off-by: Stafford Horne <shorne@gmail.com>