History log of /linux-master/arch/mips/include/asm/mach-ralink/mt7620.h
Revision Date Author Comments
# 04b153ab 18-Jun-2023 Sergio Paracuellos <sergio.paracuellos@gmail.com>

mips: ralink: mt7620: remove clock related code

A proper clock driver for ralink SoCs has been added. Hence there is no
need to have clock related code in 'arch/mips/ralink' folder anymore.
Since this is the last clock related code removal, remove also remaining
prototypes in 'common.h' header file.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>


# 217cf927 27-Feb-2023 Sergio Paracuellos <sergio.paracuellos@gmail.com>

mips: ralink: mt7620: define MT7620_SYSC_BASE with __iomem

So that MT7620_SYSC_BASE can be used later in multiple functions without
needing to repeat this __iomem declaration each time

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>


# 745ec436 04-Jun-2021 Sergio Paracuellos <sergio.paracuellos@gmail.com>

pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file

Move all related code for SoC MT7620 into a new driver located
in 'pinctrl-mt7620.c' source file.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210604115159.8834-6-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>


# d2912cb1 04-Jun-2019 Thomas Gleixner <tglx@linutronix.de>

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>


# 16eccef6 20-Dec-2016 John Crispin <john@phrozen.org>

MIPS: ralink: Add missing pinmux.

The mt7620 has a pin that can be used to generate an external reference
clock. The pinmux setup was missing the definition of said pin. This patch
adds it.

Signed-off-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14898/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 86ce9a34 19-Apr-2016 Sashka Nochkin <linux-mips@durdom.com>

mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type

Mediatek MT7620 SoC has syscfg0 bits where it sets the type of memory being used.
However, sometimes those bits are not set properly (reading "11"). In this case, the SoC assumes SDRAM.
The patch below reflects that.

Signed-off-by: Sashka Nochkin <linux-mips@durdom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13135/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 97b92108 05-May-2016 John Crispin <john@phrozen.org>

MIPS: Change my email address

The old address is no longer valid. Use the my new one instead.

Signed-off-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13201/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 418d29c8 04-Nov-2015 John Crispin <blogic@openwrt.org>

MIPS: ralink: Unify SoC id handling

This makes detection a lot easier for audio, wifi, ... drivers.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11440/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 81857db9 04-Nov-2015 John Crispin <blogic@openwrt.org>

MIPS: ralink: Add support for mt7688

MT7688 is similar tot he MT7628 but has a different wifi radio.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11439/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 53263a1c 08-Oct-2014 John Crispin <blogic@openwrt.org>

MIPS: ralink: add mt7628an support

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8031/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 1dc5c2cf 27-Jul-2014 John Crispin <blogic@openwrt.org>

MIPS: ralink: add support for MT7620n

This is the small version of MT7620a.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8030/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# f576fb6a 08-Oct-2014 John Crispin <blogic@openwrt.org>

MIPS: ralink: cleanup the soc specific pinmux data

Before we had a pinctrl driver we used a custom OF api. This patch converts the
soc specific pinmux data to a new set of structs. We also add some new pinmux
setings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8009/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 2920b83d 15-Mar-2014 John Crispin <blogic@openwrt.org>

MIPS: ralink: add a helper for reading the ECO version

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8000/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# ded1e9d7 23-Aug-2013 Gabor Juhos <juhosg@openwrt.org>

MIPS: ralink: mt7620: Improve clock frequency detection

The current code assumes that the peripheral clock always
runs at 40MHz which is not true in all configuration. The
peripheral clock can also use the reference clock instead
of the fixed 40MHz rate. If the reference clock runs at a
different rate, various peripheries are behaving incorrectly.

Additionally, the currectly calculated system clock is also
wrong. The actual value what the code computes is the rate
of the DRAM which can be different from the system clock.

Add new helper functions to get the rate of the different
clocks and use the correct values for the registered clock
devices.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5755/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 51e39607 14-Apr-2013 John Crispin <blogic@openwrt.org>

MIPS: ralink: add memory definition for MT7620

Populate struct soc_info with the data that describes our RAM window.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5183/


# 594bde68 21-Mar-2013 John Crispin <blogic@openwrt.org>

MIPS: ralink: adds support for MT7620 SoC family

Add support code for mt7620 SOC.

The code detects the SoC and registers the clk / pinmux settings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5177/