#
a0b8cd5c |
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24-Jan-2022 |
Wenli Looi <wlooi@ucalgary.ca> |
MIPS: ath79: add support for QCN550x Adds support for QCN550x, which appears to be very similar to QCA956x. Signed-off-by: Wenli Looi <wlooi@ucalgary.ca> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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#
d2912cb1 |
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04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
a95f4b1c |
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20-Jul-2018 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add lots of missing registers This patch adds many new registers for various QCA MIPS SoCs. The patch is an aggragate of many contributions made to OpenWrt. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Henryk Heisig <hyniu@o2.pl> Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Signed-off-by: Weijie Gao <hackpascal@gmail.com> Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Julien Dusser <julien.dusser@free.fr> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/19910/ Cc: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org
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#
05454c1b |
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11-May-2017 |
Mathias Kresin <dev@kresin.me> |
MIPS: ath79: Fix AR724X_PLL_REG_PCIE_CONFIG offset According to the QCA u-boot source the "PCIE Phase Lock Loop Configuration (PCIE_PLL_CONFIG)" register is for all SoCs except the QCA955X and QCA956X at offset 0x10. Since the PCIE PLL config register is only defined for the AR724x fix only this value. The value is wrong since the day it was added and isn't used by any driver yet. Signed-off-by: Mathias Kresin <dev@kresin.me> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16048/ Signed-off-by: James Hogan <jhogan@kernel.org>
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#
626a0695 |
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19-Apr-2015 |
Alban Bedel <albeu@free.fr> |
MIPS: ath79: Correctly name the defines for the PLL_FB register This register is named PLL_FB and is not a divider but a multiplier. To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and ARxxxx_PLL_FB_MASK. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9772/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
3b2663ca |
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06-Jan-2014 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
mips: delete non-required instances of include <linux/init.h> None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6320/
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#
82c46840 |
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15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add USB controller registration code for the QCA955X SoCs Register platfom devices for the built-in USB controllers of the SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4952/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
0a5f3b1c |
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15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add PCI controller registration code for the QCA955X SoCs Add SoC specific PCI IRQ map, and register platform devices for the two built-in PCIe RCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4951/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
e9c0d0aa |
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15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add WMAC registration code for the QCA955X SoCs The SoC has a built-in wireless MAC. Register a platform device for that to make it usable with the ath9k driver. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4956/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
7d4c2af9 |
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15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} The ath79_device_reset_* are causing BUG when those are used on the QCA955x SoCs. The patch adds the required code to avoid that. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4948/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
f818ca3e |
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15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add GPIO setup code for the QCA955X SoCs The existing code can handle the GPIO controller of the QCA955x SoCs. Add a minimal glue code to make it working. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4947/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
53330332 |
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15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add IRQ handling code for the QCA955X SoCs The IRQ routing in the QCA955x SoCs is slightly different from the routing implemented in the already supported SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4955/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
41583c05 |
|
15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add clock setup code for the QCA955X SoCs The patch adds code to get various clock frequencies from the PLLs used in the QCA955x SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4945/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
2e6c91e3 |
|
15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add SoC detection code for the QCA955X SoCs Also add 'soc_is_qca955[68x]' helper functions and a Kconfig symbol for the SoC family. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4943/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
90898779 |
|
15-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add early printk support for the QCA955X SoCs The patch allows to see kernel messages on the QCA955X SoCs in early boot stage. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4944/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
12401fc2 |
|
03-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: pci-ar724x: setup command register of the PCI controller The command register of the PCI controller is not initialized correctly by the bootloader on some boards and this leads to non working PCI bus. Add code to initialize the command register from the Linux code to avoid this. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4916/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
ad4ce92e |
|
04-Feb-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: move global PCI defines into a common header The constants will be used by a subsequent patch. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4907/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
8838becd |
|
29-Jan-2013 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: fix GPIO function selection for AR934x SoCs GPIO function selection is not working on the AR934x SoCs because the offset of the function selection register is different on those. Add a helper routine which returns the correct register address based on the SoC type, and use that in the 'ath79_gpio_function_*' routines. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4870/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
70342287 |
|
21-Jan-2013 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Whitespace cleanup. Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
97541ccf |
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08-Sep-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs Besides the CPU and DDR PLLs, the CPU and DDR frequencies can be derived from other PLLs in the SRIF block on the AR934x SoCs. The current code does not checks if the SRIF PLLs are used and this can lead to incorrectly calculated CPU/DDR frequencies. Fix it by calculating the frequencies from SRIF PLLs if those are used on a given board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: <stable@vger.kernel.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4324/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
00ffed58 |
|
04-Aug-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add USB platform setup code for AR934X Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4172/ Signed-off-by: John Crispin <blogic@openwrt.org>
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#
b4da14ab |
|
04-Aug-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: Fix number of GPIO lines for AR724[12] The AR724[12] SoCs have more GPIO lines than the AR7240. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Cc: linux-mips@linux-mips.org Patchwork: https://http://patchwork.linux-mips.org/patch/4167/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
574d6e70 |
|
14-Mar-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add WMAC registration code for AR934X Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3513/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
42184768 |
|
14-Mar-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set} Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3511/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
fce5cc6e |
|
14-Mar-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add IRQ handling code for AR934X Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3510/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
5b5b544e |
|
14-Mar-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add GPIO support code for AR934X Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3508/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
8889612b |
|
14-Mar-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add clock initialization code for AR934X Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3507/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
d8411466 |
|
14-Mar-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add SoC detection code for AR934X Also add 'soc_is_ar934[124x]' helper functions and a Kconfig symbol for the AR934X SoCs. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3506/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
703327dd |
|
14-Mar-2012 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add early_printk support for AR934X The patch allows to see kernel messages on AR934X SoCs in early boot stage. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3504/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
34cfcd26 |
|
17-Nov-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: Add AR933x specific WMAC setup code The wireless MAC of the AR933x SoCs uses different base address, and requires different setup code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3030/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
c279b775 |
|
20-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add AR933X specific USB platform device registration Also select the USB_ARCH_HAS_EHCI symbol in order to make the EHCI driver available. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2527/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
fdfbcf47 |
|
20-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add AR933X specific GPIO initialization Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2524/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
54eed4c7 |
|
20-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: Add AR933X specific IRQ initialization Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
7ee15d8a |
|
20-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: Add AR933X specific glue for ath79_device_reset_{set,clear} Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2523/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
04225e1d |
|
20-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add AR933X specific clock init Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2522/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
0bd3acdf |
|
20-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: Add early printk support for the AR933X SoCs The AR933X SoCs are using a different UART, thus require different code for early printk support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2521/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
6d1c8fde |
|
23-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add revision id for the AR933X SoCs Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2538/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
7e98aa46 |
|
05-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add common USB Host Controller device Add common platform_device and helper code to make the registration of the built-in USB controllers easier on the board which are using them. Also register the USB controller on the AP81 and PB44 boards. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2442/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
d2b4ac1e |
|
05-Jun-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: Handle more MISC IRQs The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller. The patch adds support for them. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2440/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
f5b35d0b |
|
04-Jan-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add common WMAC device for AR913X based boards Add common platform_device and helper code to make the registration of the built-in wireless MAC easier on the Atheros AR9130/AR9132 based boards. Also register the WMAC device on the AR81 board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Imre Kaloz <kaloz@openwrt.org>, Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1962/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
68a1d316 |
|
04-Jan-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add common SPI controller device Several boards are using the built-in SPI controller of the AR71XX/AR724X/AR913X SoCs. This patch adds common platform_device and helper code to register it. Additionally, the patch registers the SPI bus on the PB44 board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1956/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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6eae43c5 |
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04-Jan-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: ath79: add GPIOLIB support This patch implements generic GPIO routines for the built-in GPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1948/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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d4a67d9d |
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04-Jan-2011 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs This patch adds initial support for various Atheros SoCs based on the MIPS 24Kc core. The following models are supported at the moment: - AR7130 - AR7141 - AR7161 - AR9130 - AR9132 - AR7240 - AR7241 - AR7242 The current patch contains minimal support only, but the resulting kernel can boot into user-space with using of an initramfs image on various boards which are using these SoCs. Support for more built-in devices and individual boards will be implemented in further patches. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1947/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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