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70f8cd94 |
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18-Sep-2023 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: rename to GnuBee GB-PC1 and GnuBee GB-PC2 Rename GB-PC1 to GnuBee GB-PC1, and GB-PC2 to GnuBee GB-PC2 to include brand and model name. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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bae83341 |
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11-Feb-2023 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: add port@5 as CPU port On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is connected to the second MAC of the SoC as a CPU port. Add the port and set up the second MAC on the bindings. Revert PHY muxing on GB-PC1. There's an external PHY connected to the second MAC of the SoC on GB-PC2, therefore, disable port@5 for this device. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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09e61efd |
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11-Feb-2023 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: align LED node names with dtschema The node names should be generic and DT schema expects certain pattern: mt7621-gnubee-gb-pc1.dtb: gpio-leds: 'power', 'system' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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394c3032 |
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20-Sep-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: add GB-PC2 LEDs Add the missing LEDs for GB-PC2. The ethblack-green, ethblue-green, power and system LEDs weren't added previously, because they don't exist on the device schematics. Tests on a GB-PC2 by me and Petr proved otherwise. The i2c bus cannot be used on GB-PC2 as its pins are wired to LEDs instead, and GB-PC1 does not use it. Therefore, do not enable it on both devices. Link: https://github.com/ngiger/GnuBee_Docs/blob/master/GB-PCx/Documents/GB-PC2_V1.1_schematic.pdf Tested-by: Petr Louda <petr.louda@outlook.cz> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5ae75a1a |
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20-Sep-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: fix some dtc warnings Fix the dtc warnings below. uartlite@c00: $nodename:0: 'uartlite@c00' does not match '^serial(@.*)?$' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/serial/8250.yaml uartlite@c00: Unevaluated properties are not allowed ('clock-names' was unexpected) From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/serial/8250.yaml sdhci@1e130000: $nodename:0: 'sdhci@1e130000' does not match '^mmc(@.*)?$' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/mmc/mtk-sd.yaml xhci@1e1c0000: $nodename:0: 'xhci@1e1c0000' does not match '^usb(@.*)?' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml xhci@1e1c0000: compatible: ['mediatek,mt8173-xhci'] is too short From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml switch0@0: $nodename:0: 'switch0@0' does not match '^(ethernet-)?switch(@.*)?$' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml port@1: status:0: 'off' is not one of ['okay', 'disabled', 'reserved'] From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml port@2: status:0: 'off' is not one of ['okay', 'disabled', 'reserved'] From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml port@3: status:0: 'off' is not one of ['okay', 'disabled', 'reserved'] From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml - Change "memc: syscon@5000" to "memc: memory-controller@5000". - Change "uartlite: uartlite@c00" to "serial0: serial@c00" and remove the aliases node. - Remove "clock-names" from the serial0 node. The property doesn't exist on the 8250.yaml schema. - Change "sdhci: sdhci@1e130000" to "mmc: mmc@1e130000". - Change "xhci: xhci@1e1c0000" to "usb: usb@1e1c0000". - Add "mediatek,mtk-xhci" as the second compatible string on the usb node. - Change "switch0: switch0@0" to "switch0: switch@0" - Change "off" to "disabled" for disabled nodes. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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62fb295c |
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24-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
MIPS: dts: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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d9a683f5 |
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11-Apr-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: remove defining gpio function for pin groups All pin groups function as gpio unless set otherwise. Therefore, remove this unnecessary binding. Tested on UniElec U7621-06-16M on OpenWrt. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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6faf0dbd |
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11-Apr-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: mt7621: mux phy4 to gmac1 for GB-PC1 Mux the MT7530 switch's phy4 to the SoC's gmac1 on the GB-PC1 devicetree. This achieves 2 Gbps total bandwidth to the CPU using the second RGMII. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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27498967 |
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07-Apr-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
MIPS: dts: align SPI NOR node name with dtschema The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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7a6ee0bb |
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15-Mar-2022 |
Arınç ÜNAL <arinc.unal@arinc9.com> |
mips: dts: ralink: add MT7621 SoC The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc dual-core CPU, a 5-port 10/100/1000 switch/PHY and one RGMII. Add the devicetrees for GB-PC1 and GB-PC2 devices which use MT7621 SoC. Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20220315160149.3617-1-arinc.unal@arinc9.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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