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c9b02990 |
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04-May-2020 |
Liangliang Huang <huanglllzu@gmail.com> |
MIPS: Use fallthrough for arch/mips Convert the various /* fallthrough */ comments to the pseudo-keyword fallthrough; Done via script: https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe@perches.com/ Signed-off-by: Liangliang Huang <huangll@lemote.com> Reviewed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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#
26dd3e4f |
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28-Jan-2017 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
MIPS: Audit and remove any unnecessary uses of module.h Historically a lot of these existed because we did not have a distinction between what was modular code and what was providing support to modules via EXPORT_SYMBOL and friends. That changed when we forked out support for the latter into the export.h file. This means we should be able to reduce the usage of module.h in code that is obj-y Makefile or bool Kconfig. In the case of some code where it is modular, we can extend that to also include files that are building basic support functionality but not related to loading or registering the final module; such files also have no need whatsoever for module.h The advantage in removing such instances is that module.h itself sources about 15 other headers; adding significantly to what we feed cpp, and it can obscure what headers we are effectively using. Since module.h might have been the implicit source for init.h (for __init) and for export.h (for EXPORT_SYMBOL) we consider each instance for the presence of either and replace/add as needed. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Build coverage of all the mips defconfigs revealed the module.h header was masking a couple of implicit include instances, so we add the appropriate headers there. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: David Daney <david.daney@cavium.com> Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "Steven J. Hill" <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15131/ [james.hogan@imgtec.com: Preserve sort order where it already exists] Signed-off-by: James Hogan <james.hogan@imgtec.com>
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#
63893ea5 |
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14-Oct-2015 |
Gregory Fong <gregory.0xf0@gmail.com> |
MIPS: BCM63XX: Use pr_* instead of printk Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Joe Perches <joe@perches.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Nicolas Schichan <nschichan@freebox.fr> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11300/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
635c9907 |
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21-Oct-2014 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Remove useless parentheses Based on the spatch @@ expression e; @@ - return (e); + return e; with heavy hand editing because some of the changes are either whitespace or identation only or result in excessivly long lines. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
e86ae9e2 |
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08-Jul-2014 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63xx: Remove !RUNTIME_DETECT code for bcmcpu_get_id Use the same pattern as with get_*_cpu_type() to allow the compiler to remove code for non enabled SoC types. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7273/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
d7b12056 |
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25-Dec-2010 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Use current_cpu_type() instead of c->cputype If current_cpu_type() is pre-defined in cpu-feature-overrides.h, This may save about 10k for the compressed kernel image(vmlinuz). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1901/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
17d97bad |
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30-Sep-2013 |
Markos Chandras <markos.chandras@imgtec.com> |
MIPS: bcm63xx: cpu: Replace BUG() with panic() BUG() can be a noop if CONFIG_BUG is not selected, leading to the following build problem on a randconfig: arch/mips/bcm63xx/cpu.c: In function 'detect_cpu_clock': arch/mips/bcm63xx/cpu.c:254:1: error: control reaches end of non-void function [-Werror=return-type] We fix this problem by replacing BUG() with panic() since it's best to handle the case of an unknown board instead of silently returning a random clock frequency. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Acked-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5932/
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#
8ff374b9 |
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17-Sep-2013 |
Maciej W. Rozycki <macro@linux-mips.org> |
MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout. The change does not touch places that use shifted or partial masks. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
7b933421 |
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18-Jun-2013 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: add support for BCM3368 Cable Modem The Broadcom BCM3368 Cable Modem SoC is extremely similar to the existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort in the existing code base is required to get it supported. This patch adds support for the following on-chip peripherals: - two UARTS - GPIO - Ethernet - SPI - PCI - NOR Flash The most noticeable difference with 3368 is that it has its peripheral register at 0xfff8_0000 we check that separately in ioremap.h. Since 3368 is identical to 6358 for its clock and reset bits, we use them verbatim. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
2c8aaf71 |
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21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: add basic BCM6362 support Add basic support for detecting and booting the BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5009/ Acked-by: John Crispin <blogic@openwrt.org>
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#
13be798c |
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21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: rework chip detection Instead of trying to use a correlation of cpu prid and chip id and hoping they will always be unique, use the cpu prid to determine the chip id register location and just read out the chip id. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5008/ Acked-by: John Crispin <blogic@openwrt.org>
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#
6605428c |
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21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: fix revision ID width The REVID is only 8 bit wide. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5007/ Acked-by: John Crispin <blogic@openwrt.org>
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#
e5766aea |
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24-Jul-2012 |
Jonas Gorski <jonas.gorski@gmail.com> |
MIPS: BCM63XX: Add basic BCM6328 support This includes CPU speed, memory size detection and working UART, but lacking the appropriate drivers, no support for attached flash. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3951/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
288752a8 |
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24-Jul-2012 |
Jonas Gorski <jonas.gorski@gmail.com> |
MIPS: BCM63XX: Use the Chip ID register for identifying the SoC Newer BCM63XX SoCs use virtually the same CPU ID, differing only in the revision bits. But since they all have the Chip ID register at the same location, we can use that to identify the SoC we are running on. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3955/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
d61fcfe2 |
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16-Nov-2011 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63xx: Fix SDRAM size computation for BCM6345 Instead of hardcoding the amount of available RAM, read the number of effective multiples of 8MB from SDRAM_MBASE_REG. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3008/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
04712f3f |
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04-Nov-2011 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63XX: Add support for bcm6368 CPU. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
ec68c520 |
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04-Nov-2011 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63XX: Cleanup cpu registers. Use preprocessor when possible to avoid duplicated and error-prone code. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2897/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
602977b0 |
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16-Oct-2010 |
Kevin Cernekee <cernekee@gmail.com> |
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code BMIPS processor cores are used in 50+ different chipsets spread across 5+ product lines. In many cases the chipsets do not share the same peripheral register layouts, the same register blocks, the same interrupt controllers, the same memory maps, or much of anything else. But, across radically different SoCs that share nothing more than the same BMIPS CPU, a few things are still mostly constant: SMP operations Access to performance counters DMA cache coherency quirks Cache and memory bus configuration So, it makes sense to treat each BMIPS processor type as a generic "building block," rather than tying it to a specific SoC. This makes it easier to support a large number of BMIPS-based chipsets without unnecessary duplication of code, and provides the infrastructure needed to support BMIPS-proprietary features. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Tested-by: Florian Fainelli <ffainelli@freebox.fr> Patchwork: https://patchwork.linux-mips.org/patch/1706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
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#
524ef29c |
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30-Jan-2010 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63xx: Add support for second uart. The BCm63xx SOC has two uarts. Some boards use the second one for bluetooth. This patch changes platform device registration code to handle this. Changes to the UART driver were already merged in 6a2c7eabfd09ca7986bf96b8958a87ca041a19d8. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/900/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
2b5b9b78 |
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14-Oct-2009 |
Florian Fainelli <florian@openwrt.org> |
MIPS: bcm63xx: Set the correct BCM3302 CPU name For consistency with other BCM63xx SoC set the CPU name to "Broadcom BCM6338" when actually running on that system. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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#
e7300d04 |
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18-Aug-2009 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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