microblaze: Add support for error injection

To inject the error using the tmr inject IP reset vectors need to be placed
in lmb(bram) due to the limitation in HW when this code runs out of DDR.
Below code adds the error inject code to the .init.ivt section to copy
it in machine_early_init to lmb/Bram location. C_BASE_VECTORS which allow
moving reset vectors out of 0 location is not currently supported by
Microblaze architecture, that's why all the time reset vectors with
injection code is all the time copied to address 0.

As of now getting this functionality working CPU switches to real mode
and simply jumps to bram, which causes triggering of fault which continues
to call_xmb_manager_break break handler which will at the end calls the
error count callback function and performs recovery.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Link: https://lore.kernel.org/r/20220627064024.771037-4-appana.durga.rao@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

microblaze: Add custom break vector handler for mb manager

When the TMR Manager detects a fault Lockstep state it is signaled to the
MicroBlaze processors by asserting a break signal, When Microblaze gets
a break vector from tmr Microblaze it's needed to clear/block the break
bit in the tmr manager before performing recovery.
In order to perform recovery need to perform the following steps.
1) Store all internal MicroBlaze registers in RAM
2) Execute a suspend instruction which asserts the reset signal
3) Restore all registers from RAM and execute an RTBD instruction to
return from the reset handler, to resume execution at the place
where the break occurred.

This API supports getting called from kernel space only.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Link: https://lore.kernel.org/r/20220627064024.771037-3-appana.durga.rao@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

microblaze: Add xmb_manager_register function

Triple Modular Redundancy (TMR) Microblaze solution provides soft error
injection, detection, correction and recovery for Microblaze cores in the
system. The Xilinx/AMD Triple Modular Redundancy (TMR) solution in Vivado
provides all the necessary building blocks to implement a redundant
triplicated MicroBlaze subsystem. This processing subsystem is
fault-tolerant and continues to operate nominally after encountering an
error. Together with the capability to detect and recover from errors,
the implementation ensures the reliability of the entire subsystem.

When the break vector gets asserted because of error injection,
the break signal must be blocked before exiting from the break handler,
This commit adds support for xmb_manager_register api which updates the
TMR manager address and control register and error count and reset callback
function arguments, which will be used by the break handler to block the
break and call the error count callback function and reset callback
function.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Link: https://lore.kernel.org/r/20220627064024.771037-2-appana.durga.rao@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

microblaze: Fix some typos in comment

Replace 'the the' with 'like the' in the comment.
Replace 'an' with 'a'.

Signed-off-by: Slark Xiao <slark_xiao@163.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220721071520.48384-1-slark_xiao@163.com

microblaze: Fix _reset() function

There is a need to disable VM before jump to zero reset vector.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Asserhall <stefan.asserhall@xilinx.com>

sched/rt, microblaze: Use CONFIG_PREEMPTION

CONFIG_PREEMPTION is selected by CONFIG_PREEMPT and by CONFIG_PREEMPT_RT.
Both PREEMPT and PREEMPT_RT require the same functionality which today
depends on CONFIG_PREEMPT.

Switch the entry code over to use CONFIG_PREEMPTION.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20191015191821.11479-12-bigeasy@linutronix.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>

microblaze: entry: Remove unneeded need_resched() loop

Since the enabling and disabling of IRQs within preempt_schedule_irq()
is contained in a need_resched() loop, we don't need the outer arch
code loop.

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Fix MSR flags when returning from exception

The issue was that the service routine was sometimes
returning with the wrong flags set in the MSR.

In this case, EIP bit was set while returning to User Mode
which is an illegal combination since exceptions are always
handled in privileged mode.

In order for MicroBlaze to take an interrupt, the MSR must have IE=1,
BIP=0 and EIP=0.

Signed-off-by: Stefan Asserhall <stefana@xilinx.com>
Signed-off-by: Goran Bilski <goran@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Separate GP registers from MSR handling

Separate general purpose register restoring from MSR handling.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Fix syscall error recovery for invalid syscall IDs

This patch fixes two bugs in the Microblaze syscall trap handler when an invalid
syscall ID is used.

First, the range check on line 351 only checks for syscall IDs greater than
__NR_syscalls. A negative syscall ID (either passed to `syscall()` or as returned
by `do_syscall_trace_enter()` on error) will still satisfy this test and cause
the Linux kernel to access an invalid memory location and cause a kernel oops.
This has been fixed by also checking for r12 < 0.

Secondly, the current error recovery at line 378 returns using the wrong register
(r15 instead of r14) and does not restore the previous stack state. This has been
fixed by invoking `ret_from_trap` on error, setting r3 to `-ENOSYS`, similar to
what would happen when calling a valid syscall.

Signed-off-by: Jamie Garside <jamie.garside@york.ac.uk>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Coding style cleanup

No function change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Move restart allowed out of block

Better not to break block which do work together.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

microblaze: fix handling of multiple pending signals

We need to keep building sigframes until no pending signals remain.
Wrap do_notify_resume() calls into loops; do _not_ allow syscall
restart logics to trigger after the first iteration.

Incidentally, comments about pending signals that should (somehow)
be in r18 are pure BS. Doesn't work that way and cannot work that
way, sorry...

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

microblaze: fix the horror with restarts of sigreturn()

solution a-la arm one - pick a callee-saved register (r30), set it
non-zero when entering a syscall, have sigreturn wrapper zero it out
and pass the value in it to do_notify_resume() as "in_syscall" (actually,
"restarts allowed") argument.

Note that we don't give a damn about ret_from_fork() - return value
is not restart-worthy anyway.

Possible remaining bug: on !MMU we still have _debug_exception()
restartable. If it hits with -ERESTART_... accidentally in r3, fun happens.
MMU does _not_ have _debug_exception() restartable. If that's decided to
be a bug (as I strongly suspect it to be), we'll just need to replace
setting r30 to 1 with setting r30 to 0 in !MMU _debug_exception().
Up to microblaze maintainers...

[folded a fix from Michal]

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

microblaze: switch to generic fork/vfork/clone

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: switch to generic sys_execve()

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

microblaze: switch to generic kernel_execve()

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: switch to generic kernel_thread()

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

microblaze: Fix bug with schedule_tail

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Add TLS support to sys_clone

Formerly unused Args 4/5 now load parent tid / child tid so the brid to
do_fork can pick up TLS from r10. Arg 3 still unused

There is also necessary to fix old glibc which do not setup r9/r10 (arg 4/5).
Simple clearing them is fine.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: drop 'oldset' argument of do_notify_resume()

never used...

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

microblaze: handle TIF_NOTIFY_RESUME

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

microblaze: Trivial asm fix

Just replace one dot with comma. New binutils can detect it.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Do not copy reset vectors/manual reset vector setup

Reset vector can be setup by bootloader and kernel doens't need
to touch it. If you require to setup reset vector, please use
CONFIG_MANUAL_RESET_VECTOR throught menuconfig.
It is not possible to setup address 0x0 as reset address because
make no sense to set it up at all.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: John Williams <john.williams@petalogix.com>

microblaze: Fix _reset function

If soft reset falls through with no hardware assisted reset, the best
we can do is jump to the reset vector and see what the bootloader left
for us.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: John Williams <john.williams@petalogix.com>

microblaze: Fix microblaze init vectors

Microblaze vector table stores several vectors (reset, user exception,
interrupt, debug exception and hardware exception).
All these functions can be below address 0x10000. If they are, wrong
vector table is genarated because jump is not setup from two instructions
(imm upper 16bit and brai lower 16bit).
Adding specific offset prevent problem if address is below 0x10000.
For this case only brai instruction is used.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Do not use "la" pseudo instruction - use addik instead

"la" pseudo instruction is only translation to "addik".
Use directly "addik" which is described in the MB reference guide.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Remove r0_ram pointer and PTO alignment

r0_ram pool was used for saving/restoring register
content if hw exception happen. This poll was replaced by
pt_pool_space with PT_SIZE size.
Based on this change SAVE_STATE_ARG_SPACE was removed which
caused that PTO offset is zero that's why is also removed.

r0_ram space was used as scratchpad by v850. In early
Microblaze Linux developing phase was this part of code
blindly copied.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Do not use r0_ram space for syscall debugging

Remove syscall counting space from r0_ram. Use special
syscall_debug_table pool for syscall statistic.

Signed-off-by: Michal Simek <monstr@monstr.eu>

Revert "microblaze: Simplify syscall rutine"

This reverts commit 0e41c90908881a1b8205c66a66becec7d8d4eb4a.

Break jffs2 rootfs because the patch removes syscall calling
from kernel space.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Fix r16 and r17 reg saving

r16 and r17 should be saved across interrupt and exception handling.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Clear return value in pt_regs

Signal code uses r3 value which saved in restore_sigcontext to
rt_sigframe but it require to be zeroed. If is not zero rt_sigframe
contains wrong values.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Fix sys_rt_sigreturn_wrapper

Do not save return registers before rt_sigreturn is called.
_user_exception(syscall handler) already setup return address
that's why it is removed from rt_sigreturn_wrapper.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Add KGDB support

Kgdb uses brki r16, 0x18 instruction to call
low level _debug_exception function which save
current state to pt_regs and call microblaze_kgdb_break
function. _debug_exception should be called only from
the kernel space. User space calling is not supported
because user application debugging uses different handling.

pt_regs_to_gdb_regs loads additional special registers
which can't be changed

* Enable KGDB in Kconfig
* Remove ancient not-tested KGDB support
* Remove ancient _debug_exception code from entry.S

Only MMU KGDB support is supported.

Signed-off-by: Michal Simek <monstr@monstr.eu>
CC: Jason Wessel <jason.wessel@windriver.com>
CC: John Williams <john.williams@petalogix.com>
CC: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
CC: linux-kernel@vger.kernel.org
Acked-by: Jason Wessel <jason.wessel@windriver.com>

microblaze: Support brki rX, 0x18 for user application debugging

This is the first patch which add support for
user application debugging through brki rX, 0x18 vector.

This patch has side effect which also remove security issue
to use brki rX, 0x18 to freeze kernel.

Support for old gdb support via priviledged exception
(brk r0, r0) is still there. It will be remove in future.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Remove nop after MSRCLR/SET, MTS, MFS instructions

We need to save instruction and the latest Microblaze shouldn't
have any problem with it.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Simplify syscall rutine

Syscall can be called only from userspace that's why
we don't need to check which space kernel come from.

Kernel syscall calling is not check and shouldn't come
throught this part of code.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Move PT_MODE saving to delay slot

We can save one more instruction if PT_MODE is saved in delay slot

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Fix _interrupt function

Save instructions by using delay slot and
clear UMS only if kernel comes from user space.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Fix _user_exception function

Saving some instructions. Clear VMS bit if kernel comes
from kernel space.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Put together addik instructions

Saving instructions by adding 2/3 addik instructions to one.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Use delay slot in syscall macros

Saving instruction with delay slot usage.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Save kernel mode in delay slot

This change save one instruction if kernel comes from kernel
space.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Do not mix register saving and mode setting

Separate reg saving and mode setting.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Move SAVE_STATE upward

SAVE_STATE macro could be used by other rutines too.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: entry.S: Macro optimization

We are not working with values from MSR that's why
we can discard it and use r11 for different purpose without
saving/restoring.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Optimize hw exception rutine

Remove set_vms because UMS is cleared and VMS is already setup.
Optimize function calling which save one additional instruction.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Implement clear_ums macro and fix SAVE_STATE macro

VMS is always setup because VM mode was before
exception/syscall/interrupt. Kernel continues in kernel mode
that's why we have to clear UMS bit if kernel comes from
user space.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Remove additional setup for kernel_mode

PT_MODE stores information if kernel comes from user
or kernel space. If come from user space, PT_MODE
contains 0. If come from kernel store, PT_MODE contains
non zero value. We don't need to save value 1. I am using
r1 register which contains non zero value.
This change save one additional instruction.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Optimize SAVE_STATE macro

SAVE_STATE macro could be used for user_exception
or interrupt functions.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Remove additional loading

We don't need to save r0 to PT_R0. It could be additional
operation.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Completely remove working with R11 register

We don't need to save R11 register. There is easy way
to use only R1 which is saved and restore later.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Do not setup BIP in _debug_exception

BIP is already setup.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Simplify _debug_exception function

Keep together all arguments for send_sig function.
Move returning address to delay slot which is executed.
Remove additional send_sig loading. I am using IMM part of
rtbd instruction with r0.

old solution:
addik r11, r0, send_sig
rtbd r11, 0
nop

new solution:
rtbd r0, send_sig
nop

There is one instruction saving.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Optimize SAVE_STATE macro

It is necessary to setup BIP and EE and clear EIP
only for unaligned exception handler. The rest of
hw exception handlers don't require it.
HW exception occured and we are not in virtual mode.
That's why we can do operations protected by EIP.
Interrupt, next hw exception or syscall can't occur.

EIP is cleared by rted.

This change speedup page_fault hw exception handler
which is critical path.

There is also necessary to save R11 content before
flag setup for unaligned exception.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: trivial: Use la insted of addik

la is translated to addik by toolchain.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: remove enable_irq from SAVE_STATE macro

SAVE_STATE macro is used in hw exceptions high level handling
functions. Hw exception doesn't disable IRQ that's why we don't
need to reenable it.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Move stack backup to SAVE_STATE macro

Remove code duplicity and move it to SAVE_STATE macro.
There is no impact on performance.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Move BIP setup to the end of ret_from_trap/ret_from_exc

We don't need to protect by BIP whole ret_from_trap/ret_from_exc code.
Only restoring from user/hw exception should be covered.
If BIP is setup, IRQ can't occur.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Remove PER_CPU(KM) variable

There is a way howto remove Kernel Mode variable. It is easier
to parse UMS bit in MSR to find out if I come from kernel or user
space. Loading MSR content should be in one cycle and loading
PER_CPU variable depends on memory state.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Optimize clear_vms_ums macro

We can save two instruction when MSR_VMS and MSR_UMS
are setup in one instruction.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Save and restore r3/r4 in SAVE/RESTORE_REGS macros

Save and restore R3/R4 registers in macros. This change
help to cleanup entry.S.

In ret_from_trap function we are saving returning value from
syscall to pt_regs on stack that's why we don't need to save and
restore these values before kernel functions (schedule, do_signal).

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Fix VM_ON and VM_OFF macros

Jump behind macro. We don't want to execute nop instruction again.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Add stack unwinder

Implement intelligent backtracing by searching for stack frame creation,
and emitting only return addresses. Use print_hex_dump() to display the
entire binary kernel stack.

Limitation: MMU kernels are not currently able to trace beyond a system trap
(interrupt, syscall, etc.). It is the intent of this patch to provide
infrastructure that can be extended to add this capability later.

Changes from V1:
* Removed checks in find_frame_creation() that prevented location of the frame
creation instruction in heavily optimized code
* Various formatting/commenting/file location tweaks per review comments
* Dropped Kconfig option to enable STACKTRACE as something logically separate

Signed-off-by: Steven J. Magnani <steve@digidescorp.com>

microblaze: Fix sys_clone syscall

sys_clone syscall ignored args which this patch mapped to args
which are passing from glibc.

Here is the origin problem description.

"I ran the static libgcc tests (very few of them are there, they are
mostly dynamically linked) and some of them fail with an assertion in
fork() system call (tid != pid), I looked at the microblaze/entry.S
file and it looks suspicious (ignores arguments 3-5)"

Arg mapping should be:
glibc ARCH_FORK(...) -> do_fork(...)
r5 -> r5 (clone_flags)
r6 -> r6 (stack_start, use parent->stack if NULL)
pt_regs -> r7 (pt_regs)
r7 -> r8 (stack_size)
r8 -> r9 (parent_tidptr)
r9 -> r10 (child_tidptr)

Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: entry.S use delay slot for return handlers

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Save current task directly

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Simplify entry.S - save/restore r3/r4 - ret_from_trap

There is possible to save r3/r4 at the beggining of user part
before calling handlers and at the end restore it.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Add support from PREEMPT

This patch add core PREEMPT support for Microblaze.
I tried to trace it via tracers and I was able to see any output.

I also added low level debug functions to see if that code is called.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Remove rt_sigsuspend wrapper

Generic rt_sigsuspend syscalls doesn't need any asm wrapper.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Do not count system calls in default

There is not necessary to count system calls that's why
I added DEBUG macro

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Remove saving and restoring before calling signal code

Saving is done in SAVE_STATE macros that's why another save discard
previous saved value.

This change has no effect to normal programs because they ends in any exception
and they are killed. On the other side has effect on debugging.

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Clear sticky FSR register after saving it to func parametr

Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear
it for noMMU kernel. This one do it for MMU.

Correct noMMU version

Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: Support ptrace syscall tracing.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: use generic syscalls.h

The prototypes in syscalls.h all make sense for
microblaze, but for some of them, the actual implementation
in sys_microblaze.c needs to be adapted.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze: clean up signal handling

When legacy signal handling is disabled, the
arch/microblaze/kernel/signal.c implementation can
be much simpler, as most of it is handled generically
from kernel/signal.c.

This is also a prerequisite for using the generic
asm/unistd.h, which does not provide __NR_sigreturn,
because this macro is referenced by the current signal.c
implementation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michal Simek <monstr@monstr.eu>

microblaze_mmu_v2: entry.S, entry.h

Signed-off-by: Michal Simek <monstr@monstr.eu>