History log of /linux-master/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
Revision Date Author Comments
# 8a922b77 26-May-2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

arm64: dts: toshiba: adjust whitespace around '='

Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).

Link: https://lore.kernel.org/r/20220526204606.833054-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


# 5d3b6ede 21-Apr-2022 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Update the clock providers for PCIe host controller

Remove fixed clock and source common clock for PCIe host controller.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-7-nobuhiro1.iwamatsu@toshiba.co.jp/


# c8a93f91 22-Apr-2022 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Update the clock providers for ethernet device

Remove fixed clock and source common clock for ethernet device.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-6-nobuhiro1.iwamatsu@toshiba.co.jp/


# 340657b1 21-Apr-2022 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Update the clock providers for SPI

Remove fixed clock and source common clock for SPI.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-5-nobuhiro1.iwamatsu@toshiba.co.jp/


# 27b75490 21-Apr-2022 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Update the clock providers for watchdog timer

Remove fixed clock and source common clock for watchdog timer.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-4-nobuhiro1.iwamatsu@toshiba.co.jp/


# 0e7cd439 21-Apr-2022 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Update the clock providers for I2C

Replace I2C clock with common clock framework.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-3-nobuhiro1.iwamatsu@toshiba.co.jp/


# 43740556 21-Apr-2022 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Update the clock providers for UART

Remove fixed clock and source common clock for UART.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-2-nobuhiro1.iwamatsu@toshiba.co.jp/


# 34f7c6e7 19-Apr-2021 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Add clock controller support for TMPV7708

Adds node of clock controller support for Toshiba Visconti TMPV7708.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220421080143.2135566-1-nobuhiro1.iwamatsu@toshiba.co.jp/


# c53fd410 14-Oct-2021 Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>

arm64: dts: visconti: Add 150MHz fixed clock to TMPV7708 SoC

This clock source is referred by baudrate generators of
SPI and I2C devices.

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Link: https://lore.kernel.org/r/20211014092703.15251-2-yuji2.ishikawa@toshiba.co.jp
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>


# 6beeaf48 06-Sep-2021 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoC

Add PCIe node and fixed clock for PCIe in TMPV7708's dtsi,
and tmpv7708-rm-mbrc boards's dts.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20210907042500.1525771-1-nobuhiro1.iwamatsu@toshiba.co.jp


# 172cdcae 07-Jun-2021 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Add PWM support for TMPV7708 SoC

Add PWM node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's dts.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>


# c988ae37 17-Dec-2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver

Add the GPIO node in Toshiba Visconti5 SoC-specific DT file.
And enable the GPIO node in TMPV7708 RM main board's board-specific DT file.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>


# ec8a42e7 15-Feb-2021 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm: dts: visconti: Add DT support for Toshiba Visconti5 ethernet controller

Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file.
And enable this node in TMPV7708 RM main board's board-specific DT file.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>


# 0109a175 17-Dec-2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver

Add the GPIO node in Toshiba Visconti5 SoC-specific DT file.
And enable the GPIO node in TMPV7708 RM main board's board-specific DT file.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>


# 4fd18fc3 01-Dec-2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Add watchdog support for TMPV7708 SoC

Add watchdog node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's
dts.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>


# 48dea9a7 27-Apr-2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

arm64: dts: visconti: Add device tree for TMPV7708 RM main board

Add basic support for the Visconti TMPV7708 SoC peripherals -
- CPU
- CA53 x 4 and 2 cluster.
- not support PSCI, currently only spin-table is supported.
- Interrupt controller (ARM Generic Interrupt Controller)
- Timer (ARM architected timer)
- UART (ARM PL011 UART controller)
- SPI (ARM PL022 SPI controller)
- I2C (Synopsys DesignWare APB I2C Controller)
- Pin control (Visconti specific)

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>