#
14a65ea5 |
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16-Jan-2024 |
Li Hua Qian <huaqian.li@siemens.com> |
arm64: dts: ti: Add reserved memory for watchdog This patch adds a reserved memory for the TI AM65X platform watchdog to reserve the specific info, triggering the watchdog reset in last boot, to know if the board reboot is due to a watchdog reset. Signed-off-by: Li Hua Qian <huaqian.li@siemens.com> Link: https://lore.kernel.org/r/20240117060654.109424-1-huaqian.li@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
5adf911c |
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09-Feb-2024 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Annotate LED nodes Add function and color properties and use the common scheme for the node name. We can't change the user-visible labels, though, due to existing userspace relying on the current format. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/331f8756483e3f896a3e50e069b3e2c0fae7a8ac.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
f2c6d71e |
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09-Feb-2024 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Factor out DP related bits There is a variant coming which does not support the Display Port. Move all related bits into a separate dtsi so that only those variants supporting the interface can include it. Along that, remove a redundant clock setting from k3-am65-iot2050-common-pg1.dtsi. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/3397d917d7c97f7aec05bc5f65eef3a6fe843650.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
1ef134a4 |
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09-Feb-2024 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Factor out arduino connector bits A new variant is to be added which will not have a arduino connector like the existing ones. Factor out all bits that are specific to this connector. The split is not perfect because wkup_gpio0 is defined based on what is common to all variants having the connector, thus containing also connector-unrelated information. But this is still cleaner than replicating this node into all 4 variants. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/3366367dc9f190c9e21027b9a810886791e99245.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
c32953cf |
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22-Jan-2024 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: iot2050*: Clarify GPL-2.0 as GPL-2.0-only SPDX identifier GPL-2.0 has been deprecated since license list version 3.0. Use GPL-2.0-only to be specific. Cc: Chao Zeng <chao.zeng@siemens.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Le Jin <le.jin@siemens.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240122145539.194512-16-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
966459a6 |
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23-Jan-2024 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: iot2050: Do not split single items Each "mboxes" item is composed of two cells. It seems these got split as they appeared to be two items in an array, but are actually a single two-cell item. Rejoin these cells. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240123222536.875797-3-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
fcb97d19 |
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05-Dec-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Add AM652 dtsi file The AM652 is basically a AM654 but with 2 cores instead of 4. Add a DTSI file for AM652 matching AM654 except this core difference. This removes the need to remove the extra cores from AM654 manually in DT files for boards that use the AM652 variant. Do that for the IOT2050 boards here. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20231205162358.23904-1-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
006d9351 |
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17-Nov-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable SDHCI nodes at the board level SDHCI nodes defined in the top-level AM65 SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231117163339.89952-1-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
73b4e471 |
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04-Nov-2023 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Add icssg-prueth nodes for PG2 devices Add the required nodes to enable ICSSG SR2.0 based prueth networking. As the driver still needs to be extended for SR1.0 support, keep related nodes disabled on PG1 devices. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/565d31a5fd29c4dd0cf28e347049a1247a6e446c.1699087938.git.jan.kiszka@siemens.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
6c183a88 |
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04-Nov-2023 |
Su Bao Cheng <baocheng.su@siemens.com> |
arm64: dts: ti: iot2050: Refactor the m.2 and minipcie power pin Make the m.2 power control pin also available on miniPCIE variants. This can fix some miniPCIE card hang issue, by forcing a power on reset during boot. Signed-off-by: Baocheng Su <baocheng.su@siemens.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/8b2f8c1698421b8d0694eb337ad7ea2320d76aa6.1699087938.git.jan.kiszka@siemens.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
e6a53fac |
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04-Nov-2023 |
Benedikt Niedermayr <benedikt.niedermayr@siemens.com> |
arm64: dts: ti: iot2050: Definitions for runtime pinmuxing Add multiple device tree nodes in order to support runtime pinmuxing via debugfs. All nodes are added to the pinctrl device node, since they are now belonging to multiple interfaces now. Note: Pinconf is also handled by debugfs-pinmux. This is possible since pinconf and pinmux accessing the same 32-Bit register and setting the function mask to 32-Bit allows writes to the whole register. Signed-off-by: Benedikt Niedermayr <benedikt.niedermayr@siemens.com> [Jan: fix node name style] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/3f90f3e521758622aa9b10f030cf0de1e68e77a4.1699087938.git.jan.kiszka@siemens.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
95fd0767 |
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04-Nov-2023 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Drop unused ecap0 PWM In fact, this was never used by the final device, only dates back to first prototypes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/6131d44e0505ca3efbb9039e5f2b637a3e139312.1699087938.git.jan.kiszka@siemens.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
ad8edf4f |
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04-Nov-2023 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Re-add aliases Lost while dropping them from the common dtsi. Fixes: ffc449e016e2 ("arm64: dts: ti: k3-am65: Drop aliases") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/1edbc1b56ed4ff2256d7afb7db3cab4b3a423692.1699087938.git.jan.kiszka@siemens.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
1228242d |
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09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and/or device information. Disable the TSCADC nodes in the top-level dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-13-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
46d0c519 |
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09-Aug-2023 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-5-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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#
a4956811 |
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15-Jun-2023 |
Tony Lindgren <tony@atomide.com> |
arm64: dts: ti: Unify pin group node names for make dtbs checks Prepare for pinctrl-single yaml binding and unify pin group node names. Let's standardize on pin group node naming ending in -pins. As we don't necessarily have a SoC specific compatible property for pinctrl-single. I'd rather not add a pattern match for pins somewhere in the name for all the users. Trying to add matches for pins-default will be futile as on the earlier SoCs we've already seen names like pins-sleep, pins-idle, pins-off and so on that would need to be matched. And as the node is a pin group, let's prefer to use naming -pins rather than -pin as more pins may need to be added to the pin group later on. Signed-off-by: Tony Lindgren <tony@atomide.com> [vigneshr@ti.com: Rebase onto latest ti/next and extend to new nodes] Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
f722090a |
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06-Jun-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array When referring to array of phandles, using <> to separate the array entries is better notation as it makes potential errors with phandle and cell arguments easier to catch. Fix the outliers to be consistent with the rest of the usage. Cc: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230606182220.3661956-13-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
400f4953 |
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07-Jun-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-am65-iot2050-common: Rename rtc8564 nodename Just use "rtc" as the nodename to better match with the bindings. Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230607132043.3932726-4-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
da4159a7 |
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19-Apr-2023 |
Nishanth Menon <nm@ti.com> |
arm64: dts: ti: k3-am65*: Drop bootargs Drop bootargs from the dts. earlycon is a debug property that should be enabled only when debug is desired and not as default - see referenced link on discussion on this topic. Cc: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/linux-arm-kernel/81134eb9-2b7d-05bc-3035-a47f020861a8@linaro.org/ Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20230419141222.383567-3-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
12f0158f |
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18-Jan-2023 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Add layout of OSPI flash Describe the layout of the OSPI flash as the latest firmware uses it. Specifically the location of the U-Boot envs is important for userspace in order to access it. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/d135b246bd302060175276d3653f2891077eb109.1674110442.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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#
fdb02688 |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable McASP nodes at the board level McASP nodes defined in the top-level AM65x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the McASP nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-12-afd@ti.com
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#
3f9089ea |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable Mailbox nodes at the board level Mailbox nodes defined in the top-level AM65x SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor. As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information. Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-11-afd@ti.com
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#
7ff8432c |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable PCIe nodes at the board level PCIe nodes defined in the top-level AM65x SoC dtsi files are incomplete and will not be functional unless they are extended with a SerDes PHY. And usually only one of the two modes can be used at a time as they share a SerDes link. As the PHY and mode is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the PCIe nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-10-afd@ti.com
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#
b08bf4a5 |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable MCAN nodes at the board level MCAN nodes defined in the top-level AM65x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the MCAN nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-9-afd@ti.com
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#
c75c5c0b |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable MDIO nodes at the board level MDIO nodes defined in the top-level AM65x SoC dtsi files are incomplete and will not be functional unless they are extended with a pinmux. As the attached PHY is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the MDIO nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-8-afd@ti.com
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#
c1d1189e |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable ECAP nodes at the board level ECAP nodes defined in the top-level AM65x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. (These and the EPWM nodes could be used to trigger internal actions but they are not used like that currently) As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the ECAP nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-6-afd@ti.com
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#
1c49cbb1 |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable SPI nodes at the board level SPI nodes defined in the top-level AM65x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the SPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-4-afd@ti.com
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#
c0a5ba87 |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable I2C nodes at the board level I2C nodes defined in the top-level AM65x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the I2C nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-3-afd@ti.com
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#
65e8781a |
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28-Oct-2022 |
Andrew Davis <afd@ti.com> |
arm64: dts: ti: k3-am65: Enable UART nodes at the board level UART nodes defined in the top-level AM65x SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the UART nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221028142417.10642-2-afd@ti.com
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#
5888f1ed |
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26-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: ti: Adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220526204139.831895-1-krzysztof.kozlowski@linaro.org
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292b0dd7 |
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03-Feb-2022 |
Matthias Schiffer <matthias.schiffer@ew.tq-group.com> |
arm64: dts: ti: k3-am65*: Remove #address-cells/#size-cells from flash nodes Specifying partitions directly in the flash node is deprecated, a fixed-partitions node should be used instead. Therefore, it doesn't make sense to have these properties in the flash nodes. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20220203140240.973690-2-matthias.schiffer@ew.tq-group.com
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#
277ee96f |
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16-Nov-2021 |
Jayesh Choudhary <j-choudhary@ti.com> |
arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level Disable mcasp nodes 0-2 because several required properties are not present in the dtsi file as they are board specific. These nodes can be enabled via an overlay whenever required. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20211117053806.10095-1-j-choudhary@ti.com
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#
f533bb82 |
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22-Nov-2021 |
Aswath Govindraju <a-govindraju@ti.com> |
arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes AM654 base board and iot platforms do not have mcan instances pinned out. Therefore, disable all the mcan instances. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Apurva Nandan <a-nandan@ti.com> Link: https://lore.kernel.org/r/20211122134159.29936-3-a-govindraju@ti.com
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#
a9dbf044 |
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26-Sep-2021 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Prepare for adding 2nd-generation boards The current IOT2050 devices are Product Generation 1 (PG1), using SR1.0 AM65x silicon. Upcoming PG2 devices will use SR2.x SoCs and will therefore need separate device trees. Prepare for that by factoring out common bits that will be shared across both generations. At this chance, drop a link to the product homepage to in the top-level dts files. Also fix a typo in my email address in some headers. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/31fece05f9728a852c0632985c4fa537cced4ece.1632657917.git.jan.kiszka@web.de
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#
af755fe2 |
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26-Sep-2021 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Add/enabled mailboxes and carve-outs for R5F cores Analogously to the am654-base-board, configure the mailboxes for the two R5F cores, add them and the already existing memory carve-outs to the related MCU nodes. Allows to load applications under Linux onto the cores, e.g. the RTI watchdog firmware. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/1776f8be19b39a938d9248fcfc5332b753783c3e.1632657917.git.jan.kiszka@web.de
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262a98b4 |
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26-Sep-2021 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Disable SR2.0-only PRUs The IOT2050 devices described so far are using SR1.0 silicon, thus do not have the additional PRUs of the ICSSG of the SR2.0. Disable them. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/189a91866fb1af02e4fd2345dc56774aa069d5ba.1632657917.git.jan.kiszka@web.de
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06784f76 |
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26-Sep-2021 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: iot2050: Flip mmc device ordering on Advanced devices This ensures that the SD card will remain mmc0 across Basic and Advanced devices, also avoiding surprises for users coming from the downstream kernels. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/fe20d6346f119a28e47d129b616682001299cf0e.1632657917.git.jan.kiszka@web.de
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4f76ea7b |
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07-Jun-2021 |
Aswath Govindraju <a-govindraju@ti.com> |
arm64: dts: ti: am65: align ti,pindir-d0-out-d1-in property with dt-shema ti,pindir-d0-out-d1-in property is expected to be of type boolean. Therefore, fix the property accordingly. Fixes: e180f76d0641 ("arm64: dts: ti: Add support for Siemens IOT2050 boards") Fixes: 5da94b50475a ("arm64: dts: ti: k3-am654: Enable main domain McSPI0") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210608051414.14873-2-a-govindraju@ti.com
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d49a769d |
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01-Jun-2021 |
Roger Quadros <rogerq@ti.com> |
arm64: dts: ti: k3-am65-main: Add ICSSG MDIO nodes The ICSSGs on K3 AM65x SoCs contain an MDIO controller that can be used to control external PHYs associated with the Industrial Ethernet peripherals within each ICSSG instance. The MDIO module used within the ICSSG is similar to the MDIO Controller used in TI Davinci SoCs. A bus frequency of 1 MHz is chosen for the MDIO operations. The nodes are added and enabled in the common k3-am65-main.dtsi file by default, and disabled in the existing AM65 board dts files. These nodes need pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for ICSSG Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Roger Quadros <rogerq@ti.com> [s-anna@ti.com: move the disabled status to board dts files] Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210601150032.11432-2-s-anna@ti.com
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79b08ae7 |
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28-May-2021 |
Aswath Govindraju <a-govindraju@ti.com> |
arm64: dts: ti: k3-am65: Add support for UHS-I modes in MMCSD1 subsystem UHS-I speed modes are supported in AM65 S.R. 2.0 SoC[1]. Add support by removing the no-1-8-v tag and including the voltage regulator device tree nodes for power cycling. However, the 4 bit interface of AM65 SR 1.0 cannot be supported at 3.3 V or 1.8 V because of erratas i2025 and i2026 [2]. As the SD card is the primary boot mode for development usecases, continue to enable SD card and disable UHS-I modes in it to minimize any ageing issues happening because of erratas. k3-am6528-iot2050-basic and k3-am6548-iot2050-advanced boards use S.R. 1.0 version of AM65 SoC. Therefore, add no-1-8-v in sdhci1 device tree node of the common iot2050 device tree file. [1] - https://www.ti.com/lit/ug/spruid7e/spruid7e.pdf, section 12.3.6.1.1 [2] - https://www.ti.com/lit/er/sprz452e/sprz452e.pdf Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210529033749.6250-1-a-govindraju@ti.com
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547be9a0 |
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14-May-2021 |
Suman Anna <s-anna@ti.com> |
arm64: dts: ti: k3-am65-iot2050-common: Disable mailbox nodes There are no sub-mailbox devices defined currently for both the IOT2050 boards. These are usually dictated by the firmwares running on the R5F remote processors and the applications they provide. Defining the actual sub-mailboxes will also dictate the interrupts the clusters will use for interrupts on the Cortex-A53 cores. Disable all of the Mailbox clusters until the sub-mailboxes are defined and used. This fixes the warnings around the missing interrupts with the upcoming conversion of the OMAP Mailbox binding to YAML format. Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210514212016.3153-1-s-anna@ti.com
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e180f76d |
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11-Mar-2021 |
Jan Kiszka <jan.kiszka@siemens.com> |
arm64: dts: ti: Add support for Siemens IOT2050 boards Add support for two Siemens SIMATIC IOT2050 variants, Basic and Advanced. They are based on the TI AM6528 GP and AM6548 SOCs HS, thus differ in their number of cores and availability of security features. Furthermore the Advanced version comes with more RAM, an eMMC and a few internal differences. Based on original version by Le Jin. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html Link: https://github.com/siemens/meta-iot2050 Link: https://lore.kernel.org/r/4fb05969102d14d230e03ca4312ef9706efa61e6.1615473223.git.jan.kiszka@siemens.com
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