arm64: dts: ti: iot2050: Add icssg-prueth nodes for PG1 devices

Add the required nodes to enable ICSSG SR1.0 based prueth networking.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com>
Link: https://lore.kernel.org/r/20240409164314.157602-1-diogo.ivo@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>

arm64: dts: ti: iot2050: Factor out DP related bits

There is a variant coming which does not support the Display Port. Move
all related bits into a separate dtsi so that only those variants
supporting the interface can include it.

Along that, remove a redundant clock setting from
k3-am65-iot2050-common-pg1.dtsi.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/3397d917d7c97f7aec05bc5f65eef3a6fe843650.1707463401.git.jan.kiszka@siemens.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

arm64: dts: ti: iot2050*: Clarify GPL-2.0 as GPL-2.0-only

SPDX identifier GPL-2.0 has been deprecated since license list version
3.0. Use GPL-2.0-only to be specific.

Cc: Chao Zeng <chao.zeng@siemens.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Le Jin <le.jin@siemens.com>

Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240122145539.194512-16-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

arm64: dts: ti: iot2050: Add icssg-prueth nodes for PG2 devices

Add the required nodes to enable ICSSG SR2.0 based prueth networking.

As the driver still needs to be extended for SR1.0 support, keep related
nodes disabled on PG1 devices.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/565d31a5fd29c4dd0cf28e347049a1247a6e446c.1699087938.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>

arm64: dts: ti: iot2050: Prepare for adding 2nd-generation boards

The current IOT2050 devices are Product Generation 1 (PG1), using SR1.0
AM65x silicon. Upcoming PG2 devices will use SR2.x SoCs and will
therefore need separate device trees. Prepare for that by factoring out
common bits that will be shared across both generations.

At this chance, drop a link to the product homepage to in the top-level
dts files. Also fix a typo in my email address in some headers.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/31fece05f9728a852c0632985c4fa537cced4ece.1632657917.git.jan.kiszka@web.de