#
bb5009a2 |
|
15-Jan-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: add USB QMP PHY support Define USB3 QMP PHY presend on the SDM630 / SDM660 platforms. Enable it by default in the USB3 host, but (for compatibility), force USB 2.0 mode for all defined boards. The boards should opt-in to enable USB 3.0 support. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240116-sdm660-usb3-support-v1-3-2fbd683aea77@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
ac68c7d3 |
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02-Jan-2024 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
arm64: dts: qcom: sdm630: Hook up GPU cooling device In order to allow for throttling the GPU, hook up the cooling device to the respective thermal zones. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240102-topic-gpu_cooling-v1-12-fda30c57e353@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
2c6597c7 |
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25-Jan-2024 |
Krishna Kurapati <quic_kriskura@quicinc.com> |
arm64: dts: qcom: Fix hs_phy_irq for QUSB2 targets On several QUSB2 Targets, the hs_phy_irq mentioned is actually qusb2_phy interrupt specific to QUSB2 PHY's. Rename hs_phy_irq to qusb2_phy for such targets. In actuality, the hs_phy_irq is also present in these targets, but kept in for debug purposes in hw test environments. This is not triggered by default and its functionality is mutually exclusive to that of qusb2_phy interrupt. Add missing hs_phy_irq's, pwr_event irq's for QUSB2 PHY targets. Add missing ss_phy_irq on some targets which allows for remote wakeup to work on a Super Speed link. Also modify order of interrupts in accordance to bindings update. Since driver looks up for interrupts by name and not by index, it is safe to modify order of these interrupts in the DT. Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> Link: https://lore.kernel.org/r/20240125185921.5062-2-quic_kriskura@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
283730be |
|
03-Jan-2024 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
arm64: dts: qcom: sdm630: Drop RPM bus clocks Some nodes are abusingly referencing some of the internal bus clocks, that were recently removed in Linux (because the original implementation did not make much sense), managing them as if they were the only devices on an NoC bus. These clocks are now handled from within the icc framework and are no longer registered from within the CCF. Remove them. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-5-a66e698932e3@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
018c949b |
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18-Aug-2023 |
Luca Weiss <luca.weiss@fairphone.com> |
arm64: dts: qcom: Use QCOM_SCM_VMID defines for qcom,vmid Since we have those defines available in a header, let's use them everywhere where qcom,vmid property is used. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
5af94c7c |
|
23-Jul-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: align USB DWC3 clocks with bindings Bindings require different order of clocks for USB DWC3 nodes (sleep before mock_utmi). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230723141849.93078-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
09f1642e |
|
18-Jul-2023 |
Alexey Minnekhanov <alexeymin@postmarketos.org> |
arm64: dts: qcom: sdm630: Add support for modem remoteproc Modem subsystem in SDM630/660 is similar to MSM8998 and device tree node for it is based on the one from msm8998.dtsi. Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Link: https://lore.kernel.org/r/20230719093458.2668842-1-alexeymin@postmarketos.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
b79663a5 |
|
30-Jul-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: use defines for interrupts Replace hard-coded interrupt parts (GIC, flags) with standard defines for readability. No changes in resulting DTBs. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230730180638.23539-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
7e1acc8b |
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15-Jun-2023 |
Stephan Gerhold <stephan@gerhold.net> |
arm64: dts: qcom: Add rpm-proc node for GLINK gplatforms Rather than having the RPM GLINK channels as the only child of a dummy top-level rpm-glink node, switch to representing the RPM as remoteproc like all the other remoteprocs (modem DSP, ...). This allows assigning additional subdevices to it like the MPM interrupt-controller or rpm-master-stats. Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM6375 Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-11-a07dcdefd918@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
934a3b4d |
|
02-Jul-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: minor whitespace cleanup around '=' The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230702185051.43867-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#
8e61d532 |
|
30-May-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: rename labels for DSI nodes Currently in board files MDSS and DSI nodes stay apart, because labels for DSI nodes do not have the mdss_ prefix. It was found that grouping all display-related notes is more useful. To keep all display-related nodes close in the board files, change DSI node labels from dsi_* to mdss_dsi_*. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230531011623.3808538-11-dmitry.baryshkov@linaro.org
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#
cefb4077 |
|
20-Apr-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: add unit address to soc node "soc" node is supposed to have unit address: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230420063610.11068-6-krzysztof.kozlowski@linaro.org
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#
c8b7faa7 |
|
19-Apr-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: correct camss unit address Match unit-address to reg entry to fix dtbs W=1 warnings: Warning (simple_bus_reg): /soc/camss@ca00000: simple-bus unit address format error, expected "ca00020" Fixes: f3d5d3cc6971 ("arm64: dts: qcom: sdm630: Configure the camera subsystem") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230419211856.79332-10-krzysztof.kozlowski@linaro.org
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#
9c6e72fb |
|
15-Apr-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: add missing cache properties Add required cache-level and cache-unified properties to fix warnings like: qdu1000-idp.dtb: l3-cache: 'cache-unified' is a required property qdu1000-idp.dtb: l2-cache: 'cache-level' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416101134.95686-3-krzysztof.kozlowski@linaro.org
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#
a9e76cf1 |
|
07-Apr-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node The DSI OPP table on SDM630 is used by one DSI0, but on SDM660 is shared by two nodes (DSI0 and DSI1), thus it should be rather in top-level, not in DSI0. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407192605.168666-1-krzysztof.kozlowski@linaro.org
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#
2d034324 |
|
22-Mar-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: add compatible fallback to mailbox SDM630 mailbox is compatible with MSM8994. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230322174148.810938-7-krzysztof.kozlowski@linaro.org
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#
a2e5260d |
|
24-Mar-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: move DSI opp-table into DSI node The soc node is supposed to have only device nodes with MMIO addresses, so move the DSI OPP into the DSI controller node to fix: sda660-inforce-ifc6560.dtb: soc: opp-table-dsi: {'compatible': ['operating-points-v2'], ... should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324202244.744271-5-krzysztof.kozlowski@linaro.org
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#
d882778e |
|
08-Mar-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: drop incorrect cell-index from SPMI The SPMI controller (PMIC Arbiter)) does not use nor allow 'cell-index' property: sm8150-microsoft-surface-duo.dtb: spmi@c440000: Unevaluated properties are not allowed ('cell-index' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308125906.236885-1-krzysztof.kozlowski@linaro.org
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#
0aab1b9b |
|
08-Jan-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: rename mdp nodes to display-controller Follow the schema change and rename mdp nodes to generic name 'display-controller'. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109051402.317577-6-dmitry.baryshkov@linaro.org
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#
ecf0f5ff |
|
08-Jan-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: rename mdss nodes to display-subsystem Follow the schema change and rename mdss nodes to generic name 'display-subsystem'. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109051402.317577-4-dmitry.baryshkov@linaro.org
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#
d46fbd45 |
|
08-Jan-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: add SoC specific compat strings to mdp5 nodes Add SoC-specific compat string to the MDP5 device nodes to ease distinguishing between various platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109050152.316606-5-dmitry.baryshkov@linaro.org
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#
1364acc3 |
|
13-Dec-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: replace underscores in node names Underscores should not be used in node names (dtc with W=2 warns about them), so replace them with hyphens. In few places adjust the name to match other nodes (e.g. xxx-regulator). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214110448.86268-1-krzysztof.kozlowski@linaro.org
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#
197d28d4 |
|
22-Dec-2022 |
Bryan O'Donoghue <bryan.odonoghue@linaro.org> |
arm64: dts: qcom: sdm630: Add compat qcom,sdm660-dsi-ctrl The sdm630 can use the sdm660 mdss-dsi-ctrl compat. Currently it has the same set of binding dependencies as sdm660. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221223021025.1646636-16-bryan.odonoghue@linaro.org
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#
54426328 |
|
11-Dec-2022 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
arm64: dts: qcom: sdm630: Use lowercase hex Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221212111037.98160-5-konrad.dybcio@linaro.org
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#
048a765a |
|
11-Oct-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: align TLMM pin configuration with DT schema DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. All nodes for GPIOs must also define the function property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221011190231.76784-3-krzysztof.kozlowski@linaro.org
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#
06783c3a |
|
11-Oct-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: correct I2C8 pin functions The I2C8 pins are split into i2c8_a (GPIO30 and GPIO31) and i2c8_b (GPIO44 and GPIO52). Correct the name of function for I2C8 pins. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221011190231.76784-2-krzysztof.kozlowski@linaro.org
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#
804ec4da |
|
11-Oct-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: add UART pin functions Configure UART1 and UART2 pins to respective functions in default state, otherwise the pins might stay as GPIOs. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221011190231.76784-1-krzysztof.kozlowski@linaro.org
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#
e922200b |
|
23-Sep-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: change DSI PHY node name to generic one Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220924090108.166934-7-dmitry.baryshkov@linaro.org
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#
325821c7 |
|
06-Sep-2022 |
Bryan O'Donoghue <bryan.odonoghue@linaro.org> |
arm64: dts: qcom: sdm630: Drop redundant phy-names from DSI controller phy-names has been marked deprecated. Remove it from the sdm630 DSI controller block. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220907000105.786265-10-bryan.odonoghue@linaro.org
|
#
780f836f |
|
10-Oct-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: fix UART1 pin bias There is no "bias-no-pull" property. Assume intentions were disabling bias. Fixes: b190fb010664 ("arm64: dts: qcom: sdm630: Add sdm630 dts file") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221010114417.29859-1-krzysztof.kozlowski@linaro.org
|
#
aa27f316 |
|
10-Sep-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: align APR services node names with dtschema DT schema expects APR services node names to be "service": qcom/sdm850-lenovo-yoga-c630.dtb: remoteproc-adsp: glink-edge:apr: 'apr-service@3', 'apr-service@4', 'apr-service@7', 'apr-service@8', 'qcom,glink-channels', 'qcom,intents' do not match any of the regexes: '^service@[1-9a-d]$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220910091428.50418-2-krzysztof.kozlowski@linaro.org
|
#
d0909bf4 |
|
05-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
arm64: dts: qcom: fix syscon node names Some recent changes that added new syscon nodes used misspelled node names. Fixes: 86d7c9460e2c arm64: dts: qcom: sm8150: split TCSR halt regs out of mutex Fixes: 0da603387225 arm64: dts: qcom: sdm630: split TCSR halt regs out of mutex Fixes: 8a8531e69b2d arm64: dts: qcom: sdm845: split TCSR halt regs out of mutex Fixes: d9a2214d6ba5 arm64: dts: qcom: sc7280: split TCSR halt regs out of mutex Fixes: ce1ac53c7faa arm64: dts: qcom: sc7180: split TCSR halt regs out of mutex Fixes: fc10cfa38580 arm64: dts: qcom: msm8998: split TCSR halt regs out of mutex Fixes: 100ce2205924 arm64: dts: qcom: msm8996: split TCSR halt regs out of mutex Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220905091602.20364-1-johan+linaro@kernel.org
|
#
a4c82270 |
|
19-Aug-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: switch TCSR mutex to MMIO The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'reg' is a required property qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-15-krzysztof.kozlowski@linaro.org
|
#
0da60338 |
|
19-Aug-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: split TCSR halt regs out of mutex The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-14-krzysztof.kozlowski@linaro.org
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21857088 |
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06-Jul-2022 |
Douglas Anderson <dianders@chromium.org> |
Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes" This reverts commit afcbe252e9c19161e4d4c95f33faaf592f1de086. The commit in question caused my sc7280-herobrine-herobrine-r1 board not to boot anymore. This shouldn't be too surprising since the driver is relying on the name "cqhci". The issue seems to be that someone decided to change the names of things when the binding moved from .txt to .yaml. We should go back to the names that the bindings have historically specified. For some history, see commit d3392339cae9 ("mmc: cqhci: Update cqhci memory ioresource name") and commit d79100c91ae5 ("dt-bindings: mmc: sdhci-msm: Add CQE reg map"). Fixes: afcbe252e9c1 ("arm64: dts: qcom: Fix 'reg-names' for sdhci nodes") Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706144706.1.I48f35820bf3670d54940110462555c2d0a6d5eb2@changeid
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616ab047 |
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07-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: add dedicated IMEM and syscon compatibles Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-12-krzysztof.kozlowski@linaro.org
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bed08556 |
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07-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: use generic sram as name for imem and ocmem nodes According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-8-krzysztof.kozlowski@linaro.org
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dc74f89e |
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17-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: remove unneeded address/size cells in glink-edge glink-edge node does not have children with unit addresses: sdm630-sony-xperia-ganges-kirin.dtb: glink-edge: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517070113.18023-11-krzysztof.kozlowski@linaro.org
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afcbe252 |
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14-May-2022 |
Bhupesh Sharma <bhupesh.sharma@linaro.org> |
arm64: dts: qcom: Fix 'reg-names' for sdhci nodes Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'reg-names' as various possible combinations are possible for different qcom SoC dts files. Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-6-bhupesh.sharma@linaro.org
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4ff12270 |
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14-May-2022 |
Bhupesh Sharma <bhupesh.sharma@linaro.org> |
arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names' for sdhci nodes Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'clocks' & 'clock-names' for sdhci nodes: arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:0: 'iface' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:1: 'core' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:2: 'xo' was expected Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
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40940823 |
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14-May-2022 |
Bhupesh Sharma <bhupesh.sharma@linaro.org> |
arm64: dts: qcom: sdm630: Fix 'interconnect-names' for sdhci nodes Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'interconnect-names' used for sdhci nodes. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-3-bhupesh.sharma@linaro.org
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96bb736f |
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14-May-2022 |
Bhupesh Sharma <bhupesh.sharma@linaro.org> |
arm64: dts: qcom: Fix sdhci node names - use 'mmc@' Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> [bjorn: Moved non-arm64 changes to separate commit] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
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372cf591 |
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26-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
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74b0fbd6 |
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05-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: correct QFPROM byte offsets The NVMEM bindings expect that 'bits' property holds offset and size of region within a byte, so it applies a constraint of <0, 7> for the offset. Using 25 as HSTX trim offset is within 4-byte QFPROM word, but outside of the byte: sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: hstx-trim@240:bits:0:0: 25 is greater than the maximum of 7 sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: gpu-speed-bin@41a0:bits:0:0: 21 is greater than the maximum of 7 Align the offsets to match the bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-6-krzysztof.kozlowski@linaro.org
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b2eab35b |
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05-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: use dedicated QFPROM compatibles Use dedicated compatibles for QFPROM on MSM8916, MSM8996, MSM8998, QCS404 and SDM630 which is expected by the bindings: msm8996-mtp.dtb: qfprom@74000: compatible:0: 'qcom,qfprom' is not one of ['qcom,apq8064-qfprom', ... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-5-krzysztof.kozlowski@linaro.org
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5e9bc1ba |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files This results in dts duplication, but per mutual agreement card detect pin configuration belongs to the board files. Move it from the SoC dtsi to the board DT files. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-10-dmitry.baryshkov@linaro.org
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3cd1c4f4 |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: fix gpu's interconnect path ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream kernel sources, the GPU uses MASTER_OXILI here, which is equivalent to <&bimc 1 ...>. While we are at it, use defined names instead of the numbers for this interconnect path. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reported-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-8-dmitry.baryshkov@linaro.org
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8b6da22e |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: add second (HS) USB host support Add DT entries for the second DWC3 USB host, which is limited to the USB2.0 (HighSpeed), and the corresponding QUSB PHY. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-7-dmitry.baryshkov@linaro.org
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696dea7e |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 In preparation to adding second USB host/PHY pair, change first USB PHY's label to qusb2phy0. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-6-dmitry.baryshkov@linaro.org
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924bbd8d |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: fix the qusb2phy ref clock According to the downstram DT file, the qusb2phy ref clock should be GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK. Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-5-dmitry.baryshkov@linaro.org
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1c047919 |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: disable GPU by default The SoC's device tree file disables gpucc and adreno's SMMU by default. So let's disable the GPU too. Moreover it looks like SMMU might be not usable without additional patches (which means that GPU is unusable too). No board uses GPU at this moment. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-4-dmitry.baryshkov@linaro.org
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79d8e016 |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Follow the typical practice and keep DSI0/DSI0 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-2-dmitry.baryshkov@linaro.org
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cb0b6853 |
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09-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: order interrupts according to bindings The CAMSS DTSI device node, which came after the bindings were merged, got the interrupts ordered differently then specified in the bindings: sdm630-sony-xperia-nile-pioneer.dtb: camss@ca00000: interrupt-names:0: 'csid0' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-4-krzysztof.kozlowski@linaro.org
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7908dcc8 |
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09-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: order regs according to bindings The CAMSS DTSI device node, which came after the bindings were merged, got the regs ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:0: 'csi_clk_mux' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-3-krzysztof.kozlowski@linaro.org
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e8881372 |
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09-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sdm630: order clocks according to bindings The CAMSS DTSI device node, which came after the bindings were merged, got the clocks ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:4: 'csid3' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-2-krzysztof.kozlowski@linaro.org
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0e3e6546 |
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27-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: align OPP table names with DT schema DT schema expects names of operating points tables to start with "opp-table": ipq6018-cp01-c1.dtb: cpu_opp_table: $nodename:0: 'cpu_opp_table' does not match '^opp-table(-[a-z0-9]+)?$' Use hyphens instead of underscores, fix the names to match DT schema or remove the prefix entirely when it is not needed. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627093250.84391-1-krzysztof.kozlowski@linaro.org
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8d5fd4e4 |
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04-May-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: align DWC3 USB clocks with DT schema Align order of clocks and their names with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-13-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2a11b3bf |
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02-Mar-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sdm630: Drop flags for mdss irqs The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Fixes: b52555d590d1 ("arm64: dts: qcom: sdm630: Add MDSS nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
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2f114511 |
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14-Dec-2021 |
David Heidelberg <david@ixit.cz> |
arm64: dts: qcom: update qcom,domain property Since 'qcom,apr-domain' is deprecated in favor of 'qcom,domain', update accordingly. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211214102451.29084-1-david@ixit.cz
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409fd3f1 |
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08-Dec-2021 |
David Heidelberg <david@ixit.cz> |
arm64: qcom: dts: drop legacy property #stream-id-cells Property #stream-id-cells is legacy leftover and isn't currently documented nor used. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208184707.100716-1-david@ixit.cz
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b1394251 |
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20-Nov-2021 |
Dang Huynh <danct12@riseup.net> |
arm64: dts: qcom: sdm630: Assign numbers to eMMC and SD This makes eMMC/SD device number consistent. Reviewed-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Dang Huynh <danct12@riseup.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-2-danct12@riseup.net
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179811be |
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18-Oct-2021 |
Stephan Gerhold <stephan@gerhold.net> |
arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes According to the new DT schema for qcom,rpm-msg-ram the node name should be sram@. memory@ is reserved for definition of physical RAM (usable by Linux). This fixes the following dtbs_check error on various device trees: memory@60000: 'device_type' is a required property From schema: dtschema/schemas/memory.yaml Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018110009.30837-1-stephan@gerhold.net
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f468ecf1 |
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07-Oct-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: qcom: sdm630: Add disabled Venus support Add support for the Venus video decoder/encoder but leave it disabled by default; it is expected to eventually get enabled in each machine specific DT, where required. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211008102119.268869-3-angelogioacchino.delregno@collabora.com
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290bc684 |
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12-Oct-2021 |
Maulik Shah <mkshah@codeaurora.org> |
arm64: dts: qcom: Enable RPM Sleep stats Add device node for Sleep stats driver which provides various low power mode stats on msm8996, msm8998, qcs404, sdm630 and sm6125. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1634107104-22197-6-git-send-email-mkshah@codeaurora.org
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1878f4b7 |
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23-Aug-2021 |
Shawn Guo <shawn.guo@linaro.org> |
arm64: dts: qcom: sdm630: Add missing a2noc qos clocks It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Fixes: 045547a02252 ("arm64: dts: qcom: sdm630: Add interconnect provider nodes") Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210824043435.23190-4-shawn.guo@linaro.org
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639dfdbe |
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07-Mar-2021 |
Vinod Koul <vkoul@kernel.org> |
arm64: dts: qcom: sdm630: don't use underscore in node name We have underscore (_) in node name so fix that up as well. Fix this by changing node name to use dash (-) Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-11-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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cfdf0c27 |
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07-Mar-2021 |
Vinod Koul <vkoul@kernel.org> |
arm64: dts: qcom: sdm630: don't use empty memory node We expect bootloader to full memory details but passing empty values can give warning, so add a default value Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210308060826.3074234-15-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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712e245f |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add DMA to I2C hosts Add DMA properties to I2C hosts to allow for DMA transfers. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-40-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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536f4428 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add I2C functions to I2C pins This was overlooked earlier, fix it to ensure the busses can work properly. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-39-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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f3d5d3cc |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Configure the camera subsystem Add nodes for camss, cci and its pinctrl in order to bring up camera functionality. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-28-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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c21512cb |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add IMEM node Add IMEM node and PIL reloc info as its child. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-27-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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5cf69dcb |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration The SDM630 SoC features an Adreno 508.0 GPU with a minimum frequency of 160MHz and a maximum of (depending on the speed-bin) 775MHz. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-20-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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adc57d4a |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Raise tcsr_mutex_regs size Enlarge the size to make sure all relevant registers can be reached. This will be required to support the modem. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-19-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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7ca2ebc9 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add ADSP remoteproc configuration Configure the ADSP remote processor and add a simple sound{} node to make way for future development. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-18-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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3332c596 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add thermal-zones configuration Add a basic thermal-zones configuration to make sure the SoC doesn't overheat itself to death. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-17-konrad.dybcio@somainline.org [bjorn: Sorted thermal-zones below "soc"] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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c8236767 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add modem/ADSP SMP2P nodes Add SMP2P nodes that are required for ADSP and modem bringup. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-16-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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7c54b82b |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add TSENS node This will enable temperature reporting for various SoC components. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-15-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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056d4ff8 |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Add qcom,adreno-smmu compatible The Adreno SMMU in SDM630 needs this compatible string for proper context handling and split pagetables support. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-14-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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6bb717fe |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Add clocks and power domains to SMMU nodes Add the required clocks and power domains for the SMMUs to work. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-13-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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a64fa0e2 |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Add GPU Clock Controller node Add the GPU Clock Controller in SDM630 and keep it disabled by default. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-12-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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738777ab |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Add interconnect and opp table to sdhc_1 The SDHC port 1 has interconnects and can make use of DVFS: define the interconnections and the OPP table in order to optimize performance and power consumption. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-11-konrad.dybcio@somainline.org [bjorn: Dropped "sdhc1-" prefix from opp-table node] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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0b700aa1 |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Add SDHCI2 node This will enable usage of (generally) uSD cards. While at it, add accompanying OPP table for DVFS. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-10-konrad.dybcio@somainline.org [bjorn: Dropped "sdhci1-" prefix from opp-table node] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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36a0d47a |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Fix TLMM node and pinctrl configuration Previous pinctrl configuration was wrong. Fix it and clean up how multi-pin states are described. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-9-konrad.dybcio@somainline.org [bjorn: Polished the commit message] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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c65a4ed2 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add USB configuration This will let us use USB2 on our devices. The SoC supposedly supports USB3, but there are no known cases of devices that actually have USB3 wired up in hardware. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-8-konrad.dybcio@somainline.org [bjorn: Changes dwc3 node name to "usb"] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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142662f8 |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Add qfprom subnodes These will be required for USB and Adreno support. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-7-konrad.dybcio@somainline.org [bjorn: y/_/-/ in gpu_speed_bin] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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b52555d5 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add MDSS nodes Add MDSS node along with its children to enable display functionality. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-6-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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045547a0 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add interconnect provider nodes Add interconnect provider nodes to allow for NoC bus scaling. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-5-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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01b182d9 |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add MMCC node Add MultiMedia Clock Controller node to allow for accessing and controlling Multimedia Subsystem clocks by their respective users. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-4-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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1ce921ae |
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28-Jul-2021 |
Konrad Dybcio <konrad.dybcio@somainline.org> |
arm64: dts: qcom: sdm630: Add RPMPD nodes Add the rpmpd node on the sdm630 and define the available levels. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-3-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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26e02c98 |
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28-Jul-2021 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
arm64: dts: qcom: sdm630: Rewrite memory map The memory map was wrong. Fix it. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-2-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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e49c2912 |
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21-Jan-2021 |
Eric Biggers <ebiggers@google.com> |
arm64: dts: qcom: sdm630: add ICE registers and clocks Add the registers and clock for the Inline Crypto Engine (ICE) to the device tree node for the sdhci-msm host controller on sdm630. This allows sdhci-msm to support inline encryption on sdm630. Signed-off-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20210121090140.326380-9-ebiggers@kernel.org [bjorn: Changed indentation] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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b831fba3 |
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27-Oct-2020 |
Vinod Koul <vkoul@kernel.org> |
arm64: dts: sdm630: Fix dma node name DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-3-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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326407d2 |
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29-Jun-2020 |
Konrad Dybcio <konradybcio@gmail.com> |
arm64: dts: sdm630: Temporarily disable SMMUs by default There happens to be an issue between how kernel handles qcom-smmuv2 and how the hypervisor would like it to be handled. That results in the platform hanging completely after the SMMUs are probed. Hence, disable the SMMU nodes temporarily, until the issue is rectified. This has been overlooked by me in the initial porting stage, as my defconfig has SMMU disabled. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200629222610.168511-1-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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b190fb01 |
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22-Jun-2020 |
Konrad Dybcio <konradybcio@gmail.com> |
arm64: dts: qcom: sdm630: Add sdm630 dts file Add devicetree files for SDM630 SoC and its pin configuration. This commit adds basic nodes like cpu, psci and other required configuration for booting up from eMMC to the serial console. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-5-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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