History log of /linux-master/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
Revision Date Author Comments
# fe96d8b2 23-May-2023 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: marvell: Fix pca954x i2c-mux node names

"make dtbs_check":

arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtb: i2c-switch@70: $nodename:0: 'i2c-switch@70' does not match '^(i2c-?)?mux'
From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtb: i2c-switch@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2' were unexpected)
From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
...

Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus
multiplexer/switch DT bindings and the Generic Names Recommendation in
the Devicetree Specification.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# 4ce223e5 06-Jul-2022 Ioana Ciornei <ioana.ciornei@nxp.com>

arch: arm64: dts: marvell: rename the sfp GPIO properties

Rename the GPIO related sfp properties to include the preffered -gpios
suffix. Also, with this change the dtb_check will no longer complain
when trying to verify the DTS against the sff,sfp.yaml binding.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>


# 8c1be933 26-May-2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

arm64: dts: marvell: adjust whitespace around '='

Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220526204525.832847-1-krzysztof.kozlowski@linaro.org


# 2f00bb4a 07-Apr-2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

arm64: dts: marvell: align SPI NOR node name with dtschema

The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220407143234.295426-2-krzysztof.kozlowski@linaro.org


# 99fa8ac5 07-Mar-2021 Konstantin Porotchkin <kostap@marvell.com>

arm64: dts: marvell: enable CP110 UTMI PHY usage

Enable support for CP110 UTMI PHY in Armada SoC family platform
device trees.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# 05abc6a5 26-Feb-2020 Russell King <rmk+kernel@armlinux.org.uk>

arm64: dts: mcbin: support 2W SFP modules

Allow the SFP cages to be used with 2W SFP modules.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# 1399672e 04-Oct-2019 Miquel Raynal <miquel.raynal@bootlin.com>

arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file

As an example, Armada 70x0 and 80x0 SoC 0xf9000000 region points to
RUNIT/SPICS0 while it is referenced in the DT as PCIe I/O memory
range. This shows that I/O memory has never been used/working on the
old SoCs despite the region being advertised. As PCIe I/O ranges will
not be supported in newer SoCs using CP11x co-processors, let's
simply drop them. It is not harmful in any case as PCIe device drivers
can do it all with the regular mapped memory anyway.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# 96018a6f 31-Jul-2019 Miquel Raynal <miquel.raynal@bootlin.com>

arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply

Update Aramda 7k/8k DTs to use the phy-supply property of the (recent)
generic PHY framework instead of the (legacy) usb-phy preperty. Both
enable the supply when the PHY is enabled.

The COMPHY nodes only provide SERDES lanes configuration. The power
supply that is represented by the phy-supply property is just a
regulator wired to the USB connector, hence the creation of connector
nodes as child of the COMPHY nodes and the supply attached to it.

Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# ce55522c 31-Jul-2019 Miquel Raynal <miquel.raynal@bootlin.com>

arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes

Fill-in the missing PCIe phys/phy-names DT properties of Armada 7k/8k
based boards.

The MacchiatoBin is a bit particular as the Armada8k-PCI IP supports
x4 link widths and in this case the PHY for each lane must be
referenced.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# 01d0deba 31-Jul-2019 Miquel Raynal <miquel.raynal@bootlin.com>

arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes

Fill-in the missing USB3 phys/phy-names DT properties of Armada 7k/8k
based boards. Only update nodes actually enabling USB3 in the default
(mainline) configuration. A few USB nodes are enabled but there is
only USB2 working on them.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# d04abe99 31-Jul-2019 Miquel Raynal <miquel.raynal@bootlin.com>

arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes

Fill-in the missing SATA phys/phy-names DT properties of Armada 7k/8k
based boards.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# d3446b26 17-May-2019 Heinrich Schuchardt <xypron.glpk@gmx.de>

arm64: dts: marvell: mcbin: enlarge PCI memory window

Running a graphics adapter on the MACCHIATObin fails due to an
insufficiently sized memory window.

Enlarge the memory window for the PCIe slot to 512 MiB.

With the patch I am able to use a GT710 graphics adapter with 1 GB onboard
memory.

These are the mapped memory areas that the graphics adapter is actually
using:

Region 0: Memory at cc000000 (32-bit, non-prefetchable) [size=16M]
Region 1: Memory at c0000000 (64-bit, prefetchable) [size=128M]
Region 3: Memory at c8000000 (64-bit, prefetchable) [size=32M]
Region 5: I/O ports at 1000 [size=128]
Expansion ROM at ca000000 [disabled] [size=512K]

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# 59c4dccb 11-Dec-2018 Baruch Siach <baruch@tkos.co.il>

arm64: dts: marvell: mcbin: fix PCIe reset signal

The MPP52 signal is on the seconds GPIO instance of CP0, which
corresponds to the &cp0_gpio2 handle.

Rename the property name to the standard '-gpios' suffix while at it.

Fixes: b83e1669adce6 ("arm64: dts: marvell: mcbin: add support for PCIe")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>


# b1f0bbe2 05-Nov-2018 Russell King <rmk+kernel@armlinux.org.uk>

arm64: dts: add support for Macchiatobin Single Shot board

Add DT support for the Macchiatobin Single Shot board from SolidRun,
which is similar to the Double Shot board, but does not have the
10G 3310 PHYs - the two ethernet ports are instead connected directly
to the SFP+ cages.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>