History log of /linux-master/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
Revision Date Author Comments
# 3d501682 05-Jun-2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

arm64: dts: exynos: use local header for pinctrl register values

The DTS uses hardware register values directly in pin controller pin
configuration. These are not some IDs or other abstraction layer but
raw numbers used in the registers.

These numbers were previously put in the bindings header to avoid code
duplication and to provide some context meaning (name), but they do not
fit the purpose of bindings.

Store the constants in a header next to DTS and use them instead of
bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-6-krzysztof.kozlowski@linaro.org


# 75a0c6a5 11-Jan-2022 Krzysztof Kozlowski <krzk@kernel.org>

arm64: dts: exynos: align pinctrl with dtschema in Exynos850

Align the pin controller related nodes with dtschema. No functional
change expected.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20220111201722.327219-13-krzysztof.kozlowski@canonical.com


# bfb3c7fa 31-Jan-2022 Sam Protsenko <semen.protsenko@linaro.org>

arm64: dts: exynos: Add initial Exynos850 SoC support

Samsung Exynos850 is ARMv8-based mobile-oriented SoC. This patch adds
initial SoC support. It's not comprehensive yet, some more devices will
be added later. Right now only crucial system components and most needed
platform devices are defined.

Crucial features (needed to boot Linux up to shell with serial console):

* Octa cores (Cortex-A55), supporting PSCI v1.0
* ARM architected timer (armv8-timer)
* Interrupt controller (GIC-400)
* Pinctrl nodes for GPIO
* Serial node

Basic platform features:

* Clock controller CMUs
* OSCCLK clock
* MCT timer
* ARM PMU (Performance Monitor Unit)
* Chip-id
* RTC
* Reset
* Watchdog timers
* eMMC
* I2C
* HSI2C
* USI

All those features are tested on E850-96 board with minimal BusyBox
rootfs.

Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20220131130849.2667-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>