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3d501682 |
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05-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: exynos: use local header for pinctrl register values The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Tested-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-6-krzysztof.kozlowski@linaro.org
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ee045adb |
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11-Jan-2022 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: exynos: align pinctrl with dtschema in Exynos7 Align the pin controller related nodes with dtschema. No functional change expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220111201722.327219-12-krzysztof.kozlowski@canonical.com
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45fef752 |
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25-Dec-2017 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: exynos: Add SPDX license identifiers Replace GPL v2.0 license statements with SPDX license identifiers. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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51a2de55 |
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19-Jan-2017 |
Pankaj Dubey <pankaj.dubey@samsung.com> |
arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7 Usage of DTS macros instead of hard-coded numbers makes code easier to read. One does not have to remember which value means pull-up/down or specific driver strength. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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9f6fe6f0 |
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19-Jan-2017 |
Pankaj Dubey <pankaj.dubey@samsung.com> |
arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions As per Exynos7 datasheet FSYS1 pinctrl block does not support drive strength value of 0x3. This patch fixes this and update the correct drive strength for sd0_xxx pin definitions. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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86bb573d |
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16-Sep-2016 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7 Replace hard-coded values of type of GIC interrupt and its flags with respective macros from header to increase code readability Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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ef4aea97 |
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16-Sep-2016 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: exynos: Fix invalid GIC interrupt flags in exynos7 Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and generates an error: genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68) The GIC requires shared interrupts to be edge rising or level high. Platform declares support for both. Arbitrarily choose level high everywhere hoping it will work on each platform. Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Reported-by: Alban Browaeys <alban.browaeys@gmail.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
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c60ce7fe |
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13-Sep-2015 |
Alim Akhtar <alim.akhtar@samsung.com> |
arm64: dts: Add BUS1 instance pinctrl support for exynos7 This adds BUS1 instance pinctrl for exynos7 soc. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
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f17a618b |
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22-Nov-2014 |
Naveen Krishna Ch <naveenkrishna.ch@gmail.com> |
arm64: dts: Add initial pinctrl support to exynos7 Add initial pin configuration nodes for exynos7 SoC. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: Thomas Abraham <thomas.ab@samsung.com> Tested-by: Thomas Abraham <thomas.ab@samsung.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Cc: Rob Herring <robh@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene@kernel.org>
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