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d2912cb1 |
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04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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90129336 |
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31-May-2017 |
Tero Kristo <t-kristo@ti.com> |
ARM: OMAP2+: PRCM: store also physical addresses for instances In some cases the physical address info is needed, so store this under the existing cm*_base, prm_base and prcm_mpu_base variables. These are converted now to structs that contain both virtual and physical address base for the instance. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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4ebf5b28 |
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05-May-2015 |
Tero Kristo <t-kristo@ti.com> |
ARM: OMAP4+: PRM: add support for passing status register/bit info to reset AM43xx has slightly different reset register layout compared to OMAP4+, with varying status bit shifts and status register offsets. Current code assumes static offsets and identical status / reset control bit shifts, which is wrong. This patch adds PRM core support for passing the actual implementations from hwmod code. AM43xx mappings will be fixed in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Dave Gerlach <d-gerlach@ti.com> Reported-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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48e0c114 |
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08-Sep-2014 |
Tero Kristo <t-kristo@ti.com> |
ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility PRM device instance offset is now provided through the prm_init_data. This gets rid of some cpu_is_X / soc_is_X calls from PRM core code, preparing for PRM to be its own separate driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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37fb59d7 |
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27-Oct-2014 |
Tero Kristo <t-kristo@ti.com> |
ARM: OMAP2+: PRM: add generic API for deasserting hardware reset PRM driver now has a generic API for deasserting hardware resets. SoC specific support functions are registered through the prm_ll_data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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e3002d1a |
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22-May-2014 |
Nishanth Menon <nm@ti.com> |
ARM: OMAP4+: prminst: provide function to find prm_dev instance offset PRM device instance can vary depending on SoC. We already handle the same during reset of the device, However, this is also needed for other logic instances. So, first abstract this out to a generic function. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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edfaf05c |
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15-Apr-2014 |
Victor Kamensky <victor.kamensky@linaro.org> |
ARM: OMAP2+: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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a7daf64a |
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28-Feb-2014 |
Lokesh Vutla <lokeshvutla@ti.com> |
ARM: OMAP2+: AM43xx: implement support for machine restart Add restart hook so that AM4372 builds can restart the platform. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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18ba7b9d |
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16-Feb-2014 |
Vaibhav Bedia <vaibhav.bedia@gmail.com> |
ARM: OMAP5: PRM: Fix reboot handling Use the correct register offset for issuing the reset command in OMAP5. Since dev_inst is set dynamically OMAP4 should not be affected by this change. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@gmail.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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1d597b07 |
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09-Jul-2013 |
Rajendra Nayak <rnayak@ti.com> |
ARM: OMAP: DRA7: Reuse the omap44xx_restart and fix the device instance The omap44xx_restart used on omap4 and omap5 devices can be reused on dra7 devices as well. The device instance however is different across omap5 and dra7 as compared to omap4. So fix this for omap5 as well as dra7. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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610eb8c2 |
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07-May-2012 |
R Sricharan <r.sricharan@ti.com> |
ARM: OMAP4+: Add prm and cm base init function. Instead of statically defining seperate arrays for every OMAP4+ archs, have a generic init function to populate the arrays. This avoids the need for creating new array for every arch added in the future that reuses the prm and cm registers read/write code. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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ee0839c2 |
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24-Feb-2012 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Move most of plat/io.h into local iomap.h There's no need to have these defines in plat/io.h. Note that we now need to ifdef omap_read/write calls as they will be available for omap1 only. While at it, clean up the includes to group them like they typically are grouped. Signed-off-by: Tony Lindgren <tony@atomide.com>
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4e65331c |
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10-Nov-2011 |
Tony Lindgren <tony@atomide.com> |
ARM: 7159/1: OMAP: Introduce local common.h files As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>, there's no need to keep local prototypes in non-local headers. Add mach-omap1/common.h and mach-omap2/common.h and move the local prototypes there from plat/common.h and mach/omap4-common.h. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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e54433f1 |
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10-Jul-2011 |
Benoit Cousson <b-cousson@ti.com> |
OMAP4: prm: Replace warm reset API with the offset based version The warm reset function was still using the obsolete API. Replace it by the new one and move the file to the proper c file. Change the function names to stick to the file convention as suggested by Paul Walmsley <paul@pwsan.com>: prm_xxx -> prminst_xxx Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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eaac329d |
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10-Jul-2011 |
Benoit Cousson <b-cousson@ti.com> |
OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros The RSTCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of an offset will allow future improvement like migration from the current architecture code toward a module driver. Update prm_xxx accessors, move definition to the proper header file and update copyrights. Change the s16 register offset parameter to u16. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: use '_prminst_' in function names that are part of the prminst44xx.c file] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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2ace831f |
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21-Dec-2010 |
Paul Walmsley <paul@pwsan.com> |
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions In some ways, the OMAP4 PRCM register layout is quite different than the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a register layout point of view, all CM instances were located in the CM subsystem, and all PRM instances were located in the PRM subsystem. OMAP4 changes this. Now, for example, some CM instances, such as WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a "local PRCM" exists for the MPU - this PRCM combines registers that would normally appear in both CM and PRM instances, but uses its own register layout which matches neither the OMAP2/3 PRCM layout nor the OMAP4 PRCM layout. To try to deal with this, introduce some new functions, omap4_cminst* and omap4_prminst*. The former is to be used when writing to a CM instance register (no matter what subsystem or hardware module it exists in), and the latter, similarly, with PRM instance registers. To determine which "PRCM partition" to write to, the functions take a PRCM instance ID argument. Subsequent patches add these partition IDs to the OMAP4 powerdomain and clockdomain definitions. As far as I can see, there's really no good way to handle these types of register access inconsistencies. This patch seemed like the least bad approach. Moving forward, the long-term goal is to remove all direct PRCM register access from the PM code. PRCM register access should go through layers such as the powerdomain and clockdomain code that can hide the details of how to interact with the specific hardware variant. While here, rename cm4xxx.c to cm44xx.c to match the naming convention of the other OMAP4 PRCM files. Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak <rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
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