History log of /linux-master/arch/arm/mach-imx/pm-imx6.c
Revision Date Author Comments
# 66ba9c05 17-Jul-2023 Rob Herring <robh@kernel.org>

ARM: imx: Drop unused includes

Several includes are not needed, so drop them.

of_platform.h (for now) implicitly includes platform_device.h and of.h, so
add explicit includes of those as needed.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 4aede550 20-Sep-2021 Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

ARM: imx6: mark OCRAM mapping read-only

iMX6 needs to write some code to OCRAM which resumes the DDR controller
after suspend. However, merely using __arm_ioremap_exec() causes the
kernel to complain of a W+X mapping. Solve this by using the newly
introduced __arm_iomem_set_ro() function to prevent inadvertent or
malicious writes to code we may later execute.

Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>


# 783f3db0 28-Sep-2021 Oleksij Rempel <linux@rempel-privat.de>

ARM: imx6: disable the GIC CPU interface before calling stby-poweroff sequence

Any pending interrupt can prevent entering standby based power off state.
To avoid it, disable the GIC CPU interface.

Fixes: 8148d2136002 ("ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# de5774d1 25-Jan-2021 Lee Jones <lee.jones@linaro.org>

clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible header

Fixes the following W=1 kernel build warning(s):

drivers/clk/imx/clk-imx6sl.c:156:6: warning: no previous prototype for ‘imx6sl_set_wait_clk’ [-Wmissing-prototypes]

Cc: Russell King <linux@armlinux.org.uk>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 48454460 04-Jun-2020 yu kuai <yukuai3@huawei.com>

ARM: imx6: add missing put_device() call in imx6q_suspend_init()

if of_find_device_by_node() succeed, imx6q_suspend_init() doesn't have a
corresponding put_device(). Thus add a jump target to fix the exception
handling for this function implementation.

Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 4a4fb661 13-Feb-2020 Anson Huang <Anson.Huang@nxp.com>

ARM: imx: Add missing of_node_put()

After finishing using device node got from of_find_compatible_node(),
of_node_put() needs to be called.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# fcaf2036 27-May-2019 Thomas Gleixner <tglx@linutronix.de>

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159

Based on 1 normalized pattern(s):

the code contained herein is licensed under the gnu general public
license you may obtain a copy of the gnu general public license
version 2 or later at the following locations http www opensource
org licenses gpl license html http www gnu org copyleft gpl html

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 161 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>


# d75f773c 25-Mar-2019 Sakari Ailus <sakari.ailus@linux.intel.com>

treewide: Switch printk users from %pf and %pF to %ps and %pS, respectively

%pF and %pf are functionally equivalent to %pS and %ps conversion
specifiers. The former are deprecated, therefore switch the current users
to use the preferred variant.

The changes have been produced by the following command:

git grep -l '%p[fF]' | grep -v '^\(tools\|Documentation\)/' | \
while read i; do perl -i -pe 's/%pf/%ps/g; s/%pF/%pS/g;' $i; done

And verifying the result.

Link: http://lkml.kernel.org/r/20190325193229.23390-1-sakari.ailus@linux.intel.com
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: sparclinux@vger.kernel.org
Cc: linux-um@lists.infradead.org
Cc: xen-devel@lists.xenproject.org
Cc: linux-acpi@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: drbd-dev@lists.linbit.com
Cc: linux-block@vger.kernel.org
Cc: linux-mmc@vger.kernel.org
Cc: linux-nvdimm@lists.01.org
Cc: linux-pci@vger.kernel.org
Cc: linux-scsi@vger.kernel.org
Cc: linux-btrfs@vger.kernel.org
Cc: linux-f2fs-devel@lists.sourceforge.net
Cc: linux-mm@kvack.org
Cc: ceph-devel@vger.kernel.org
Cc: netdev@vger.kernel.org
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: David Sterba <dsterba@suse.com> (for btrfs)
Acked-by: Mike Rapoport <rppt@linux.ibm.com> (for mm/memblock.c)
Acked-by: Bjorn Helgaas <bhelgaas@google.com> (for drivers/pci)
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Petr Mladek <pmladek@suse.com>


# 8f3e2d2c 05-Mar-2019 Kohji Okuno <okuno.kohji@jp.panasonic.com>

ARM: imx6: cpuidle: omit the unnecessary unmask of GINT

In imx6_set_lpm, we only need to unmask GINT when not WAIT_CLOCKED,
so add a check condition.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Kohji Okuno <okuno.kohji@jp.panasonic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# c90dec00 29-Sep-2018 Anson Huang <Anson.Huang@nxp.com>

ARM: imx: add i.mx6ulz msl support

The i.MX 6ULZ processor is a high-performance, ultra
cost-efficient consumer Linux processor featuring an
advanced implementation of a single Arm® Cortex®-A7 core,
which operates at speeds up to 900 MHz.

This patch adds basic MSL support for i.MX6ULZ, the
i.MX6ULZ has same soc_id as i.MX6ULL, and SRC_SBMR2 bit[6]
is to differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means
i.MX6ULZ and 1'b0 means i.MX6ULL.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 8148d213 01-Aug-2018 Oleksij Rempel <linux@rempel-privat.de>

ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set

One of the Freescale recommended sequences for power off with external
PMIC is the following:
...
3. SoC is programming PMIC for power off when standby is asserted.
4. In CCM STOP mode, Standby is asserted, PMIC gates SoC supplies.

See:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
page 5083

This patch implements step 4. of this sequence.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# d082852f 21-Jun-2018 Anson Huang <Anson.Huang@nxp.com>

ARM: imx: enable bus auto clock gating function for i.mx6sll

i.MX6SLL has HW bus auto clock gating function, enable
it by default to save VDD_SOC_IN power, about 5% ~ 20%
saved depends on different use cases.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 22021948 30-May-2018 Anson Huang <Anson.Huang@nxp.com>

ARM: imx: add mem mode suspend for i.MX6SLL

Add mem mode suspend for i.MX6SLL, when linux
kernel suspend, SoC will enter STOP mode,
ARM core will be power gated and MMDC IO
will be set to low power mode.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 07c4be9d 30-May-2018 Anson Huang <Anson.Huang@nxp.com>

ARM: imx: add standby mode suspend for i.MX6SLL

Add standby mode suspend for i.MX6SLL, when
linux kernel suspend, SoC will enter STOP mode
with ARM core power on.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 258172f9 23-Feb-2018 Fabio Estevam <fabio.estevam@nxp.com>

ARM: imx: pm-imx6: Return the error directly

Simplify the error path by returning the error code directly rather
than jumping to a label.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# bf5a01d7 06-Jun-2017 Leonard Crestez <leonard.crestez@nxp.com>

ARM: imx6ull: Make suspend/resume work like on 6ul

Suspend and resume on imx6ull is currenty not working because of some
missed checks where behavior should match imx6ul.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 64fc2a94 14-Jan-2017 Florian Fainelli <f.fainelli@gmail.com>

ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol

All low-level PM/SMP code using virt_to_phys() should actually use
__pa_symbol() against kernel symbols. Update code where relevant to move
away from virt_to_phys().

Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>


# 8aade778 22-Aug-2016 Anson Huang <Anson.Huang@nxp.com>

ARM: imx6: add missing BM_CLPCR_BYPASS_PMIC_READY setting for imx6sx

i.MX6SX has bypass PMIC ready function, as this function
is normally NOT enabled on the board design, so we need
to bypass the PMIC ready pin check during DSM mode resume
flow, otherwise, the internal DSM resume logic will be
waiting for this signal to be ready forever and cause
resume fail.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Fixes: ff843d621bfc ("ARM: imx: add suspend support for i.mx6sx")
Cc: <stable@vger.kernel.org>
Tested-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# 8765caa5 29-Aug-2016 Anson Huang <Anson.Huang@nxp.com>

ARM: imx: rename imx6q_set_int_mem_clk_lpm() function

Let's rename the function imx6q_set_int_mem_clk_lpm()
to imx6_set_int_mem_clk_lpm() since it's actually
common for all i.MX6 SoCs.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# f5a49057 09-Aug-2016 Peter Chen <peter.chen@nxp.com>

ARM: imx6: add missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul

There is a missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul,
without it, the "standby" mode can't work well, the system can't be
resumed.

With this commit, the "standby" mode works well.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: <stable@vger.kernel.org>
Fixes: ee4a5f838c84 ("ARM: imx: add suspend/resume support for i.mx6ul")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# cfefb762 26-Dec-2015 Jean-Christophe Dubois <jcd@tribudubois.net>

ARM: imx6: fix cleanup path in imx6q_suspend_init()

The wrong pointer is passed to the ioumap function in the cleanup path

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>


# ee4a5f83 04-Aug-2015 Anson Huang <b20788@freescale.com>

ARM: imx: add suspend/resume support for i.mx6ul

This patch adds suspend function for i.MX6UL, it supports
"standby" and "mem" mode, for "standby" mode, SoC will
enter STOP mode only, while for "mem" mode, SoC will
enter STOP mode and DDR IO will be set to low power
mode.

As i.MX6UL contains a "Cortex-A7" ARM core which has no
PL310, so we need to avoid any PL310 operations during
suspend/resume, also, we need to flush Cortex-A7's inernal
L2 cache before suspend.

Signed-off-by: Anson Huang <b20788@freescale.com>


# 73858173 04-Sep-2015 Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>

genalloc: add name arg to gen_pool_get() and devm_gen_pool_create()

This change modifies gen_pool_get() and devm_gen_pool_create() client
interfaces adding one more argument "name" of a gen_pool object.

Due to implementation gen_pool_get() is capable to retrieve only one
gen_pool associated with a device even if multiple gen_pools are created,
fortunately right at the moment it is sufficient for the clients, hence
provide NULL as a valid argument on both producer devm_gen_pool_create()
and consumer gen_pool_get() sides.

Because only one created gen_pool per device is addressable, explicitly
add a restriction to devm_gen_pool_create() to create only one gen_pool
per device, this implies two possible error codes returned by the
function, account it on client side (only misc/sram). This completes
client side changes related to genalloc updates.

[akpm@linux-foundation.org: gen_pool_get() cleanup]
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>


# 0030edf2 30-Jun-2015 Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>

genalloc: rename dev_get_gen_pool() to gen_pool_get()

To be consistent with other genalloc interface namings, rename
dev_get_gen_pool() to gen_pool_get(). The original omitted "dev_" prefix
is removed, since it points to argument type of the function, and so it
does not bring any useful information.

[akpm@linux-foundation.org: update arch/arm/mach-socfpga/pm.c]
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Mark Brown <broonie@kernel.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Alan Tull <atull@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>


# 35e2916f 28-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier

Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function")
moves imx6_set_lpm() from clock init function into
imx6_pm_common_init(). This causes a hang when cpuidle support is
enabled. The reason for that is ARM core clock is shut down
unexpectedly by WAIT mode. It happens with the following call stack:

cpuidle_register_governor()
cpuidle_switch_governor()
cpuidle_uninstall_idle_handler()
synchronize_sched()
wait_rcu_gp()
wait_for_completion()

When wait_for_completion() is called as above, all cores are idle/WFI.
Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a
hardware shutdown of the ARM core clock.

To fix the regression, we need to ensure that CCM_CLPCR_LPM is
initialized into RUN mode earlier than cpuidle governor registration,
which is a postcore_initcall. This patch creates function
imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into
RUN mode, and have the function called from machine .init_irq hook,
which should be early enough.

Reported-by: Kevin Hilman <khilman@kernel.org>
Fixes: 8fb76a07e2cb ("ARM: imx6: set initial power mode in pm function")
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>


# f0b478b5 25-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx6: let pm code map CCM block on its own

We are about to move imx6 clock driver into drivers/clk, so let's get
imx6 pm code map CCM block on its own rather than relying on clock
driver to do the mapping.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>


# 8fb76a07 25-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx6: set initial power mode in pm function

Rather than setting initial low-power mode in every single i.MX6 clock
initialization function, we should really do that in pm code. Let's
move imx6q_set_lpm(WAIT_CLOCKED) call into imx6_pm_common_init().

While at it, let's rename the function to imx6_set_lpm() since it's
actually common for all i.MX6 SoCs.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>


# b923ff6a 23-Feb-2015 Marc Zyngier <maz@kernel.org>

ARM: imx6: convert GPC to stacked domains

IMX6 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.

This patch does just this, updating the DT files to actually
reflect what the HW provides.

BIG FAT WARNING: because the DTs were so far lying by not
exposing the fact that the GPC block is actually the first
interrupt controller in the chain, kernels with this patch
applied wont have any suspend-resume facility when booted
with old DTs, and old kernels with updated DTs won't even boot.

Tested-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>


# 05136f08 16-Dec-2014 Anson Huang <b20788@freescale.com>

ARM: imx: support arm power off in cpuidle for i.mx6sx

This patch introduces an independent cpuidle driver for
i.MX6SX, and supports arm power off in idle, totally
3 levels of cpuidle are supported as below:

1. ARM WFI;
2. SOC in WAIT mode;
3. SOC in WAIT mode + ARM power off.

ARM power off can save at least 5mW power.

This patch also replaces imx6q_enable_rbc with imx6_enable_rbc.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>


# df096fde 16-Dec-2014 Anson Huang <b20788@freescale.com>

ARM: imx: remove unnecessary setting for DSM

Now we support DSM in OCRAM for all i.MX6 SoCs,
the resume entry point is set in asm code of
suspend-imx6.S, so no need to set the resume
entry point for SRC in pre-suspend flow.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>


# 65bb688a 02-Dec-2014 Marc Zyngier <maz@kernel.org>

ARM: imx6: fix bogus use of irq_get_irq_data

The imx6 PM code seems to be quite creative in its use of irq_data,
using something that is very much a hardware interrupt number where
we expect a virtual one. Yes, it worked so far, but that's only
luck, and it will definitely explode in 3.19.

Fix it by using a pair of helper functions that deal with the
actual hardware.

Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>


# ec336b28 16-Sep-2014 Anson Huang <b20788@freescale.com>

ARM: imx: replace cpu type check with ddr type check

As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3,
we used cpu type to decide how to do these settings in suspend
before which is NOT flexible, take i.MX6SL for example, although
it has LPDDR2 on EVK board, but users can also use DDR3 on other
boards, so it is better to read the DDR type from MMDC then decide
how to do related settings.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>


# 80c0ecdc 23-Jun-2014 Anson Huang <b20788@freescale.com>

ARM: imx: add standby mode support for suspend

Add standby mode support for suspend, to enter standby mode:

echo standby > /sys/power/state;

Use UART or RTC alarm to wake up system, when system enters
standby mode, SOC will enter STOP mode with ARM core kept
power on and 24M XTAL on.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>


# dfea953a 23-Jun-2014 Anson Huang <b20788@freescale.com>

ARM: imx: mem bit must be cleared before entering DSM mode

According to hardware design, mem bit must be clear before
entering DSM mode, as ARM core will be power gated in DSM mode.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>


# ff843d62 19-Jun-2014 Anson Huang <b20788@freescale.com>

ARM: imx: add suspend support for i.mx6sx

Add suspend support for i.MX6SX.

To enter suspend, echo mem > /sys/power/state.
To exit suspend, using RTC alarm or enable debug UART wakeup.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>


# 9cdde721 27-Feb-2014 Shawn Guo <shawn.guo@linaro.org>

ARM: imx6: rename pm-imx6q.c to pm-imx6.c

The pm-imx6q.c works for all i.MX6 SoCs, so let's rename it to pm-imx6.c
and have the build controlled by option CONFIG_SOC_IMX6.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>