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20d4dcec |
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26-May-2017 |
Uwe Kleine-König <uwe@kleine-koenig.org> |
dts: gpio_atmel: adapt binding doc to reality The second cell in a gpio reference is used to pass GPIO_ACTIVE_LOW or GPIO_ACTIVE_HIGH. The gpio device can also be used as irq controller and a reference can contain the IRQ_TYPE_* values in the second cell. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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fc33ff43 |
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14-Jul-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
arm: at91: at91sam9x5: fix gpio number per bank On the at91sam9x5 SoC series, GPIO banks B and D only have 19 and 22 pins. So add a property to set this parameter. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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582d5fbd |
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20-Jul-2010 |
Nicolas Ferre <nicolas.ferre@microchip.com> |
ARM: at91/pio: add new PIO3 features This patch adds the support for new PIO controller found on some at91sam SOCs. - more peripheral multiplexing - more features to configure on a PIO (pull-down, Schmitt trigger, debouncer) - support for several IRQ triggering features (type and polarity) Support for those new features are retrieved from the device tree compatibility string. Debugfs at91_gpio file is updated to monitor configuration. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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21f81872 |
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11-Feb-2012 |
Nicolas Ferre <nicolas.ferre@microchip.com> |
ARM: at91/gpio: add irqdomain and DT support Add "legacy" type of irqdomain to preserve old-style numbering and allow smooth transition for both DT and non-DT cases. Original idea and code by Jean-Christophe Plagniol-Villard. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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