kernel: Allow reassigning IRQs to logical processors

kernel: Track load produced by interrupt handlers

* Introduce {reserve|allocate|free}_io_interrupt_vectors() that can generically
be used to mark certain io interrupt vectors as reserved and to allocate from
the still free ones. It is a kernel private API for now though.
* Make the MSI code use that functionality instead of implementing its own which
slims it down considerably and also removes quite a bit of hardcoded knowledge
about the interrupt layout that didn't really belong there.
* Mark the various in-use interrupts as reserved from the components that
actually know about them (PIC, IO-APIC, SMP, APIC timer and interrupt setup).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42832 a95241bf-73f2-0310-859d-f6bbb57e9c96

Of course the PIC mask register is a _mask_ and the enabled interrupts are the
ones that aren't masked. This reversed the enabled interrupts and therefore
disabled the already installed ACPI SCI handler and wrongly enabled the other
interrupt pins instead on PIC to IO-APIC handover. Probably fixes #7525.
+r1alpha3


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41685 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Implement interrupt source overrides. We install a relay interrupt handler
at the override entry to trigger the overriden vector so that we don't need
to configure any additional redirections.
* Also configures the polarity and trigger modes found in the override entry.
* When disabling the legacy PIC, retrieve the enabled interrupts and re-enable
then in the IO-APIC. This will for example make the ACPI SCI work that is
installed prior to switching interrupt models. Through the transparent support
for interrupt source overrides it'll also automatically relay from the old to
the new vector.

This should make ACPI interrupts work and should support relocating the ISA PIT
from irq 0 to a different global system interrupt (usually 2) so that it can
still work when IO-APICs are in use.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41528 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move the legacy PIC and the IO-APIC code into their own source file. No
functional change intended.
* Use an appropriately sized sLevelTriggeredInterrupts for each controller type.
This also fixes an out of bound access for IO-APICs with more than 32 entries
and also returns the right mode in such cases.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41426 a95241bf-73f2-0310-859d-f6bbb57e9c96

kernel: Allow reassigning IRQs to logical processors

kernel: Track load produced by interrupt handlers

* Introduce {reserve|allocate|free}_io_interrupt_vectors() that can generically
be used to mark certain io interrupt vectors as reserved and to allocate from
the still free ones. It is a kernel private API for now though.
* Make the MSI code use that functionality instead of implementing its own which
slims it down considerably and also removes quite a bit of hardcoded knowledge
about the interrupt layout that didn't really belong there.
* Mark the various in-use interrupts as reserved from the components that
actually know about them (PIC, IO-APIC, SMP, APIC timer and interrupt setup).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42832 a95241bf-73f2-0310-859d-f6bbb57e9c96

Of course the PIC mask register is a _mask_ and the enabled interrupts are the
ones that aren't masked. This reversed the enabled interrupts and therefore
disabled the already installed ACPI SCI handler and wrongly enabled the other
interrupt pins instead on PIC to IO-APIC handover. Probably fixes #7525.
+r1alpha3


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41685 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Implement interrupt source overrides. We install a relay interrupt handler
at the override entry to trigger the overriden vector so that we don't need
to configure any additional redirections.
* Also configures the polarity and trigger modes found in the override entry.
* When disabling the legacy PIC, retrieve the enabled interrupts and re-enable
then in the IO-APIC. This will for example make the ACPI SCI work that is
installed prior to switching interrupt models. Through the transparent support
for interrupt source overrides it'll also automatically relay from the old to
the new vector.

This should make ACPI interrupts work and should support relocating the ISA PIT
from irq 0 to a different global system interrupt (usually 2) so that it can
still work when IO-APICs are in use.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41528 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move the legacy PIC and the IO-APIC code into their own source file. No
functional change intended.
* Use an appropriately sized sLevelTriggeredInterrupts for each controller type.
This also fixes an out of bound access for IO-APICs with more than 32 entries
and also returns the right mode in such cases.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41426 a95241bf-73f2-0310-859d-f6bbb57e9c96