arch/x86: Fix sending ICIs to more than one cluster, send one at a time.

The structure of a logical APIC destination is made up of a 16-bit
bitfield of cluster-local IDs, as well as a 16-bit cluster ID. When
sending an ICI to multiple cores in different clusters, these cannot simply be ORed together.
Fixes #17233

Change-Id: Ifa84da51eccd85c1eff529749ffa00bc2159899e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/6919
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

kernel/x86: Inline atomic functions and memory barriers

x86: Fix build with kernel debugging disabled

x86: Implement multicast ICIs

apps, kernel: Remove B_MAX_CPU_COUNT

kernel: Use SMP_MAX_CPUS instead of B_MAX_CPU_COUNT

kernel: Allow reassigning IRQs to logical processors

kernel: Track load produced by interrupt handlers

Added x2APIC support.

* Mostly useful for virtualization at the moment. Works in QEmu.
* Can be enabled by safemode settings/menu.
* Please note that x2APIC normally requires use of VT-d interrupt remapping feature
on real hardware, which we don't support yet.

Support for SMP on x86_64.

No major changes to the kernel: just compiled in arch_smp.cpp and fixed the
IDT load in arch_cpu_init_percpu to use the correct limit for x86_64 (uses
sizeof(interrupt_descriptor)). In the boot loader, changed smp_boot_other_cpus
to construct a temporary GDT and get the page directory address from CR3, as
what's in kernel_args will be 64-bit stuff and will not work to switch the
CPUs into 32-bit mode in the trampoline code. Refactored 64-bit kernel entry
code to not use the stack after disabling paging, as the secondary CPUs are
given a 32-bit virtual stack address by the SMP trampoline code which will
no longer work.

Renamed remaining i386_* functions to x86_* for consistency.

kernel: Fix fpu on non-apic systems

* If apic is not present, the smp code never gets called
to set up the fpu.
* Detect lack of apic, and set up fpu in arch_cpu.
* Should fix #8346 and #8348

kernel: x86 SSE improvements

* Prepend x86_ to non-static x86 code
* Add x86_init_fpu function to kernel header
* Don't init fpu multiple times on smp systems
* Verified fpu is still started on smp and non-smp
* SSE code still generates general protection faults
on smp systems though

kernel: Fix FPU SSE + MMX instruction usage.

* Rename init_sse to init_fpu and handle FPU setup.
* Stop trying to set up FPU before VM init.
We tried to set up the FPU before VM init, then
set it up again after VM init with SSE extensions,
this caused SSE and MMX applications to crash.
* Be more logical in FPU setup by detecting CPU flag prior
to enabling FPU. (it's unlikely Haiku will run on
a processor without a fpu... but lets be consistant)
* SSE2 gcc code now runs (faster even) without GPF
* tqh confirms his previously crashing mmx code now works
* The non-SSE FPU enable after VM init needs tested!

* Introduce {reserve|allocate|free}_io_interrupt_vectors() that can generically
be used to mark certain io interrupt vectors as reserved and to allocate from
the still free ones. It is a kernel private API for now though.
* Make the MSI code use that functionality instead of implementing its own which
slims it down considerably and also removes quite a bit of hardcoded knowledge
about the interrupt layout that didn't really belong there.
* Mark the various in-use interrupts as reserved from the components that
actually know about them (PIC, IO-APIC, SMP, APIC timer and interrupt setup).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42832 a95241bf-73f2-0310-859d-f6bbb57e9c96

SMP: remove the tracking of apic id -> cpu id. Don't pass between bootloader and kernel.

Kernel doesn't use it, and it could be regenerated in the kernel if it did need it.

This also unlocks the apic range the bios can use. Previously the apic ids would have
to fit within 0..MAX_CPUS or it'd reject the cpu. Some boxes (mine in particular)
seem to sparsely populate the apic id so that the range is pretty large.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37108 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add code to allocate and free interrupt vectors for message signaled
interrupts (MSI).
* Add the remaining IDT entries and redirection functions in the interrupt code.
* Make the PIC end_of_interrupt() return a result to indicate whether the vector
was handled by this PIC. If it isn't we now issue a apic_end_of_interrupt()
in the assumption of apic local interrupt, MSI or IPI. This also removes
the need for the gUsingIOAPIC global and doing manual apic_end_of_interrupt()
calls in the SMP and timer code.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36221 a95241bf-73f2-0310-859d-f6bbb57e9c96

Seperate the generic (local) APIC stuff into it's own file and use it from the
other places where previously the same functionality was duplicated. Also
seperated the header which was originally arch_smp.h into apic.h and arch_smp.h
again as some of it is MP and not actually APIC.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36182 a95241bf-73f2-0310-859d-f6bbb57e9c96

Move the code which checks for disabled apic earlier (in the boot loader).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35741 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Moved the VM headers into subdirectory vm/.
* Renamed vm_cache.h/vm_address_space.h to VMCache.h/VMAddressSpace.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34449 a95241bf-73f2-0310-859d-f6bbb57e9c96

*.c -> *.cpp


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34417 a95241bf-73f2-0310-859d-f6bbb57e9c96

kernel/x86: Inline atomic functions and memory barriers

x86: Fix build with kernel debugging disabled

x86: Implement multicast ICIs

apps, kernel: Remove B_MAX_CPU_COUNT

kernel: Use SMP_MAX_CPUS instead of B_MAX_CPU_COUNT

kernel: Allow reassigning IRQs to logical processors

kernel: Track load produced by interrupt handlers

Added x2APIC support.

* Mostly useful for virtualization at the moment. Works in QEmu.
* Can be enabled by safemode settings/menu.
* Please note that x2APIC normally requires use of VT-d interrupt remapping feature
on real hardware, which we don't support yet.

Support for SMP on x86_64.

No major changes to the kernel: just compiled in arch_smp.cpp and fixed the
IDT load in arch_cpu_init_percpu to use the correct limit for x86_64 (uses
sizeof(interrupt_descriptor)). In the boot loader, changed smp_boot_other_cpus
to construct a temporary GDT and get the page directory address from CR3, as
what's in kernel_args will be 64-bit stuff and will not work to switch the
CPUs into 32-bit mode in the trampoline code. Refactored 64-bit kernel entry
code to not use the stack after disabling paging, as the secondary CPUs are
given a 32-bit virtual stack address by the SMP trampoline code which will
no longer work.

Renamed remaining i386_* functions to x86_* for consistency.

kernel: Fix fpu on non-apic systems

* If apic is not present, the smp code never gets called
to set up the fpu.
* Detect lack of apic, and set up fpu in arch_cpu.
* Should fix #8346 and #8348

kernel: x86 SSE improvements

* Prepend x86_ to non-static x86 code
* Add x86_init_fpu function to kernel header
* Don't init fpu multiple times on smp systems
* Verified fpu is still started on smp and non-smp
* SSE code still generates general protection faults
on smp systems though

kernel: Fix FPU SSE + MMX instruction usage.

* Rename init_sse to init_fpu and handle FPU setup.
* Stop trying to set up FPU before VM init.
We tried to set up the FPU before VM init, then
set it up again after VM init with SSE extensions,
this caused SSE and MMX applications to crash.
* Be more logical in FPU setup by detecting CPU flag prior
to enabling FPU. (it's unlikely Haiku will run on
a processor without a fpu... but lets be consistant)
* SSE2 gcc code now runs (faster even) without GPF
* tqh confirms his previously crashing mmx code now works
* The non-SSE FPU enable after VM init needs tested!

* Introduce {reserve|allocate|free}_io_interrupt_vectors() that can generically
be used to mark certain io interrupt vectors as reserved and to allocate from
the still free ones. It is a kernel private API for now though.
* Make the MSI code use that functionality instead of implementing its own which
slims it down considerably and also removes quite a bit of hardcoded knowledge
about the interrupt layout that didn't really belong there.
* Mark the various in-use interrupts as reserved from the components that
actually know about them (PIC, IO-APIC, SMP, APIC timer and interrupt setup).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42832 a95241bf-73f2-0310-859d-f6bbb57e9c96

SMP: remove the tracking of apic id -> cpu id. Don't pass between bootloader and kernel.

Kernel doesn't use it, and it could be regenerated in the kernel if it did need it.

This also unlocks the apic range the bios can use. Previously the apic ids would have
to fit within 0..MAX_CPUS or it'd reject the cpu. Some boxes (mine in particular)
seem to sparsely populate the apic id so that the range is pretty large.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37108 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add code to allocate and free interrupt vectors for message signaled
interrupts (MSI).
* Add the remaining IDT entries and redirection functions in the interrupt code.
* Make the PIC end_of_interrupt() return a result to indicate whether the vector
was handled by this PIC. If it isn't we now issue a apic_end_of_interrupt()
in the assumption of apic local interrupt, MSI or IPI. This also removes
the need for the gUsingIOAPIC global and doing manual apic_end_of_interrupt()
calls in the SMP and timer code.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36221 a95241bf-73f2-0310-859d-f6bbb57e9c96

Seperate the generic (local) APIC stuff into it's own file and use it from the
other places where previously the same functionality was duplicated. Also
seperated the header which was originally arch_smp.h into apic.h and arch_smp.h
again as some of it is MP and not actually APIC.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36182 a95241bf-73f2-0310-859d-f6bbb57e9c96

Move the code which checks for disabled apic earlier (in the boot loader).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35741 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Moved the VM headers into subdirectory vm/.
* Renamed vm_cache.h/vm_address_space.h to VMCache.h/VMAddressSpace.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34449 a95241bf-73f2-0310-859d-f6bbb57e9c96

*.c -> *.cpp


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34417 a95241bf-73f2-0310-859d-f6bbb57e9c96