kernel/x86_64: on context switch, load defaults in fpu control and mxcsr

after a0131eaae2884fdced27158c3d34732d1656aca9 mxcsr was possibly also incorrect.
fpu control and mxcsr will be restored with fxrstor/xrstor.
no need to clear pending exceptions on #MF
fix #18656 (and #18624 after reverting).

Change-Id: I7dd5e2e4610747c5b82abd6c67e302d264b4be92
Reviewed-on: https://review.haiku-os.org/c/haiku/+/7104
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>

kernel/x86: add ability to set GS segment base from userland

Needed for Wine.

Co-authored-by: Jérôme Duval <jerome.duval@gmail.com>

Change-Id: I13f6a5802fce04fd2ebb4cc01ecd2f12c90830db
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4839
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

kernel/x86: set initial user thread IOPL to zero

User threads aren't supposed to be able to adjust the interrupt flag (IF). A few
apps for instance DOSBox would just use the popf instruction and disable the
flag, expecting the change to be ignored.

Quote from the Intel manual:
"The interrupt flag (IF) is altered only when executing at a level at least as
privileged as the IOPL. If a POPF/POPFD instruction is executed with
insufficient privilege, an exception does not occur, but the privileged bits
do not change."

fix #14711

Change-Id: I0519312c1151a1dd76541f60283c6c210a5b21a6
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4046
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

kernel/x86: disable trap and direction flag on signal handler entry

https://github.com/freebsd/freebsd-src/commit/846ac2266b625d13ce6d1fc9370c3c3cc2a960bb
https://github.com/freebsd/freebsd-src/commit/22eca0bf45fa506e27a58007cfc70f08ce4f3538
Change-Id: I19620d15372572ce4498d9145fd6b0df50f91bb9
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4043
Reviewed-by: X512 <danger_mail@list.ru>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

kernel/x86_64: use standard xstate length

for sse/avx when found invalid

Change-Id: I1c93e5dd8de80bf155eabb55c77119349a7186ab
Reviewed-on: https://review.haiku-os.org/c/haiku/+/3372
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>

better error message when xsave context is too small

kernel/x86_64: AVX support

xsave or xsavec are supported.
breaks vregs compatibility.
change the thread structure object cache alignment to 64
the xsave fpu_state size isn't defined, it is for instance 832 here, thus I picked 1024.

Change-Id: I4a0cab0bc42c1d37f24dcafb8259f8ff24a330d2
Reviewed-on: https://review.haiku-os.org/c/haiku/+/2849
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

Revert the rest of the COMPAT_MODE changes (back to hrev52003.)

This reverts commit 458e758f3792ef11ca26d6ff7e24600c88326e83.
This reverts commit ce5eb94a82b1b377ef5909e65411e031f54ceb15.
This reverts commit aac8d4c317ca11a9a6e194e2c668e8183ec23dd6.
This reverts commit c70cba914aa79c01bbc2da38085936f589899c8c.
This reverts commit 2ffbe7aaca8668c5a68ac7488459bace7a0700f2
This reverts commit c6e120e2d2f909d95f95839fa99fccf811fdb3c5.

Revert team and thread changes for COMPAT_MODE (hrev52010 & hrev52011).

This reverts commit c558f9c8fe54bc14515aa62bac7826271289f0e4.
This reverts commit 44f24718b1505e8d9c75e00e59f2f471a79b5f56.
This reverts commit a69cb330301c4d697daae57e6019a307f285043e.
This reverts commit 951182620e297d10af7fdcfe32f2b04d56086ae9.

There have been multiple reports that these changes break mounting NTFS partitions
(on all systems, see #14204), and shutting down (on certain systems, see #12405.)
Until they can be fixed, they are being backed out.

kernel/x86_64: setup a new thread in compatibility mode.

* define compat_thread_info, compat_rlim_t, compat_rlimit and
compat_thread_creation_attributes to be used when applicable in compatibility
mode.
* handle 32-bit types in _user_spawn_thread(), _user_get_thread_info(),
_user_get_next_thread_info(), _user_getrlimit(), _user_setrlimit(),
other syscalls are compatible as is.
* init TLS for compatibility mode threads.

Change-Id: I483ba95e6198ddac9d240671bcb56fcd2ad831d2

kernel/x86_64: add setup_compat_signal_frame.

* add compatibility signal types.

Change-Id: I665020234be0ba2ccbb33bdbc338c11a214ab6e8

kernel: support for Intel SMAP and SMEP on x86_64.

SMAP will generated page faults when the kernel tries to access user pages unless overriden.
If SMAP is enabled, the override instructions are written where needed in memory with
binary "altcodepatches".
Support is enabled by default, might be disabled per safemode setting.

Change-Id: Ife26cd765056aeaf65b2ffa3cadd0dcf4e273a96

Fix initial stack alignment on 64-bit systems.

gcc does re-align the stack in the main() function prologue, however,
we still need to set the right alignment for other cases: thread entry,
.init and .fini code that is executed before main() is called or after
it has returned, and signal handlers which may use a separate stack.

Part of #10509

kernel/x86_64: save fpu state at interrupts

The kernel is allowed to use fpu anywhere so we must make sure that
user state is not clobbered by saving fpu state at interrupt entry.
There is no need to do that in case of system calls since all fpu
data registers are caller saved.

We do not need, though, to save the whole fpu state at task swich
(again, thanks to calling convention). Only status and control
registers are preserved. This patch actually adds xmm0-15 register
to clobber list of task swich code, but the only reason of that is
to make sure that nothing bad happens inside the function that
executes that task swich. Inspection of the generated code shows
that no xmm registers are actually saved.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: use C++11 style static assert

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: improve context switch implementation

The goal of this patch is to amortize the cost of context switch by making
the compiler aware that context switch clobbers all registers. Because all
register need to be saved anyway there is no additional cost of using
callee saved register in the function that does the context switch.

x86: Let each CPU have its own GDT

x86[_64]: Randomize initial stack pointer on alternative signal stacks

If the alternate signal stack is used randomize the initial stack
pointer in the same way it is randomized on "normal" thread stacks.
Also, update MINSIGSTKSZ value so that regardless of where the new
stack pointer points to there is at least 4k of stack left.

arch: use PRNGs from kernel utils for initializing stack pointer

commpage: randomize position of commpage

This patch introduces randomization of commpage position. From now on commpage
table contains offsets from begining to of the commpage to the particular
commpage entry. Similary addresses of symbols in ELF memory image "commpage"
are just offsets from the begining of the commpage.

This patch also updates KDL so that commpage entries are recognized and shown
correctly in stack trace. An update of Debugger is yet to be done.

x86: move x86_userspace_thread_exit() from user stack to commpage

x86_userspace_thread_exit() is a stub originally placed at the bottom of
each thread user stack that ensures any thread invokes exit_thread() upon
returning from its main higher level function.

Putting anything that is expected to be executed on a stack causes problems
when implementing data execution prevention. Code of x86_userspace_thread_exit()
is now moved to commpage which seems to be much more appropriate place for it.

arch: randomize initial user stack pointer

Inside the page randomization of initial user stack pointer is not only a part
of ASLR implementation but also a performance improvement that helps
eliminating aligned 64 kB data access.

Minimal user stack size is increased to 8 kB in order to ensure that regardless
of initial stack pointer value there is still enough space on stack.

System call restart support.

Implemented signals for x86_64.

Implemented TLS for x86_64.

Finished system call handler.

The interrupt and system call handlers now perform all the necessary
kernel entry/exit work, and the system call handler now handles calls
with more than 6 arguments. Debugging and system call tracing hooks
are not yet called, will be added when user debugging gets implemented.

Initial userland support for x86_64.

Userland switch is implemented, as is basic system call support (using
SYSCALL/SYSRET). The system call handler is not yet complete: it doesn't
handle more than 6 arguments, and does not perform all the necessary kernel
entry/exit work (neither does the interrupt handler). However, this is
sufficient for runtime_loader to start and print some debug output.

Implemented threading for x86_64.

* Thread creation and switching is working fine, however threads do not yet
get interrupted because I've not implemented hardware interrupt handling
yet (I'll do that next).
* I've made some changes to struct iframe: I've removed the e/r prefixes
from the member names for both 32/64, so now they're just named ip, ax,
bp, etc. This makes it easier to write code that works with both 32/64
without having to deal with different iframe member names.

kernel/x86_64: save fpu state at interrupts

The kernel is allowed to use fpu anywhere so we must make sure that
user state is not clobbered by saving fpu state at interrupt entry.
There is no need to do that in case of system calls since all fpu
data registers are caller saved.

We do not need, though, to save the whole fpu state at task swich
(again, thanks to calling convention). Only status and control
registers are preserved. This patch actually adds xmm0-15 register
to clobber list of task swich code, but the only reason of that is
to make sure that nothing bad happens inside the function that
executes that task swich. Inspection of the generated code shows
that no xmm registers are actually saved.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: use C++11 style static assert

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: improve context switch implementation

The goal of this patch is to amortize the cost of context switch by making
the compiler aware that context switch clobbers all registers. Because all
register need to be saved anyway there is no additional cost of using
callee saved register in the function that does the context switch.

x86: Let each CPU have its own GDT

x86[_64]: Randomize initial stack pointer on alternative signal stacks

If the alternate signal stack is used randomize the initial stack
pointer in the same way it is randomized on "normal" thread stacks.
Also, update MINSIGSTKSZ value so that regardless of where the new
stack pointer points to there is at least 4k of stack left.

arch: use PRNGs from kernel utils for initializing stack pointer

commpage: randomize position of commpage

This patch introduces randomization of commpage position. From now on commpage
table contains offsets from begining to of the commpage to the particular
commpage entry. Similary addresses of symbols in ELF memory image "commpage"
are just offsets from the begining of the commpage.

This patch also updates KDL so that commpage entries are recognized and shown
correctly in stack trace. An update of Debugger is yet to be done.

x86: move x86_userspace_thread_exit() from user stack to commpage

x86_userspace_thread_exit() is a stub originally placed at the bottom of
each thread user stack that ensures any thread invokes exit_thread() upon
returning from its main higher level function.

Putting anything that is expected to be executed on a stack causes problems
when implementing data execution prevention. Code of x86_userspace_thread_exit()
is now moved to commpage which seems to be much more appropriate place for it.

arch: randomize initial user stack pointer

Inside the page randomization of initial user stack pointer is not only a part
of ASLR implementation but also a performance improvement that helps
eliminating aligned 64 kB data access.

Minimal user stack size is increased to 8 kB in order to ensure that regardless
of initial stack pointer value there is still enough space on stack.

System call restart support.

Implemented signals for x86_64.

Implemented TLS for x86_64.

Finished system call handler.

The interrupt and system call handlers now perform all the necessary
kernel entry/exit work, and the system call handler now handles calls
with more than 6 arguments. Debugging and system call tracing hooks
are not yet called, will be added when user debugging gets implemented.

Initial userland support for x86_64.

Userland switch is implemented, as is basic system call support (using
SYSCALL/SYSRET). The system call handler is not yet complete: it doesn't
handle more than 6 arguments, and does not perform all the necessary kernel
entry/exit work (neither does the interrupt handler). However, this is
sufficient for runtime_loader to start and print some debug output.

Implemented threading for x86_64.

* Thread creation and switching is working fine, however threads do not yet
get interrupted because I've not implemented hardware interrupt handling
yet (I'll do that next).
* I've made some changes to struct iframe: I've removed the e/r prefixes
from the member names for both 32/64, so now they're just named ip, ax,
bp, etc. This makes it easier to write code that works with both 32/64
without having to deal with different iframe member names.