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ddb1ff55 |
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01-Jan-2019 |
Michael Lotz <mmlr@mlotz.ch> |
kernel/x86_64: Fix overwriting the GDT/IDT by each CPU. The constructor calls for GlobalDescriptorTable and InterruptDescriptorTable were run on each CPU, each time clearing out any changes already done on other CPUs. For the IDT this didn't matter as the result would always be the same. In case of the GDT the result would surprisingly be mostly hidden. The used GDT entries are for the double fault stacks (which is rarely hit), the user TLS (which will only be used in compat mode) and the TSS which is immediately cached in the task register. The clearing of the GDT allowed for a tiny window of time between setting up the entry for the TSS and it actually being loaded (and cached) in the task register. When this happened, the load of the TR caused a not present fault, which at this point leads to a tripple fault and reset due to no fault handlers being installed yet. Fixes #14659. Change-Id: I6e5c00d412ab17c3ef05740ba71228e6ca266c1e Reviewed-on: https://review.haiku-os.org/810 Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
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22ca923f |
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01-Jan-2019 |
Michael Lotz <mmlr@mlotz.ch> |
kernel/x86_64: Fix descriptor index off-by-one in assert. This was apparently copied from GlobalDescriptorTable::SetTSS() which needs two table entries and therefore checks for index + 1. For the SetUserTLS case this isn't needed and would cause aborts when reaching the maximum CPU count (64 currently). Change-Id: I27bd777fedadbd3740ac8c791199ec9300b06327 Reviewed-on: https://review.haiku-os.org/809 Reviewed-by: waddlesplash <waddlesplash@gmail.com>
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9ac30627 |
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18-Jun-2018 |
Augustin Cavalier <waddlesplash@gmail.com> |
kernel: Small fixes for Clang.
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27b32ee0 |
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03-May-2018 |
Jérôme Duval <jerome.duval@gmail.com> |
kernel/x86_64: adjust descriptors tables for compatibility mode. * also adjust BOOT_GDT_SEGMENT_COUNT for x86, the definition is used by the boot loader. * add some 32-bit definitions. * add a UserTLSDescriptor class, this will be used by 32-bit threads. Change-Id: I5b1d978969a1ce97091a16c9ec2ad7c0ca831656
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bec80c1c |
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10-Feb-2018 |
Jérôme Duval <jerome.duval@gmail.com> |
white space cleanup
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17698139 |
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02-Nov-2017 |
jua <jua@terra.sol> |
x86-64: handle stack fault for non-canonical address access * With the amd64 architecture, the stack fault exception got a new meaning: it is raised when an instruction tries to access a non-canonical address, and the stack is referenced in the instruction (e.g. by its addressing mode). So unlike on x86, this is not a fatal exception and shouldn't trigger a KDL -- instead, it is to be treated like a general protection fault, terminating the team which caused it. * Fixes #13744
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9db5b975 |
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06-May-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
kernel/x86_64: rework of IDT handling code Similarly to previous patch regarding GDT this is mostly a rewrite of IDT handling code from C to C++. Thanks to constexpr IDT is now entirely generated at compile-time.
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cd59bf43 |
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05-May-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
kernel/x86_64: x86_64 gdt handling code overhaul Virtually no functional change, just rewriting the code from "C in *.cpp files" to C++. Use of constexpr may be advantageous but that code is not performance critical anyway.
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5df1ecb2 |
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07-Mar-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
x86_64: Relax ltr operand constraint Any 16 bit general puprose register can be a ltr operand, no need to force AX.
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527da4ca |
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27-Jan-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
x86[_64]: Separate bootloader and kernel GDT and IDT logic From now on bootloader sets up its own minimal valid GDT and IDT. Then the kernel replaces them with its own tables.
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611376fe |
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16-Dec-2013 |
Pawel Dziepak <pdziepak@quarnos.org> |
x86: Let each CPU have its own GDT
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d2a1be1c |
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18-Aug-2012 |
Alex Smith <alex@alex-smith.me.uk> |
Cleaner separation of 32-/64-bit specific CPU/interrupt code. Renamed {32,64}/int.cpp to {32,64}/descriptors.cpp, which now contain functions for GDT and TSS setup that were previously in arch_cpu.cpp, as well as the IDT setup code. These get called from the init functions in arch_cpu.cpp, rather than having a bunch of ifdef'd chunks of code for 32/64.
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9db5b975f9ea2b942568eb57bbcce90a1c7420dc |
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06-May-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
kernel/x86_64: rework of IDT handling code Similarly to previous patch regarding GDT this is mostly a rewrite of IDT handling code from C to C++. Thanks to constexpr IDT is now entirely generated at compile-time.
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cd59bf434970a082f1bfbb79fc83e4c93b00bc31 |
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05-May-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
kernel/x86_64: x86_64 gdt handling code overhaul Virtually no functional change, just rewriting the code from "C in *.cpp files" to C++. Use of constexpr may be advantageous but that code is not performance critical anyway.
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5df1ecb2ab7a05b4f88efd579d5b2255729c3a6d |
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07-Mar-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
x86_64: Relax ltr operand constraint Any 16 bit general puprose register can be a ltr operand, no need to force AX.
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#
527da4ca8a4c008b58da456c01a49dcf16a98fbc |
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27-Jan-2014 |
Pawel Dziepak <pdziepak@quarnos.org> |
x86[_64]: Separate bootloader and kernel GDT and IDT logic From now on bootloader sets up its own minimal valid GDT and IDT. Then the kernel replaces them with its own tables.
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#
611376fef7e00967fb65342802ba668a807348d5 |
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16-Dec-2013 |
Pawel Dziepak <pdziepak@quarnos.org> |
x86: Let each CPU have its own GDT
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d2a1be1c4e4a8ae3879d7f59b07a6924c62b4b14 |
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18-Aug-2012 |
Alex Smith <alex@alex-smith.me.uk> |
Cleaner separation of 32-/64-bit specific CPU/interrupt code. Renamed {32,64}/int.cpp to {32,64}/descriptors.cpp, which now contain functions for GDT and TSS setup that were previously in arch_cpu.cpp, as well as the IDT setup code. These get called from the init functions in arch_cpu.cpp, rather than having a bunch of ifdef'd chunks of code for 32/64.
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