kernel/int: consolidate interrupt vector number to `int32`

This is no-op for 32 bit platforms because `int32` is defined as `long` there.

Change interrupt vector number from 64 bits to 32 bits for 64 bit platforms.

Change-Id: I52d1ad616cab16488804e9733c7afaf772a670ba
Reviewed-on: https://review.haiku-os.org/c/haiku/+/7507
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>

kernel/arm: reserve interrupts for GICv2

This works similarly on the 32-bit and 64-bit ARM port.

Other architectures call reserve_io_interrupt_vectors() when
initializing the interrupt controller (e.g. PIC, APIC etc.)
so let's do the same on ARM.

Change-Id: If5a360cf23fd01d97d2f20702785bc5da0190052
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5566
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>

arm: move SPI interrupt offset calculation to FDT code

Most common values for interrupt-cells are 1 or 2.
- one cell: the single cell defines the index of the interrupt
within the controller.
- two cells: the first cell defines the index of the interrupt
within the controller, while the second cell is specifies
interrupt flags like active-high/active-low, edge triggered
or level-sensitive.

ARM Generic Interrupt Controller uses 3 cells:
- the 1st cell is the interrupt type: 0 for SPI, 1 for PPI
- the 2nd cell contains the interrupt number
- the 3rd cell contains interrupt flags, similarly to the 2-cell format

SPI interrupts are numbered from 0 in the device tree but
they start from 32 on the GIC so an offset should be applied.

On the other hand, ACPI tables contain interrupt numbers
as they are expected by the GIC so no offset should be applied
when interrupts are read from ACPI.

see:
https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/arm%2Cgic.txt
https://developer.arm.com/documentation/198123/0301/Arm-CoreLink-GIC-fundamentals

Change-Id: Ia41371bd965347f89c17d62e391480d7b2083bae
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5490
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@pulkomandy.tk>

kernel/arch/arm/int: add initialization code for GICv2

Change-Id: I4f98a4e0277ce37e758cabbb04806cf13f351f1e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4674
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>