radeon_hd/pll: Guard bpc on non-HDMI under table 1.5,1.6

* Cut extra calls to display_get_encoder_mode
* Correct incorrect ucMiscInfo on table 1.6 via atombios
comments

Change-Id: Ib6d7938269b8421d3711c1344eab0b9842336932

radeon_hd/pll: Fix pll MiscInfo on table 1.5

* Looks like some error in atombios. AMD just
reversed the values instead of fixing the atom.h
defines in Linux.

Change-Id: I440682af5708ce0da1625e8f50e8cb77595c8397

radeon_hd: Improve external/dce PLL programming

* Bug fix around pll_external_set. We prepared all the args,
but never actually executed the AtomBIOS table.
* Add new AtomBIOS methods in Polaris to set external PLL
clock frequencies.
* Implement new 1.7 PLL set table on Polaris.

radeon_hd: Move to a unified dp aux transaction function.

* Leverage a single common dp aux message struct.
* Likely lots of obvious bugs that need fixed still.
* Untested.

radeon_hd: ss_probe reads the pixel clock; set before calling.

* CID 743876

radeon_hd: Fix Spread Spectrum clock decimal place

* As 104Mhz is stores as 10400 on atombios,
and 104000 everywhere else... this conversion
was going the wrong direction.
* Shrink the stored value to 10Khz units to properly
compare to the AtomBIOS value

radeon_hd: Fix comment typo, no functional change

radeon_hd: Rework PLL picking code

* Rewrote to be more efficient and more accurate.
* Fix a DP bug where we didn't choose the correct
external PLL.

radeon_hd: Improve pll probing. Let probe calls enable ss

radeon_hd: Finish spread spectrum support

* This needs testing and is to remain disabled
until we can test on several radeon_hd cards
from multiple families

radeon_hd: Don't squash ss status_t into bool

Oops, remove leftover "TODO" in comment

Make code a bit easier to read, add some comments

* No functional change intended

Fix feedback divider value approximation

* The rounding algorithm here expects to start with the 2 digits
after the decimal point in pll->feedbackDivFrac. Multiplying with
1000 instead of 100 filled it with 3 digits.
The last step then set the fractional part to zero because it was
still too large.

radeon_hd: clean up clock units

* Ensure we store all clock units as khz or
n * 10 off from AtomBIOS unit expected
* Perform DDC setup of external encoder

radeon_hd: clean up encoder object

* Encoder flags were 1:1 connector flags...
just look at connector flags.
* Record encoder capabilities
* Add function to check for dp 1.2 support

radeon_hd: Fix DisplayPort link training

* Original changes by Bill Randle
* Includes a large number of modifications
and cleanups.
* Add a "currentMode" to the gDisplay to
enable easier checking of intended changes.
(we pass the display_mode around quite a
bit, adding a "currentMode" allows code
to know the intended display mode being set
without passing the mode pointer around as
much)

radeon_hd: Become Spread Spectrum aware

* Enable Spread Spectrum when requested
* Tested working across several cards, does
have regression potential though.

radeon_hd: slight adjustment to PLL choosing on DP

radeon_hd: re-rework some pll code

* Grab pseudo pll SS info for early
Spread Spectrum access
* display_crtc_ss now takes a pll vs
a display for easy pll access

radeon_hd: rework some pll code

* Force fractional feedback divider on APU's
* Spread Spectrum is now probed more correctly
across multiple encoders and cards
* SS still disabled however.

radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)

radeon_hd: pick a PLL based on connector

* was static PLL 1

radeon_hd: display port improvements

* Remove non-generic radeon dp_get_lane_count
* Set lane count and link rate at set_display_mode
* Pass entire mode to pll_set vs only pixel clock for DP code
* Add helpers for DP config data to common code
* Obtain more correct link rate

radeon_hd: Fix pll DisplayPort endian bug.

radeon_hd: Fix DCE version check

* Trace cleanup
* Minimal change

radeon_hd: Add spread spectrum control functions

* Store SS information with PLL
* Probe SS information for PLL
* Disable SS more correctly
* May resolve mode setting issues on newer cards

radeon_hd: Fix AtomBIOS provided reference divider

* When AtomBIOS provides a reference divider, we should
still attempt to perform calculations using it vs
returning.

radeon_hd: Fix bugs in external DP bridge code

* non-external encoder will never be a DP bridge.
* use external encoder in places where needed.
* ensure we look at proper encoder for isDPBridge.

Revert "radeon_hd: Convert encoders to pointers"

This reverts commit 5a1f9f0f16b2a4bef89b61b4e3e24bf0b53917da.

* Thinking on this a bit more, this is really a silly change as
I know the upper limit for number of valid encoders.
* Resolves a app_server crash introduced as well due to not
allocating encoder pointer.

radeon_hd: Convert encoders to pointers

* Preparation for multiple encoders per connector

radeon_hd: Improve pll DP bridge code

* Only set DP bridge on DP bridge.
* Add a bit of tracing

Complete code for DIG transmitter control

* Record external clock frequency (aka, DP non-pll)
* Add function to control DIG transmitter
* Cleanup duplicated is external code in encoder mode set

Working towards DP connector support

* Lots of new DisplayPort functions
* Call DP link training during mode set
* Rename dp_info variables to be less redundant
* Make encoder_pick_dig accept connector ID and
then check parent display
* Encode/Decode DP link speed functions
* Calculate DP lanes
* Rewrite encoder_dig_setup
* Correct bitsPerChannel to bitsPerColor
* My TRAVIS DisplayPort -> LVDS bridge now works

Introduce new displayport source file

* Move existing displayport functions to new source file
* Move was done due to large amount of DP code
* Style fixes
* Stub out new DP link training function

Cleanup. Move unions into functions that use them.

* Rename unions to match style guide lines
* Group things that make sense together
* Move AtomBIOS argument struct creation closer to what uses it

Pointer style cleanup; Variable consolidation

Include file style cleanup, no functional change

Use bridge encoder flag vs making direct calls to check

Bug fix in drm driver, set EncoderID properly on pll_adjust

Improve pll calculations dealing with DisplayPort devices

* rename encoder_isexternal to encoder_is_external
* add encoder_is_dp_bridge call for special DP cases
* add initial get_dp_link_clock, hard code a guess for now
* take external DP encoders into consideration when making
pixel clock adjustments

* style cleanup of shared storage names
* return better data on card
* display chipset flags in screen preflet


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43226 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add lots of missing evergreen defines
* evergreen headers are split due to different
header copyrights
* detect and set up evergreen memory controler
* change the way we manage radeon chipsets to
more closely match drm driver as the chipset
model numbers aren't in order and change from
numbers to names.
* check for evergreen when populating frame buffer
information.
* style cleanup


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43225 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reorganize register definitions
There were a large number if incorrect, duplicated, misplaced
registers that were leading to bugs in the code. This is my first
shot at cleaning them up. Luckly as we are using AtomBIOS the number
of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96

* stub out dig encoder setup
* adjust pll post divider calculation
* fix digital encoder setup action
* don't run memreq on DCE < 3, should solve
some AtomBIOS failure loops


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42892 a95241bf-73f2-0310-859d-f6bbb57e9c96

* fix minimum pll out units
* sort files in Jamfile
* add TV and compontent video support in encoder code
* fix missing var in display detection code


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42878 a95241bf-73f2-0310-859d-f6bbb57e9c96

* fix pll limitations probing
* radeon HD mode setting on analog monitors is now working!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42877 a95241bf-73f2-0310-859d-f6bbb57e9c96

* redo 42874 in the right direction
* fix a order of operations bug
* fix a few long lines
* pll computation should now be correct


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42876 a95241bf-73f2-0310-859d-f6bbb57e9c96

* increase tolerance checking as we store kHz vs 10kHz units


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42874 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add varying PLL calculations as directed by AtomBIOS
* don't set referenceDivider as minimum unless directed to by
AtomBIOS


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42873 a95241bf-73f2-0310-859d-f6bbb57e9c96

* fix TODO style due to ML
* rename bpc to bitsPerChannel
* remove un-needed / unused PCI BAR reference
* no functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42861 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add function to make pll flag adjustments
* bug fix of improper unit conversion


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42858 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add function to probe pll timing limits from AtomBIOS
* rename *_* pll vars to match style guidelines
* refactor PLL calculation to be easier to read with
more central 10kHz unit conversions
* limited mode switching has been seen working including
a perfect 1280x1024@75


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42855 a95241bf-73f2-0310-859d-f6bbb57e9c96

* tweaks to pll calculation reference units.. make divisors match 10 kHz unit


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42854 a95241bf-73f2-0310-859d-f6bbb57e9c96

* first shot at fixing pll calculations
AtomBIOS wants number of 10Khz Units
* better debugging after modeset on current
CRTC status


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42853 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes
move quite a bit of code away from var_var format
* #if 0 some not-yet-ready r500 code
* no real functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42835 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes, no functional change...
frev / crev to tableMajor / tableMinor
size to tableSize
offset to tableOffset


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42834 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes, no functional change...
automatic crtc_id -> crtcID
automatic pll_id -> pllID
automatic encoder_id -> encoderID
automatic connector_index -> connectorIndex
automatic encoder_flags -> encoderFlags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42831 a95241bf-73f2-0310-859d-f6bbb57e9c96

* complete pll_set for all AtomBIOS revisions
* add update of crtc encoder scratch registers
* rename id for more descriptive crtc_id
* encoder dpms, BL on/off on lcd


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42828 a95241bf-73f2-0310-859d-f6bbb57e9c96

* quick style fix before I forget, no functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42827 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info into pll_info struct.
* reduce the number of unique storage uint32's


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42826 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info onto encoder
* add atombios PLL adjustment code
* add initial PLL clock flags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42819 a95241bf-73f2-0310-859d-f6bbb57e9c96

* detect hdmi and tv and set as such
* set encoder flags the same as connector flags
* add curly comments to make troubleshooting clearer
* program encoder dpms scratch registers


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42818 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move encoder info into own struct
* rename some connector / encoder struct members
* improve debugging in connector / encoder
AtomBIOS walking


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42815 a95241bf-73f2-0310-859d-f6bbb57e9c96

* RIP Radeon register banging
Remove old non-atombios code
* add encoder.c and encoder.h to handle
encoder management
* fix pll code to use encoder object id
vs crtcid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42797 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reformulate display and connector storage to match AtomBIOS requirements
* each active gDisplay references a gConnector index
* add atombios DAC sense.. this really won't be the main call used...
AtomBIOS expects you to attempt an EDID read to detect connected displays
* remove old manual DACSense
* next we attempt to add ddc / edid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42705 a95241bf-73f2-0310-859d-f6bbb57e9c96

* introduce mc control calls
* malloc storage for mc state info
* redo pll range struct
* change to ATOM_ENCODER_MODE for connector info
* redo pll calculations to match AtomBIOS requirements
* some structure changes
* no longer init already posted AtomBIOS as it
causes an infinite loop of AtomBIOS calls


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42644 a95241bf-73f2-0310-859d-f6bbb57e9c96

* lots of changes
* add missing header for some radeon registers
* begin removing now un-needed direct register calls
* move and refactor crtc functions
* fix function naming to be clearer
* create more AtomBIOS style calls
* this will eat your cat at the moment, don't bother testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42582 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Large refactoring of display detection and storage
* Create new display.c/h for display management
* Rename global gCRT to gDisplay
* Add CRT connection type into gDisplay
* Add CRT connection index into gDisplay
* Refactor registers for each display into gDisplay via regs
* We now shouldn't freak out too badly on multi-monitors


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42462 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remove superfluous parentheses as per Axel

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42411 a95241bf-73f2-0310-859d-f6bbb57e9c96

DeadYak gave a better solution to r42407, simply typecast the defines as we don't want to modify the AMD radeon_hd register headers

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42409 a95241bf-73f2-0310-859d-f6bbb57e9c96

prevent radeon_hd enumeral mismatch on powerpc/gcc4

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42407 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Final (hopefully?) calculation for blank start/end
* Lets actually call PLLPower after PLLSet
* Improve screen blanking function
* Detect DAC/PLL to use separately from CRT id
* Add DACSense that senses displays on DACA/DACB
* Grab CRT in PLL code via gRegister crtid
* Set overscan to 0 for now
* Setting extended video modes now kinda works sometimes :-/


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42397 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Style Cleanup
* Remove some un-needed test stuff
* Perform a little re-ordering
* Make scale corrections


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42390 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Refactor PLL legacy registers to be pllIndex aware
* Rename PLL register vars to more closely match AMD defines
* Small logic fixes
* Fix pretty large PLLControlTable bug in legacy set.
Wasn't using output of PLLControlTable.
* Fix *REALLY* big bug in CRTCGrab.
Using PLL2 value instead of PLL1 due to incorrect
index offset of pllIndex.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42389 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add D2 GRPH update lock register to priv headers
* Add crtControl global register
* Add grphUpdate storage
* Do some logical reordering of register writes
* Correct crt final power-on checks
* Enhance tracing
* Disable PLL, it is needed but seems to completely break
the modesetting resulting in black-screen-of-doom.
(fixing PLL set/calibration is now priority one)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42380 a95241bf-73f2-0310-859d-f6bbb57e9c96

gcc2 buildfix; few style adjustments

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42347 a95241bf-73f2-0310-859d-f6bbb57e9c96

A few style fixes, no functional change

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42207 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Break DAC code into sperate source file
* Implement assigning DAC A/B to crt
* Clean up mode change code
* Still some pixel clock wierdness


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42205 a95241bf-73f2-0310-859d-f6bbb57e9c96

* malloc an array of pointers to hold active crt info, mode, limits, etc.
Plan to move gRegister into the crt struct at some point.
* Few style fixes
* Added function to probe edid of attached monitors and populate CRT info
* Disable VGA control modifications temporarly while I hammer out some issues.
* Fix radeon card model checks (bitwise & is not |)
* Finally fix? blanking start / end calculations using porch
* Use mask for setting sync polarity
* Add overscan (8 pixels is default?)
* Disable PLLSet/Power for the moment as it seems to muck things up.
* is_mode_supported now validates if a mode line is with the monitors
h/v sync frequencies (how does is_mode_supported know what crt the os wants?)
* PLL Write/Read don't actually use the PLL Write/Read functions (thanks AMD!)
* Added better PLL legacy (r600-r610) support
* Consistantly give no DCCG on legacy cards.
* Tracing!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42191 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move to common MMIO function set to make card subsystem access easier

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42159 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Repair style issue using uintNN_t vs uintNN
* Make index numbering consistant (0-n vs 1-n)
* Add a little more tracing to PLLCalibrate because
we were missing a failure situation


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42158 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Small style fix to Calibration diff var and PLLCRTCGrab stored var
* Repair incorrect DCCG operation at end of PLLSet


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42149 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Define default PLL ranges
* Add crtid to register struct
* Disable VGA mode on FrameBuffer set (enables extended mode setting)
* Disable blanking calculations and setting more gracefully via if 0
* Add a *large* amount of code to Set/Calculate/Calibrate PLL
* Disable PLL on removal of accel.
* Remove junk comments on overscan
* Enable pixel clock limit pulling
* write32AtMask style cleanup
* Rename ReadMC to be more consistant
(I need to adjust naming for these MMIO calls)
* Implement read/write MC. (so many hardcoded oneoffs AMD)
* Implement write32PLLAtMask MMIO call


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42146 a95241bf-73f2-0310-859d-f6bbb57e9c96

radeon_hd: Move to a unified dp aux transaction function.

* Leverage a single common dp aux message struct.
* Likely lots of obvious bugs that need fixed still.
* Untested.

radeon_hd: ss_probe reads the pixel clock; set before calling.

* CID 743876

radeon_hd: Fix Spread Spectrum clock decimal place

* As 104Mhz is stores as 10400 on atombios,
and 104000 everywhere else... this conversion
was going the wrong direction.
* Shrink the stored value to 10Khz units to properly
compare to the AtomBIOS value

radeon_hd: Fix comment typo, no functional change

radeon_hd: Rework PLL picking code

* Rewrote to be more efficient and more accurate.
* Fix a DP bug where we didn't choose the correct
external PLL.

radeon_hd: Improve pll probing. Let probe calls enable ss

radeon_hd: Finish spread spectrum support

* This needs testing and is to remain disabled
until we can test on several radeon_hd cards
from multiple families

radeon_hd: Don't squash ss status_t into bool

Oops, remove leftover "TODO" in comment

Make code a bit easier to read, add some comments

* No functional change intended

Fix feedback divider value approximation

* The rounding algorithm here expects to start with the 2 digits
after the decimal point in pll->feedbackDivFrac. Multiplying with
1000 instead of 100 filled it with 3 digits.
The last step then set the fractional part to zero because it was
still too large.

radeon_hd: clean up clock units

* Ensure we store all clock units as khz or
n * 10 off from AtomBIOS unit expected
* Perform DDC setup of external encoder

radeon_hd: clean up encoder object

* Encoder flags were 1:1 connector flags...
just look at connector flags.
* Record encoder capabilities
* Add function to check for dp 1.2 support

radeon_hd: Fix DisplayPort link training

* Original changes by Bill Randle
* Includes a large number of modifications
and cleanups.
* Add a "currentMode" to the gDisplay to
enable easier checking of intended changes.
(we pass the display_mode around quite a
bit, adding a "currentMode" allows code
to know the intended display mode being set
without passing the mode pointer around as
much)

radeon_hd: Become Spread Spectrum aware

* Enable Spread Spectrum when requested
* Tested working across several cards, does
have regression potential though.

radeon_hd: slight adjustment to PLL choosing on DP

radeon_hd: re-rework some pll code

* Grab pseudo pll SS info for early
Spread Spectrum access
* display_crtc_ss now takes a pll vs
a display for easy pll access

radeon_hd: rework some pll code

* Force fractional feedback divider on APU's
* Spread Spectrum is now probed more correctly
across multiple encoders and cards
* SS still disabled however.

radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)

radeon_hd: pick a PLL based on connector

* was static PLL 1

radeon_hd: display port improvements

* Remove non-generic radeon dp_get_lane_count
* Set lane count and link rate at set_display_mode
* Pass entire mode to pll_set vs only pixel clock for DP code
* Add helpers for DP config data to common code
* Obtain more correct link rate

radeon_hd: Fix pll DisplayPort endian bug.

radeon_hd: Fix DCE version check

* Trace cleanup
* Minimal change

radeon_hd: Add spread spectrum control functions

* Store SS information with PLL
* Probe SS information for PLL
* Disable SS more correctly
* May resolve mode setting issues on newer cards

radeon_hd: Fix AtomBIOS provided reference divider

* When AtomBIOS provides a reference divider, we should
still attempt to perform calculations using it vs
returning.

radeon_hd: Fix bugs in external DP bridge code

* non-external encoder will never be a DP bridge.
* use external encoder in places where needed.
* ensure we look at proper encoder for isDPBridge.

Revert "radeon_hd: Convert encoders to pointers"

This reverts commit 5a1f9f0f16b2a4bef89b61b4e3e24bf0b53917da.

* Thinking on this a bit more, this is really a silly change as
I know the upper limit for number of valid encoders.
* Resolves a app_server crash introduced as well due to not
allocating encoder pointer.

radeon_hd: Convert encoders to pointers

* Preparation for multiple encoders per connector

radeon_hd: Improve pll DP bridge code

* Only set DP bridge on DP bridge.
* Add a bit of tracing

Complete code for DIG transmitter control

* Record external clock frequency (aka, DP non-pll)
* Add function to control DIG transmitter
* Cleanup duplicated is external code in encoder mode set

Working towards DP connector support

* Lots of new DisplayPort functions
* Call DP link training during mode set
* Rename dp_info variables to be less redundant
* Make encoder_pick_dig accept connector ID and
then check parent display
* Encode/Decode DP link speed functions
* Calculate DP lanes
* Rewrite encoder_dig_setup
* Correct bitsPerChannel to bitsPerColor
* My TRAVIS DisplayPort -> LVDS bridge now works

Introduce new displayport source file

* Move existing displayport functions to new source file
* Move was done due to large amount of DP code
* Style fixes
* Stub out new DP link training function

Cleanup. Move unions into functions that use them.

* Rename unions to match style guide lines
* Group things that make sense together
* Move AtomBIOS argument struct creation closer to what uses it

Pointer style cleanup; Variable consolidation

Include file style cleanup, no functional change

Use bridge encoder flag vs making direct calls to check

Bug fix in drm driver, set EncoderID properly on pll_adjust

Improve pll calculations dealing with DisplayPort devices

* rename encoder_isexternal to encoder_is_external
* add encoder_is_dp_bridge call for special DP cases
* add initial get_dp_link_clock, hard code a guess for now
* take external DP encoders into consideration when making
pixel clock adjustments

* style cleanup of shared storage names
* return better data on card
* display chipset flags in screen preflet


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43226 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add lots of missing evergreen defines
* evergreen headers are split due to different
header copyrights
* detect and set up evergreen memory controler
* change the way we manage radeon chipsets to
more closely match drm driver as the chipset
model numbers aren't in order and change from
numbers to names.
* check for evergreen when populating frame buffer
information.
* style cleanup


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43225 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reorganize register definitions
There were a large number if incorrect, duplicated, misplaced
registers that were leading to bugs in the code. This is my first
shot at cleaning them up. Luckly as we are using AtomBIOS the number
of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96

* stub out dig encoder setup
* adjust pll post divider calculation
* fix digital encoder setup action
* don't run memreq on DCE < 3, should solve
some AtomBIOS failure loops


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42892 a95241bf-73f2-0310-859d-f6bbb57e9c96

* fix minimum pll out units
* sort files in Jamfile
* add TV and compontent video support in encoder code
* fix missing var in display detection code


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42878 a95241bf-73f2-0310-859d-f6bbb57e9c96

* fix pll limitations probing
* radeon HD mode setting on analog monitors is now working!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42877 a95241bf-73f2-0310-859d-f6bbb57e9c96

* redo 42874 in the right direction
* fix a order of operations bug
* fix a few long lines
* pll computation should now be correct


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42876 a95241bf-73f2-0310-859d-f6bbb57e9c96

* increase tolerance checking as we store kHz vs 10kHz units


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42874 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add varying PLL calculations as directed by AtomBIOS
* don't set referenceDivider as minimum unless directed to by
AtomBIOS


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42873 a95241bf-73f2-0310-859d-f6bbb57e9c96

* fix TODO style due to ML
* rename bpc to bitsPerChannel
* remove un-needed / unused PCI BAR reference
* no functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42861 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add function to make pll flag adjustments
* bug fix of improper unit conversion


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42858 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add function to probe pll timing limits from AtomBIOS
* rename *_* pll vars to match style guidelines
* refactor PLL calculation to be easier to read with
more central 10kHz unit conversions
* limited mode switching has been seen working including
a perfect 1280x1024@75


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42855 a95241bf-73f2-0310-859d-f6bbb57e9c96

* tweaks to pll calculation reference units.. make divisors match 10 kHz unit


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42854 a95241bf-73f2-0310-859d-f6bbb57e9c96

* first shot at fixing pll calculations
AtomBIOS wants number of 10Khz Units
* better debugging after modeset on current
CRTC status


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42853 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes
move quite a bit of code away from var_var format
* #if 0 some not-yet-ready r500 code
* no real functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42835 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes, no functional change...
frev / crev to tableMajor / tableMinor
size to tableSize
offset to tableOffset


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42834 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes, no functional change...
automatic crtc_id -> crtcID
automatic pll_id -> pllID
automatic encoder_id -> encoderID
automatic connector_index -> connectorIndex
automatic encoder_flags -> encoderFlags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42831 a95241bf-73f2-0310-859d-f6bbb57e9c96

* complete pll_set for all AtomBIOS revisions
* add update of crtc encoder scratch registers
* rename id for more descriptive crtc_id
* encoder dpms, BL on/off on lcd


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42828 a95241bf-73f2-0310-859d-f6bbb57e9c96

* quick style fix before I forget, no functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42827 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info into pll_info struct.
* reduce the number of unique storage uint32's


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42826 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info onto encoder
* add atombios PLL adjustment code
* add initial PLL clock flags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42819 a95241bf-73f2-0310-859d-f6bbb57e9c96

* detect hdmi and tv and set as such
* set encoder flags the same as connector flags
* add curly comments to make troubleshooting clearer
* program encoder dpms scratch registers


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42818 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move encoder info into own struct
* rename some connector / encoder struct members
* improve debugging in connector / encoder
AtomBIOS walking


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42815 a95241bf-73f2-0310-859d-f6bbb57e9c96

* RIP Radeon register banging
Remove old non-atombios code
* add encoder.c and encoder.h to handle
encoder management
* fix pll code to use encoder object id
vs crtcid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42797 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reformulate display and connector storage to match AtomBIOS requirements
* each active gDisplay references a gConnector index
* add atombios DAC sense.. this really won't be the main call used...
AtomBIOS expects you to attempt an EDID read to detect connected displays
* remove old manual DACSense
* next we attempt to add ddc / edid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42705 a95241bf-73f2-0310-859d-f6bbb57e9c96

* introduce mc control calls
* malloc storage for mc state info
* redo pll range struct
* change to ATOM_ENCODER_MODE for connector info
* redo pll calculations to match AtomBIOS requirements
* some structure changes
* no longer init already posted AtomBIOS as it
causes an infinite loop of AtomBIOS calls


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42644 a95241bf-73f2-0310-859d-f6bbb57e9c96

* lots of changes
* add missing header for some radeon registers
* begin removing now un-needed direct register calls
* move and refactor crtc functions
* fix function naming to be clearer
* create more AtomBIOS style calls
* this will eat your cat at the moment, don't bother testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42582 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Large refactoring of display detection and storage
* Create new display.c/h for display management
* Rename global gCRT to gDisplay
* Add CRT connection type into gDisplay
* Add CRT connection index into gDisplay
* Refactor registers for each display into gDisplay via regs
* We now shouldn't freak out too badly on multi-monitors


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42462 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remove superfluous parentheses as per Axel

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42411 a95241bf-73f2-0310-859d-f6bbb57e9c96

DeadYak gave a better solution to r42407, simply typecast the defines as we don't want to modify the AMD radeon_hd register headers

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42409 a95241bf-73f2-0310-859d-f6bbb57e9c96

prevent radeon_hd enumeral mismatch on powerpc/gcc4

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42407 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Final (hopefully?) calculation for blank start/end
* Lets actually call PLLPower after PLLSet
* Improve screen blanking function
* Detect DAC/PLL to use separately from CRT id
* Add DACSense that senses displays on DACA/DACB
* Grab CRT in PLL code via gRegister crtid
* Set overscan to 0 for now
* Setting extended video modes now kinda works sometimes :-/


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42397 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Style Cleanup
* Remove some un-needed test stuff
* Perform a little re-ordering
* Make scale corrections


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42390 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Refactor PLL legacy registers to be pllIndex aware
* Rename PLL register vars to more closely match AMD defines
* Small logic fixes
* Fix pretty large PLLControlTable bug in legacy set.
Wasn't using output of PLLControlTable.
* Fix *REALLY* big bug in CRTCGrab.
Using PLL2 value instead of PLL1 due to incorrect
index offset of pllIndex.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42389 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add D2 GRPH update lock register to priv headers
* Add crtControl global register
* Add grphUpdate storage
* Do some logical reordering of register writes
* Correct crt final power-on checks
* Enhance tracing
* Disable PLL, it is needed but seems to completely break
the modesetting resulting in black-screen-of-doom.
(fixing PLL set/calibration is now priority one)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42380 a95241bf-73f2-0310-859d-f6bbb57e9c96

gcc2 buildfix; few style adjustments

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42347 a95241bf-73f2-0310-859d-f6bbb57e9c96

A few style fixes, no functional change

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42207 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Break DAC code into sperate source file
* Implement assigning DAC A/B to crt
* Clean up mode change code
* Still some pixel clock wierdness


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42205 a95241bf-73f2-0310-859d-f6bbb57e9c96

* malloc an array of pointers to hold active crt info, mode, limits, etc.
Plan to move gRegister into the crt struct at some point.
* Few style fixes
* Added function to probe edid of attached monitors and populate CRT info
* Disable VGA control modifications temporarly while I hammer out some issues.
* Fix radeon card model checks (bitwise & is not |)
* Finally fix? blanking start / end calculations using porch
* Use mask for setting sync polarity
* Add overscan (8 pixels is default?)
* Disable PLLSet/Power for the moment as it seems to muck things up.
* is_mode_supported now validates if a mode line is with the monitors
h/v sync frequencies (how does is_mode_supported know what crt the os wants?)
* PLL Write/Read don't actually use the PLL Write/Read functions (thanks AMD!)
* Added better PLL legacy (r600-r610) support
* Consistantly give no DCCG on legacy cards.
* Tracing!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42191 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move to common MMIO function set to make card subsystem access easier

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42159 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Repair style issue using uintNN_t vs uintNN
* Make index numbering consistant (0-n vs 1-n)
* Add a little more tracing to PLLCalibrate because
we were missing a failure situation


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42158 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Small style fix to Calibration diff var and PLLCRTCGrab stored var
* Repair incorrect DCCG operation at end of PLLSet


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42149 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Define default PLL ranges
* Add crtid to register struct
* Disable VGA mode on FrameBuffer set (enables extended mode setting)
* Disable blanking calculations and setting more gracefully via if 0
* Add a *large* amount of code to Set/Calculate/Calibrate PLL
* Disable PLL on removal of accel.
* Remove junk comments on overscan
* Enable pixel clock limit pulling
* write32AtMask style cleanup
* Rename ReadMC to be more consistant
(I need to adjust naming for these MMIO calls)
* Implement read/write MC. (so many hardcoded oneoffs AMD)
* Implement write32PLLAtMask MMIO call


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42146 a95241bf-73f2-0310-859d-f6bbb57e9c96