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20c9044a |
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03-Sep-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Move private zircon/garnet headers to zircon-internal Tested: Builds. Further testing in garnet. Change-Id: I61513d56d19cea40198959118ddbae7fdc6c88e4
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af07ad38 |
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08-Sep-2018 |
Doug Evans <dje@google.com> |
Revert "[dev][cpu-trace] Move private zircon/garnet headers to zircon-internal" This reverts commit 937a00818b643d6222d873b6afd64f3382800f00. Reason for revert: Finishing the hard transition in garnet would require bringing in an unrelated patch. Original change's description: > [dev][cpu-trace] Move private zircon/garnet headers to zircon-internal > > Tested: Builds. Further testing in garnet. > Change-Id: Iad7692bf590978afbc15240c1710faeb525db691 TBR=dje@google.com,teisenbe@google.com Change-Id: I69f893ff7a4f53802bf93e75fd2a2466452c9106 No-Presubmit: true No-Tree-Checks: true No-Try: true
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937a0081 |
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03-Sep-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Move private zircon/garnet headers to zircon-internal Tested: Builds. Further testing in garnet. Change-Id: Iad7692bf590978afbc15240c1710faeb525db691
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0af3f7c6 |
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03-Sep-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Renamings in preparation for arm port ipm -> cpuperf ipt -> insntrace Tested: Compiles. Further testing on garnet side. Change-Id: I09990ab54379ba76fe8b51e1c8cd2f4154fdf723
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13e4865e |
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05-Aug-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Naming changes to prep for ARM port Beginnings of naming changes at the higher level to be architecture neutral. Tested: Build Change-Id: Iddf32d249fe8d7eb793e590d62cad49da15c09ad
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d14bfadf |
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20-Mar-2018 |
Todd Eisenberger <teisenbe@google.com> |
[ddk][io-buffer] Rename callsites of io_buffer_init*_with_bti ZX-1804 #comment Move all zircon callsites to final name Change-Id: Ie35de5654841e84653582126dc1f976664c0f49d
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20b767f7 |
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20-Mar-2018 |
Todd Eisenberger <teisenbe@google.com> |
[dev][cpu-trace] Migrate to using BTIs with io_buffer Change-Id: I74f6146aa8b5aa3e4e48605135705d99dbf0ed0f
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311695c3 |
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09-Mar-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Misc cleanup - clarify counters are really events - be less verbose in referring to MCHBAR - make sure ipm_get_properties fills in the entire result struct Change-Id: Id47181b92e2cc12a1ff53abbc0a40bcd3465385b
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15b4e623 |
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08-Dec-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Add more skylake misc events Change-Id: I9100d3b80766ec7d86105c42ac04c2a4c9496a2a
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fa7f3d5c |
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08-Dec-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Rework misc events, prepare for a lot more Change-Id: Ia633a1a4710811c0f80f79cf52b233510ffb53b3
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ccd3e404 |
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08-Dec-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Replace use of the term "counter" with "event" The term "event" is more generic and includes things that are not counters (e.g., voltage, temperature). Change-Id: I463ff25c45e47a4efe933d207c72d23dff2a021b
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a4fe1253 |
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08-Dec-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Mark misc Intel events as Skylake specific Change-Id: I319a88eba37ce9c2fff1fd3a8cd4b43b02c44d2f
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0b32af5e |
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03-Dec-2017 |
Doug Evans <dje@google.com> |
[kernel][x86] Add memory controller hub byte r/w stats to perf_mon Change-Id: I714e7742b0be04746547da986266d820883c2bff
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4a62c1f8 |
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06-Dec-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Refactor config verification/staging No functional changes. Change-Id: I1c7bdf1e75a0106631c3141b1cf4ef28bacc96a1
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1ae0b5c9 |
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01-Dec-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Make garnet-facing perfmon API non-intel-specific Change-Id: Ib1bbfcf8d3cb780be71c96c40527efa0b002cd7d
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969c2a73 |
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01-Dec-2017 |
Doug Evans <dje@google.com> |
[x86][perf_mon] Remove simple config via categories ... now lives in garnet. Change-Id: Id7d9ed339a9e93c8c81e4bb774f5781db3bd2c1e
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023121db |
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01-Dec-2017 |
Doug Evans <dje@google.com> |
[x86][perf_mon] Rename zx_x86_ipm_state_t -> zx_x86_ipm_properties_t ... and rename zx_x86_ipm_perf_config_t -> zx_x86_ipm_config_t Change-Id: I23eb8b47cc25eec7caf4275d3b71859657b4f8f6
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f28cf189 |
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01-Dec-2017 |
Doug Evans <dje@google.com> |
[x86][perf_mon] Misc cleanup - fix some comments - rename fixed_counter_ctrl to fixed_ctrl - remove kernel reporting of perfmon h/w, just let the driver do it - removed unused buffer arg to x86_ipm_assign_buffer Change-Id: I431be9140b1c68f1349ef648b08bde70e058d35a
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571be13b |
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12-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Rename category cpu:usr -> cpu:user More, umm, user-friendly. Change-Id: I3874152fceaf15df11c0a42b00311da259ad529c
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01ef1f87 |
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12-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Add sampling rates 100,500 These rates don't make any sense when sampling retired instructions or clock cycles. But they can be useful for less frequent events to get more fidelity. Change-Id: I44896c2b29ac74791f92886d7afef381a9db59d1
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4f94730f |
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12-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Split out pc from sample trace records Only include pc data in trace output if requested. Include cr3 in trace output for associating record with a process. Processor Trace does this, and this can then use the same reader for providing symbolic access to an entire system. Change-Id: Ieda62659499a23a0e61aa866c3d797b78364ef29
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5c62f570 |
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11-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Remove unnecessary buffer start/end offsets The start offset is only ever reasonably zero, and the end offset we can get from the vmo size. Change-Id: I07dd60a0190302236af28b8bcd599b9b9b119aa7
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dd2488cc |
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11-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Move skylake events to their own files. This patch re-applies commit 4e81a96d510f298238149b0f933163cbceadd5f2 Change-Id: I82c47850b77857841c4f977aa78311110b9cc932
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4673f6bd |
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14-Nov-2017 |
Doug Evans <dje@google.com> |
Revert "[dev][cpu-trace] Move skylake events to their own files." This reverts commit 4e81a96d510f298238149b0f933163cbceadd5f2. Change-Id: I1a9327018d8484ba9d40914426061bf74ce88a58
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4e81a96d |
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11-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Move skylake events to their own files. Change-Id: If4e5ee0f5ca17674bc954aa5e04d3956f88babb6
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43ffbb75 |
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11-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Move public headers to zircon/device/cpu-trace There will be more files describing cpu events and such, and putting them all in zircon/device will reduce the S/N ratio of the files there. Change-Id: I9811fcd42ee6af68a32d80e8efd5980adece040d
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7166ce51 |
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06-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Allow for gaps in programmable counter ids Change-Id: Ibc2d066575c1fbc8d8d8abb19e95ff90a277c397
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3bb96c94 |
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06-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Rename some things for style, clarity ... and reduce number of programmable categories. 255 is plenty for now. Change-Id: I444ac6e8ee6e33b679cee5f199e7b97775ab7326
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f10f7240 |
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06-Nov-2017 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Improve logging messages Change-Id: Ia5b8b50034c411dd2270ca30c7701630f5d5d30c
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628184bf |
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30-Oct-2017 |
Doug Evans <dje@google.com> |
[device][intel-pm] more sample frequencies, split fixed counters up Until we have the ability to set arbitrary sample rates, it's help to have a bit more flexibility. The fixed counters can take up a lot of space in the trace buffer, but they are useful: Allow specifying a subset of them. This patch reapplies commit bf84825199d9b3347cea17628b2bfbf8003d9565 Change-Id: Ie4873ffc2cf6a5a34199a1b2f4a5c9a15d16c92f
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8f8bd578 |
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07-Nov-2017 |
Doug Evans <dje@google.com> |
Revert "[device][intel-pm] more sample frequencies, split fixed counters up" Missing old+new macros to sequence upgrade of garnet. This reverts commit bf84825199d9b3347cea17628b2bfbf8003d9565. Change-Id: Id1bb9055aa8466243e91a64249a012f44f1b6888
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bf848251 |
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30-Oct-2017 |
Doug Evans <dje@google.com> |
[device][intel-pm] more sample frequencies, split fixed counters up Until we have the ability to set arbitrary sample rates, it's help to have a bit more flexibility. The fixed counters can take up a lot of space in the trace buffer, but they are useful: Allow specifying a subset of them. Change-Id: I77ea4cbdb6d4dda6e1e3510f850b687edaa0da60
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0c28fc99 |
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16-Aug-2017 |
Doug Evans <dje@google.com> |
[dev][intel-pm] Intel Performance Monitor support First pass. Change-Id: Iede25087ac3c460c685d6b487eee0a830a03efec
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