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20c9044a |
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03-Sep-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Move private zircon/garnet headers to zircon-internal Tested: Builds. Further testing in garnet. Change-Id: I61513d56d19cea40198959118ddbae7fdc6c88e4
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af07ad38 |
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08-Sep-2018 |
Doug Evans <dje@google.com> |
Revert "[dev][cpu-trace] Move private zircon/garnet headers to zircon-internal" This reverts commit 937a00818b643d6222d873b6afd64f3382800f00. Reason for revert: Finishing the hard transition in garnet would require bringing in an unrelated patch. Original change's description: > [dev][cpu-trace] Move private zircon/garnet headers to zircon-internal > > Tested: Builds. Further testing in garnet. > Change-Id: Iad7692bf590978afbc15240c1710faeb525db691 TBR=dje@google.com,teisenbe@google.com Change-Id: I69f893ff7a4f53802bf93e75fd2a2466452c9106 No-Presubmit: true No-Tree-Checks: true No-Try: true
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937a0081 |
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03-Sep-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Move private zircon/garnet headers to zircon-internal Tested: Builds. Further testing in garnet. Change-Id: Iad7692bf590978afbc15240c1710faeb525db691
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0af3f7c6 |
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03-Sep-2018 |
Doug Evans <dje@google.com> |
[dev][cpu-trace] Renamings in preparation for arm port ipm -> cpuperf ipt -> insntrace Tested: Compiles. Further testing on garnet side. Change-Id: I09990ab54379ba76fe8b51e1c8cd2f4154fdf723
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9dd5b5f5 |
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24-May-2018 |
Adam Barth <abarth@chromium.org> |
[syscalls] Update parameter types and names This CL updates the parameter types and names for a number of syscalls to match the Zircon System API rubric. There's more work to do to make all the syscalls conform to the rubric, but this change is a start. Change-Id: I218ac5e7e0cbd80a8c69fef7891ad40b78b6b407
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0c28fc99 |
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16-Aug-2017 |
Doug Evans <dje@google.com> |
[dev][intel-pm] Intel Performance Monitor support First pass. Change-Id: Iede25087ac3c460c685d6b487eee0a830a03efec
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709f0e57 |
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04-Oct-2017 |
George Kulakowski <kulakowski@google.com> |
[user_ptr] Enforce IN/OUT/INOUT semantics Change-Id: I54e92ed999c1965114aa80aeffe8d0fc16184b40
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f3e2126c |
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12-Sep-2017 |
Roland McGrath <mcgrathr@google.com> |
[zx] Magenta -> Zircon The Great Renaming is here! Change-Id: I3229bdeb2a3d0e40fb4db6fec8ca7d971fbffb94
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22256063 |
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21-Aug-2017 |
George Kulakowski <kulakowski@google.com> |
[kernel][status] Convert the rest of kernel/lib to mx_status_t Change-Id: Iba1bb7024bcefa7c5e3ee58b02d0be758c6545ae
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e03397ac |
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08-Aug-2017 |
George Kulakowski <kulakowski@google.com> |
[sysgen][user_ptr] Always wrap user pointer types Change-Id: I976cf17766474943cfda381931531cd7752d8db9
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afa9d2b6 |
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15-Jun-2017 |
George Kulakowski <kulakowski@google.com> |
[kernel][lib] Use the new MX_OK and MX_ERR_* names Change-Id: I436bb0728838729bef6e20a6db0e8ce6a96b5534
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3f9ec741 |
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30-Jan-2017 |
Doug Evans <dje@google.com> |
[kernel][x86] First pass as Intel PT support Intel PT (Processor Trace) is a h/w based instruction tracing feature. See Intel Vol. 3 chapter 36. This is the low level kernel support: - support for reading/writing the PT MSRs - support for starting/stopping full system traces (tracing all cpus, regardless of thread running) - logging of cr3->pid values for later post-processing of the trace Support for tracing specific threads to follow. The rest is in user-space driver "intel-pt". Change-Id: Ib69a17e501a08dd6b0a661524cac9467d2d7f62e
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