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003f5def |
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15-Jun-2018 |
Francois Rousseau <frousseau@google.com> |
[debug] add thread states for fs/gs registers also delete previously introduced "extra regs" state ZX-2258 # step 1 TESTED=None (these states are not used at the moment) Change-Id: I80cf642b82187c209a0f43aeb10052d3ed87016f
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74cf5656 |
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26-Jun-2018 |
Francois Rousseau <frousseau@google.com> |
[thread] clang-format on fs/gs register related files ran zircon/scripts/clang-fmt on all the files I am about to edit ZX-2258 # initial re-formatting TESTED=None Change-Id: Id963c5415469078558035c6f28ed39ceff3affce
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159ff793 |
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01-Mar-2018 |
Brett Wilson <brettw@chromium.org> |
[debugger] Add thread state for FP regs and FS/GS Adds FPU, vector, and "extra" states to the CPU states that can be queried and set via zx_thread_read/write_state. ZX-2101 Change-Id: Ic809077a62d963bab578ee76379deb0c1e0362c1
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efb63db2 |
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28-Mar-2018 |
Brett Wilson <brettw@chromium.org> |
[debugger] Set the single step flag in more places. Previously the single step state would leak out of a thread and apply to random threads on the system. This changes the single-step state from being stored on the thread_t struct to always being stored in the saved register context of the thread. Change-Id: I72679c74ee6be4a77273e28463b3160f25daec5e
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56aff58f |
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01-Feb-2018 |
Brett Wilson <brettw@chromium.org> |
[debugger] Clarify thread state API Firms up the contract for zx_read|write_thread_state and makes the state more explicit for each platform. The general register struct has been made for the current platform which simplifies much fo the code. The sizes are converted to size_t for consistency with other object calls. Forwarding #defines and typedefs are included for downstream users until they can be updated. This will likely need to be revised somewhat again when we add more thread states, which I plan to do in a followup. Change-Id: I57e8e9979d073c8efdfaeb2683f9f83494d19abf
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39d88359 |
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26-Sep-2017 |
George Kulakowski <kulakowski@google.com> |
[kernel][status] Migrate the rest to zx_status_t Change-Id: If0a5d3e04bfc3e2a57d068350ee1d1156ed67872
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f3e2126c |
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12-Sep-2017 |
Roland McGrath <mcgrathr@google.com> |
[zx] Magenta -> Zircon The Great Renaming is here! Change-Id: I3229bdeb2a3d0e40fb4db6fec8ca7d971fbffb94
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b4d2c9ea |
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27-Jul-2017 |
George Kulakowski <kulakowski@google.com> |
[debugger] Remove 'priv' argument from arch_set_regset and up This was always false, and in all implementations was ignored. Change-Id: If23e701fe201a52f78b06f613799184250a83803
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0d794034 |
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07-Sep-2016 |
Doug Evans <dje@google.com> |
[kernel][debug] beginnings of register r/w support This provides two syscalls mx_thread_read_state,mx_thread_write_state that can be used to r/w cpu registers. It is built off of the idea of "register sets" (integer, floating point, and so on) in common use at least in gdb. Discussion of the ultimate name of these syscalls, and whether to merge them with something else is being left until the raft of dependencies relying on this code is ready. Change-Id: Ic118a76292334dfeaa46278aaddca3140ed4441c
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