[kernel] Pull MSI support out of PCIe into dev/interrupt

- Remove PCI dependency from the Intel IOMMU impl.
- Remove WITH_DEV_PCIE defines that gate MSI support.
- Move msi_* functions to dev/interrupt.h and provide
weak stubs in dev/interrupt/msi.c
- Update intel and aram methods to use new MSI functions
that exist standalone.

The MSI interface is subject to change still in the future,
but for now this decouples the IOMMU from PCI and sets up
a framework for MSI being part of the kernel interrupt interface.

PciePlatform support classes are mostly left alone to avoid
refactoring a system that will be unused later. They may be
eliminated in a future CL if it seems easy to do.

Test: core-tests and boot tests

Change-Id: I89f226ccf5ebf4930ea06d9f32cb6e1caabde34e

[pci] Handle IRQ modes from any existing state

Allow a driver to request an IRQ mode while in any existing IRQ
mode provided there are no handlers presently configured for the
IRQ in question. This handles the case where a driver dies or is
killed after configuring interrupts and finds the devicein a bad
state when a new driver is spawned.

Change-Id: I47ccc5d19a4d8addcbce2a81dbd6efc4a8248001

[kernel][interrupts] Replace "enum handler_return" type with void

Following recent changes for using preempt_disable, all of the
in-kernel interrupt handlers now always return INT_NO_RESCHEDULE. We
can therefore remove their return values. We can use "void" instead
of "enum handler_return".

The bulk changes are:

* Search-and-replace "enum handler_return" -> "void".
* Manually change "return INT_NO_RESCHEDULE;" -> "return;", or remove
when at the end of a function.
* Manually change "return foo();" -> "foo();" when return type is
void (just a cleanup -- the code compiles without this change).

The non-bulk changes include:

* Remove the definition of enum handler_return.
* Update the interrupt entry points: faults.cpp and exceptions_c.cpp.
* Update a few places where handler_return values were propagated,
such as "handler->handler()" calls, removing "ret =".

Note that platform_fiq() (changed here) is called from ARM assembly.

ZX-1490

Change-Id: I70b57c610ded0facb93c09ac8ffc81cf23a985fc

[kernel] Rename AutoSpinLockIrqSave to AutoSpinLock

There were several instances of people using AutoSpinLock when they
should have used AutoSpinLockIrqSave. This is patch 2 of 2 for
inverting the naming, so the simpler named one is the safer
one to use.

Change-Id: I441a66c8755e3c0b33c41cffbd26ebe504ab9428

[kernel] Rename AutoSpinLock to AutoSpinLockNoIrqSave

There were several instances of people using AutoSpinLock when they
should have used AutoSpinLockIrqSave. This is patch 1 of 2 for
inverting the naming, so the simpler named one is the safer one to use.

Change-Id: If29470ffcc57016f0f7d13f3af924e5fe6151c5a

[pci] Remove some SetIrqMode asserts

These asserts existed to catch the error condition where a
process is changing IRQ modes and in the teardown it was
found that there were still registered handlers. This is a bad
state, however it's also the state the driver would see if a
driver devhost died. Since this code predates process teardown
and suspend paths, it makes sense to remove them now.

Change-Id: I7c3d43bc8b69b20b4434e2bf7366af0cb2d18453

[kernel] Revert "[kernel][interrupts] Add assertion to every interrupt-handling function"

This reverts commit cae96aef07ff38db6e1ad7f05444758531c3e764.

That change caused a kernel assertion failure via the following path:

sys_mmap_device_io()
-> IoBitmap::SetIoBitmap()
-> mp_sync_exec()
-> mp_mbx_generic_irq()

ZX-1490

Change-Id: Ic2362d000be7b4e021c6942cc6d0f9550dd15649

[kernel][interrupts] Add assertion to every interrupt-handling function

This is in preparation for removing the "enum handler_return" type.
When we replace that with "void", there will be nothing in the
function signatures to mark out these functions that are only called
in interrupt-handling context.

To make up for that, add the assertion
"DEBUG_ASSERT(arch_in_int_handler())" at the start of every function
that currently returns a "handler_return".

ZX-1490

Change-Id: I30deda7192eed9f5a5276ec6259cce78277e87ea

[kernel][pci] Remove PCIE_IRQRET_RESCHED, which is now unused

Do the same for PCIE_IRQRET_MASK_AND_RESCHED.

These are unused now that PciInterruptDispatcher has been converted to
making use of preempt_disable (by passing reschedule=true to
event_signal()).

ZX-1490

Change-Id: I68e26e6c2f16ff2273ebc9cf69a9527bd86f385c

[pci] Remove DEBUG_ASSERT in Irq bookkeeping

ResetCommonIrqBookkeeping is called from both LeaveLegacyIrqMode
and LeaveMsiIrqMode. The existing assert is written to assume
that if you have > 1 irq handlers then you have the handler table,
and otherwise you're using the singleton. However, the singleton path
also catches the case where this is called when you have no configured
handlers. This path is hit if a driver tries to enter MSI mode, then
bails out due to no backing MSI blocks being available in the platform
driver.

It appears safe to remove and refactor since all the work it does is
safe unconditionally.

ZX-1511 #in-progress
ZX-1512 #in-progress

Change-Id: I29eb70a5367df265f2b4b6ed7ecd766f06dc1441

[kernel][interrupt] return error from register_int_handler()

register_int_handler() will return ZX_ERR_INVALID_ARGS instead of panicing
if the interrupt vector is invalid and will now also return ZX_ERR_ALREADY_BOUND
if the caller attempts to set a handler for an interrupt vector that already
has a handler.

This allows us to remove an unnecessary WAVL tree from InterruptEventDispatcher.

Also, zx_interrupt_create() will return an error if it attempts to bind to an
interrupt vector that is now being used by a kernel driver.

Add interrupt_has_handler() to determine if we have a handler for an interrupt vector
to use for this instead.

Also added a missing sanity check to PciInterruptDispatcher.

ZX-1369 #done

Change-Id: I107634c66b57cd5a7adfd6780d0afa24dfda449b

[kernel][pcie][status] Use zx_status_t

Change-Id: I358be7e0a47a235ad489d1cfa52fde2606204df3

[kernel][vm] move vm.h to the new spot and remove some unused code

Change-Id: I69f1b804fb95dd44e3e0619943e8809519aa82ca

[zx] Magenta -> Zircon

The Great Renaming is here!

Change-Id: I3229bdeb2a3d0e40fb4db6fec8ca7d971fbffb94

[zircon][mxtl->fbl] Rename mxtl to fbl

Change-Id: Ie21b6498e1bfb0a7fa0315e40b9e5c3ee78646be

[kernel] Make kernel always use mxtl:: for Mutex/AutoLock

No functional changes, just makes everything more consistent.

Change-Id: I9bba8630e79d6d9f1c1bdacc595cdbfc97cf75ba

[mxtl][mxalloc] Redirect all clients of mxalloc to mxtl.

Change-Id: Ib6d88937212ab23612f59add8bd028862308ead5

[spinlock] Make AutoSpinLock take a pointer, not reference, to a spinlock

This makes it consistent with AutoLock.

Change-Id: I442c4a59ca42785814ac6cc93645ecd616fbf0b0

[kernel][dev] Use the new MX_OK and MX_ERR_* names

Change-Id: I8a280c31fdaedf7476c02f3b5ea8d0b473bf7979

Fix spelling of "currently"

Change-Id: Ic3be52ae8cd8405b4f163ede2db8db7830298350

[mxcpp][mxalloc] Split mxcpp into mxcpp and mxalloc

mxcpp used to provide three things.

(1) is a very minimal C++ runtime environment. This means essentially
the definition of __cxa_pure_virtual, which is a function the compiler
expects to have ambient. This functionality is necessary for code
written in environments which cannot link the standard library (the
kernel and a handful of initial userspace processes).

(2) is the definitions of the standard new and delete
overloads. Again, these are needed for code that wants to call them
but to not link the standard library, but this time only in userspace
(the kernel does not want certain behavior stemming from the standard
overloads). The behavior is slightly different than the standard ones
in failure cases, but not in a way particularly interesting to the
rest of this email.

(3) is the userspace version of our special AllocChecker new
overloads. This mechanism exists for kernelspace, where allocation
failure is real and needs to be handled. This mechanism works
perfectly well in userspace, in that it compiles, even though the
underlying allocator is unlikely to ever return nullptr. It's
therefore essentially harmless in userspace. A handful of small
libraries are used in both userspace and in the kernel, and also use
this mechanism. Note that this feature is essentially copy-pasted
between the kernel and userspace.

This all works perfectly well for the kernel.

Some userspace code also uses these mechanisms, as mentioned. As long
as the standard library isn't linked, there are again no issues.

But as soon as you want both (3) and std::vector, which is a
reasonable thing to want!, there are issues because (1) and (3) come
in the same static library. This causes link failures due to duplicate
__cxa_pure_virtual symbols. This issue is exacerbated by different
behavior in Linux, OS X, and target linkage, in terms of confusion and
it-works-on-my-machine sort of issues.

This patch splits mxcpp into: mxcpp, containing (1) __cxa_pure_virtual
and (2) only if in userspace, the standard new and delete overloads;
and mxalloc, containing (3) AllocChecker. mxcpp is mutually exclusive
of the standard library. mxalloc can be linked against both code using
the standard library, and against code using mxcpp.

This patch also deduplicates the AllocChecker between userspace and
kernel, and moves the InlineArray class into the kernel (its only
callsites are in the kernel).

Change-Id: Id42d5d019ee977d44d6cb89ce7ab6884f7a56cd1

[mxtl] Remove reference-taking variants of AutoLock constructors

Change-Id: I3f2c3a6ff88a4004448e9e90668541203d1ff50e

[kernel][style] Use nullptr rather than NULL in kernel C++ code

Change-Id: I7feea6a42c00531be28a98c820b2c234484bfe3b

[pcie] Fix buggy assert caused by capability refactor

The msi_ member is now nullable.

Change-Id: I1dbe6bf189e80418a3498d924bfc8c62377465d9

[pci] Correct an assert and conditional in IRQ path

- A DEBUG_ASSERT for MSI is no longer necessary after the rework
- Ensure that MSI is both found as a pci capability and in a valid
configuration before allowing its capabilities queried / set.
- Add another LTRACEF to pcie_caps.cpp that will be useful catching
these sorts of things in the future.

Change-Id: I7d80cf1b9aa563bc184717ff78bb34a5e8c3a777

[pci] PCI refactor for C++/PIO/MMIO

- Create PciConfig/PciMmioConfig/PciPioConfig classes for abstracting
out all PCI configuration reads/writes.
- Modify existing PCI codebase to not assume memory mapped MMIO address
space for all devices.
- Unify PCI device and bridge device types into a single entity
separated only by config register mappings.
- Update lspci command so it can properly show configuration data
whether a device is MMIO or PIO.
- Rework PCI Capabilities to use an object hierarchy and common
interface.
- Convert the remaining C interfaces in the PCI codebase to C++.
- Fix clang build.

Change-Id: Ia5b32f88f48ba317848befde853b9af9a489205d

[pcie] Make IRQ swizzling a PcieRoot property.

Move Legacy IRQ swizzling behavior out of the platform interface class
and make it a property of a PcieRoot instead. The behavior is
not a property of the system as a whole, it is a property of the root
being traversed.

Change-Id: I3b8241be98582d006cb3570119ed4174201562f2

[pcie] Refactor to add PcieRoot

Refactor PcieBridge so we can model PCIe roots as objects which manage a bus and
have children, but are not devices. Specifically, there is now a
PcieUpstreamNode class which manages children, and is a base class for PcieRoot
and PcieDevice. "Having children" is implemented by UpstreamNode, "Being a
device with children" is implemented by PcieBridge, and "Being a non-device with
children" is implemented by PcieRoot.

Next steps
++ Get rid of the root_complex_ singleton member of the bus driver. Replace it
with a collection roots.
++ Move the management of legacy IRQ swizzling out of the PciePlatform class and
into the PcieRoot class. Swizzle behavior is platform specific, but also
specific to the traversal of a specific root. When the platform adds roots
to the driver, the swizzle behavior of that specific root should be provided.

Change-Id: I62118429632eb30a827f50b49df737eda0f4f693

[pcie] Fix SetIRQMode(DISABLED)

++ It should not be an error to query support for IRQ_MODE_DISABLED.
All devices support IRQ_MODE_DISABLED, it's just that this mode's
max IRQ count is 0.
++ After setting the IRQ mode, the existing dispatcher code does a
Query operation to check to see if the mode selected supports
per-vector-masking. It is possible for this call to fail if the
device has become unplugged in-between the SetMode and QueryMode
operation. Do not assert that this the Query succeeds, instead
handle the failure by attempting to put the device into
IRQ_MODE_DISABLED and unwinding.
++ The maximum number of IRQs supported for a given IRQ mode by a
device is not the same thing as the number of IRQs which have been
enabled. The device dispatcher was attempting to cache the number
of configured IRQs so that it could reject the creation of an
IrqDispatcher if it was out of range. Unfortunately, it was
tracking the maximum number of IRQs supported by the mode, not the
number of IRQs which were allocated during the SetMode operation.
Fix this.

Change-Id: I404071af6bd2f3d8999cf9d5c8474d8b9c3771a3

[pcie][c++] Continue conversion to C++

This time, turn pcie_(device|bridge)_state_t into Pcie(Device|Bridge).
The process of turning these structs into proper C++ classes is not
quite complete yet, but it is close. There are some surface area
issues (exposing too much internal state) which still needs to be
cleaned up. The areas where some further cleanup is needed
include...

1) Capability parsing.
2) Refactoring code so that PCI device tree roots are not modeled as
PcieBridges.
3) Legacy IRQ pin swizzling and handling.
4) Debug console code.
5) MMIO/PIO window allocation.
6) Bus topology locking (hot plug/unplug)

Still, the major objects in the system are mostly well behaved classes
now. This code should be landed soon in order to allow concurrent
development without having a huge style refactor looming over
everyone.

Change-Id: Ib880c9690f2554aaf23823c1ccf891fead03b71b

[pcie] Rip out kernel mode pcie drivers.

Get rid of the concept of kernel mode pcie drivers. Start to lay the
groundwork for re-defining the concept of "claimed" in order to allow
user mode code to hold multiple references to a PCI device, at most
one of which may have the device claimed at any point in time.

Change-Id: I7596de831f40feca6f846c5f78d5f9283a673abc

[pcie] Continue init refactor.

Continue to break initialization steps into smaller, separated tasks.
Specifically...

++ Platform support (mostly support for legacy and MSI IRQs) is now
provided via a platform implementation of an interface class which
*must* be supplied at driver startup time.
++ ECAM regions (memory mapped config space) may be supplied
independently via successive calls to the bus driver's
AddEcamRegion method.
++ Start() has been replaced by AddRoot(uint bus_id). Currently, this does
exactly the same thing that Start did (only one root is allowed,
and it must be bus id #0), but it is moving in the direction of an
interface which will allow us to add multiple roots when the
internal implementation is ready for it.

Change-Id: I4bdc344a9ea7493252970dae4bbe1a1b6a036435

[pcie][c++] Continue PCIe bus driver migration to C++

++ Turn the core driver state into a proper class.
++ Bring up the core driver state earlier in platform init.
++ Turn almost all of the mutex/spinlocks in the system into their C++
Mutex/SpinLock auto-initializing wrapper equivalents.
++ Convert almost entirely to using AutoLock/AutoSpinLocks and get rid
of most of the "goto finished" instances in the system.

MG-311 #comment Progress, converted bus driver into a class. Eliminated many gotos

Change-Id: I6d3a116e7bbcfdd16127d13e344a24d86dddfe7d

[pcie] Add some safeties to legacy IRQ handling.

++ At startup time, disable discovered devices' legacy IRQ using the
PCI command register. Early init devices are not allowed to use
legacy interrupt (how would this even work?)
++ Do not unmask a top level shared legacy IRQ until there is at least
one device on its list which want to use it.
++ Mask any top level share legacy IRQ as soon as its list of
registered devices becomes empty.

Change-Id: I9fd33a38f28df239dd754ed2840f4af778fc9380

[pcie] Preserve BIOS BAR configuration when possible.

Attempt to preserve a BIOS or bootloader supplied bootloader
configuration when possible.

Note:
++ Bridge configuration needs to be supplied by the BIOS and
compatible with the available IO ranges supplied by ACPI. If they
are not, the bridge and all downstream devices will be disabled
(for now). See MG-324
++ Devices which have been fully configured by BIOS, and which have
configurations which can be preserved (no conflicts) will have
their command register left alone until user mode device drivers
have a chance to claim the device. This is to allow early-init
code to keep using the device IO ranges, even though they have not
formally claimed the device via the PCI framework. As soon as the
device is claimed by a user mode driver, however, its windows will
be closed. At this point, it is the driver's job to manage the
handoff between any early-init system. If the driver fails to take
control of the device, the device will be functionally disabled.
++ If a bootloader supplied configuration is unsatisfiable, the bus
driver will attempt to dynamically allocate IO windows, but the
windows will be immediately closed and not re-opened until a device
driver takes control.
++ If a device's configuration cannot be satisfied, either statically
or dynamically, it will be put into a "disabled" state. The device
will still enumerate, allowing user mode code to know the device
exists and to inspect its config space, but no resources (IO
windows or IRQs) will be available for the device.

MG-55 #done
MG-57 #done
MG-269 #done
MG-320 #done

Change-Id: I45a8703a0393e4e7bc0538afa1a89598e7c0aab8

[pcie][c++] Make progress on conversion to C++

++ Make pcie_bridge_state_t derive from pcie_device_state_t
++ Convert almost all malloc/calloc/frees to new/delete
++ Convert most dynamically allocated raw pointers to managed pointers

MG-311 #comment Conversion to managed pointers mostly complete.

Change-Id: If1a88ad8a64c4cc481dbb0f6d60df1af538dc831

[pcie] Convert PCIe bus driver to "C++"

Note: this does not actually convert the driver to full on C++, it
just switches to building with the C++ compiler and deals with some of
the annoying differences between C++ and C compiler.

In the short term, this will give the PCIe bus to ability to use other
library code which is written in C++. In the longer term, other parts
of the driver can be converted (as appropriate) to take advantage of
some of the nicer safety oriented things which can be done with C++'s
stronger stance on type safety.

MG-311 #comment Initial conversion started. Code compiles with g++

Change-Id: If7c9fe98734ddfd64d587a6f73bc2ea6a515f6db