[kernel][pci] add support for prefetchable mmio regions behind bridges

Add another allocator per bridge to track prefetacble memory regions.
Tends to be used by physical graphics cards for map their framebuffer.

It appears that it's safe for bridges with prefetchable mmio regions
to allocate from the root bridge's mmio space, since the root bridge
does not seem to be populated with separate prefetchable memory regions
from ACPI on x86.

Change-Id: I3e664d66757478cef218c579cd5b5b0a2a564d19

[kernel][pci] add a Dump() virtual for pci devices to print some info

Change-Id: I5140715d7c37701322ed8dd14ba3febf8e70b6a2

[kernel][pcie][status] Use zx_status_t

Change-Id: I358be7e0a47a235ad489d1cfa52fde2606204df3

[kernel][vm] move vm.h to the new spot and remove some unused code

Change-Id: I69f1b804fb95dd44e3e0619943e8809519aa82ca

[kernel][headers] Remove some unused includes of <list.h>

Change-Id: Ie9f8c905eb0f40805d8fc73b05b08ecb26f8733f

[zx] Rename bug references from MG-nnn to ZX-nnn

Change-Id: I07b0ee32bd7e8cc08e344896352c156b3b420349

[zx] Magenta -> Zircon

The Great Renaming is here!

Change-Id: I3229bdeb2a3d0e40fb4db6fec8ca7d971fbffb94

[zircon][mxtl->fbl] Rename mxtl to fbl

Change-Id: Ie21b6498e1bfb0a7fa0315e40b9e5c3ee78646be

[kernel] Make kernel always use mxtl:: for Mutex/AutoLock

No functional changes, just makes everything more consistent.

Change-Id: I9bba8630e79d6d9f1c1bdacc595cdbfc97cf75ba

[mxtl][mxalloc] Redirect all clients of mxalloc to mxtl.

Change-Id: Ib6d88937212ab23612f59add8bd028862308ead5

[cleanup] Replace ";;" with ";" in a few places

Change-Id: I377eba5a2f7633dc5dffecb532d9cf44927c85a6

[kernel][dev] Use the new MX_OK and MX_ERR_* names

Change-Id: I8a280c31fdaedf7476c02f3b5ea8d0b473bf7979

[mxcpp][mxalloc] Split mxcpp into mxcpp and mxalloc

mxcpp used to provide three things.

(1) is a very minimal C++ runtime environment. This means essentially
the definition of __cxa_pure_virtual, which is a function the compiler
expects to have ambient. This functionality is necessary for code
written in environments which cannot link the standard library (the
kernel and a handful of initial userspace processes).

(2) is the definitions of the standard new and delete
overloads. Again, these are needed for code that wants to call them
but to not link the standard library, but this time only in userspace
(the kernel does not want certain behavior stemming from the standard
overloads). The behavior is slightly different than the standard ones
in failure cases, but not in a way particularly interesting to the
rest of this email.

(3) is the userspace version of our special AllocChecker new
overloads. This mechanism exists for kernelspace, where allocation
failure is real and needs to be handled. This mechanism works
perfectly well in userspace, in that it compiles, even though the
underlying allocator is unlikely to ever return nullptr. It's
therefore essentially harmless in userspace. A handful of small
libraries are used in both userspace and in the kernel, and also use
this mechanism. Note that this feature is essentially copy-pasted
between the kernel and userspace.

This all works perfectly well for the kernel.

Some userspace code also uses these mechanisms, as mentioned. As long
as the standard library isn't linked, there are again no issues.

But as soon as you want both (3) and std::vector, which is a
reasonable thing to want!, there are issues because (1) and (3) come
in the same static library. This causes link failures due to duplicate
__cxa_pure_virtual symbols. This issue is exacerbated by different
behavior in Linux, OS X, and target linkage, in terms of confusion and
it-works-on-my-machine sort of issues.

This patch splits mxcpp into: mxcpp, containing (1) __cxa_pure_virtual
and (2) only if in userspace, the standard new and delete overloads;
and mxalloc, containing (3) AllocChecker. mxcpp is mutually exclusive
of the standard library. mxalloc can be linked against both code using
the standard library, and against code using mxcpp.

This patch also deduplicates the AllocChecker between userspace and
kernel, and moves the InlineArray class into the kernel (its only
callsites are in the kernel).

Change-Id: Id42d5d019ee977d44d6cb89ce7ab6884f7a56cd1

[kernel][pcie][bridge] fix a typo in bridge PIO range detection logic

This seems to be a typo that generally trashes any ability for a bridge
to deal with PIO.

Change-Id: I2d335657494c1b6b646addcddb7655ee40f6500a

[mxtl] Remove reference-taking variants of AutoLock constructors

Change-Id: I3f2c3a6ff88a4004448e9e90668541203d1ff50e

[pci] PCI refactor for C++/PIO/MMIO

- Create PciConfig/PciMmioConfig/PciPioConfig classes for abstracting
out all PCI configuration reads/writes.
- Modify existing PCI codebase to not assume memory mapped MMIO address
space for all devices.
- Unify PCI device and bridge device types into a single entity
separated only by config register mappings.
- Update lspci command so it can properly show configuration data
whether a device is MMIO or PIO.
- Rework PCI Capabilities to use an object hierarchy and common
interface.
- Convert the remaining C interfaces in the PCI codebase to C++.
- Fix clang build.

Change-Id: Ia5b32f88f48ba317848befde853b9af9a489205d

[pcie] Refactor to add PcieRoot

Refactor PcieBridge so we can model PCIe roots as objects which manage a bus and
have children, but are not devices. Specifically, there is now a
PcieUpstreamNode class which manages children, and is a base class for PcieRoot
and PcieDevice. "Having children" is implemented by UpstreamNode, "Being a
device with children" is implemented by PcieBridge, and "Being a non-device with
children" is implemented by PcieRoot.

Next steps
++ Get rid of the root_complex_ singleton member of the bus driver. Replace it
with a collection roots.
++ Move the management of legacy IRQ swizzling out of the PciePlatform class and
into the PcieRoot class. Swizzle behavior is platform specific, but also
specific to the traversal of a specific root. When the platform adds roots
to the driver, the swizzle behavior of that specific root should be provided.

Change-Id: I62118429632eb30a827f50b49df737eda0f4f693

[pcie][c++] Continue conversion to C++

This time, turn pcie_(device|bridge)_state_t into Pcie(Device|Bridge).
The process of turning these structs into proper C++ classes is not
quite complete yet, but it is close. There are some surface area
issues (exposing too much internal state) which still needs to be
cleaned up. The areas where some further cleanup is needed
include...

1) Capability parsing.
2) Refactoring code so that PCI device tree roots are not modeled as
PcieBridges.
3) Legacy IRQ pin swizzling and handling.
4) Debug console code.
5) MMIO/PIO window allocation.
6) Bus topology locking (hot plug/unplug)

Still, the major objects in the system are mostly well behaved classes
now. This code should be landed soon in order to allow concurrent
development without having a huge style refactor looming over
everyone.

Change-Id: Ib880c9690f2554aaf23823c1ccf891fead03b71b

[pcie] More C++ migration.

In preparation for turning pcie_(bridge|device)_state_t into proper
C++ classes, roughly partition existing code into bridge and device
specific cpp/h files.

Change-Id: If379a837efeab4b2a9f4f7eb92e6a1fc7f284b13