[iommu][intel] Beginnings of implementation

This provides a basic implementation of VT-d. It has the following
known limitations:

- No support for first level translation or requests-with-PASID
- Only supports 48-bit second level address spaces
- Currently performs identity-mapping only (i.e. acts more as a MPU
rather than an MMU)
- Performs synchronous IOTLB invalidations rather than using the
queued-invalidation feature.
- Does not support handing off across mexec

ZX-693 #comment

Change-Id: I6b2a7e49c5064065c2b6d06787bbd467fd666119