[kernel][crashlog] move away from printf callback

instead of piggybacking on the printf messages, we build a crashlog
struct with the relevant fields that we then serialize to string

DX-230 # step 1

TESTED=manual run of `k crash` on device (arm64 and x64) and manual inspection of logs upon reboot

Change-Id: I6019c85cbd0d71084d543667850dea30ac06ea93

[iommu][intel] Beginnings of implementation

This provides a basic implementation of VT-d. It has the following
known limitations:

- No support for first level translation or requests-with-PASID
- Only supports 48-bit second level address spaces
- Currently performs identity-mapping only (i.e. acts more as a MPU
rather than an MMU)
- Performs synchronous IOTLB invalidations rather than using the
queued-invalidation feature.
- Does not support handing off across mexec

ZX-693 #comment

Change-Id: I6b2a7e49c5064065c2b6d06787bbd467fd666119

[build][x86] Pass -malign-data=abi to GCC

Without this switch, GCC over-aligns data for bug-compatibility with
older GCC that did this though it was never supposed to.

TC-36

Change-Id: I4125efbb4e3b04dc4a4d39c782b1ce4e6d629fb5

[kernel] Use --emit-relocs to add self-fixups

SEC-31 #comment This applies relocations to the kernel.

Change-Id: I07b40308b768a56c889eeb9a9a89c0e897924617

[build] Remove the SafeStack configuration

SafeStack is now enabled automatically by the toolchain driver.

Change-Id: Ic4e3e437baf2fe3569385c46e328f7bdc62ffe0a

[build] Rename x86 project to "x64"

Build output will now be in build-x64 instead of build-x86
Renamed and updated various scripts as appropriate

Within zircon, $ARCH remains "x86".
This avoids having to rename kernel/arch/x86/ and change a lot of #include paths
Removed unnecessary $SUBARCH build variable

Renamed the kernel target from pc-x86 to pc, and the board name in boards.list
from "x86" to "pc".

Change-Id: I0eb44a21ba731653b92f3ce2b78a7819c0a8f61c

[kernel][timer] Calibrate TSC with paravirtualized clock

Adds some support for KVM/PV clock. Currently only calibrating the TSC
via the information in the system time struct. This allows the
hypervisor to host Zircon while nested in KVM without implementing the
PIT timer.

Change-Id: I63f0961112b56dd09b1bc893b74f2646d844d7aa

[run-zircon] Add --debugger to run-zircon

- Adds DEBUG_HARD to make-parallel. If true, the build
will be built with -O0 -g3
- Move GLOBAL_OPTFLAGS and MODULE_OPTFLAGS later in the gcc flag list
so that they can override GLOBAL/KERNEL/ARCH flags as necessary.
- --debugger will start qemu with a GDB stub waiting for
connection.

Change-Id: I7f2425ef1f4f55c83ecd2f0e50197777af466c23

[kernel][libc] printf(): Remove unused code for %f (floating point numbers)

Remove the code for handling %f and %a from the two copies of the
printf() implementation in the codebase:

* The kernel's copy (kernel/lib/libc/printf.c). In this case, the
"%f"-handling code was not being compiled -- it was conditional on
"#if !WITH_NO_FP", but kernel code was compiled with WITH_NO_FP set
to 1. We can also remove some related test code.

Note that using the double and float types is generally not allowed
in kernel code anyway (see docs/kernel_invariants.md).

* The bootloader's copy (bootloader/lib/printf.c). This was being
compiled in, but was not being used. (I checked that the
bootloader still works with this removed.)

Change-Id: Id3e7730ef66ce9d6e5f2f95e77625f33d8ddcb05

[x86][mmu] Move the MMU code into a library

In the near future, there will be a user of this that is not the
logical CPU (VT-d).

Change-Id: I115ab92fb5730ac4575298e66f0d622cb8b4821e

[dev][iommu] Define an IOMMU API and a no-op implementation

This defines an initial version of the IOMMU API. It is not expressive
enough to handle devices that use PASID support (multiple address spaces
for a single device), but ideally covers all other uses.

ZX-693

Change-Id: I8fbd17a2857e0e8be156c9c59073398a937de107

[kernel] remove MEMBASE and some other unused variables

Change-Id: I6e644de42f84b3a25e6e6e9697c32fabcedaa0d5

[x86][suspend] Save registers in preparation for resume

ZX-1184

Change-Id: Iae2f2c46f731e987ceee19b9984aa735d6e27db2

[dev][intel-pm] Intel Performance Monitor support

First pass.

Change-Id: Iede25087ac3c460c685d6b487eee0a830a03efec

[kernel][arch] remove KERNEL_LOAD_OFFSET from the kernel link address

-ARM64 kernels are now linked to run precisely at -4GB with no load
offset baked into the address.
-bake KERNEL_LOAD_OFFSET into KERNEL_BASE for x86 so that the initial
mmu table setup still works.
-remove PHYS_HEADER_LOAD_OFFSET which is no longer used

Change-Id: I33b293653346afbfc9aeaae5d2a433ef3a4be0b1

[kernel][x86] Build kernel code with -fPIE

Build x86 kernel as position-independent without any relocation for now.
The RELRO candidate special-case sections must be hand-placed in the
linker script to avoids "orphans" placement logic putting them into the
data segment but before the __data_end symbol.

SEC-31 #comment This resolves the code-generation and link layout issues.

Change-Id: I9428a989f8504ad8f3e690ebb8e373ffc2e2e726

[kernel] Consolidate kernel linker script

There is much more that's the same than that's different between
the architectures. Maintaining a single linker script that works
for both is easier than keeping two in synch.

Change-Id: I0655919e3f7dc5f8788d47bbe733f444c87ec97b

[kernel][x86] Remove arch/x86/64/ subdirectory

Zircon only supports x86-64.
The historical subdirectory split just makes it harder to find all the code.

Change-Id: I7c828660bd1d4d277718aa74f35a3fab5f2333ea

[kernel][code_patching] Do code_patching as an init hook, earlier

Don't depend on kernel/lib/code_patching from kernel/vm, only
from kernel/arch/x86, where it's actually used. This avoids
the possibility of an empty patch list, necessitating __WEAK.
Apply the patches much earlier via an LK_INIT_HOOK. This means
patches can be applied to code that runs earlier. There's no
reason to delay it.

Change-Id: I797ed23b5d7ca165778eaec4caa6896d0b5940af

[arm64] Build code as position independent

Build arm64 kernel as position independent without any relocation for
now. This change is straightforward on arm64 as everything is relative
and GOT usage is already limited.

Disable PIC only for x86_64 until the next commit. Also add a hidden.h
to enforce default hidden on all symbols.

SEC-31
Change-Id: I9ce4fcd33b9eddf817315f1329cff3c9c4842b8c

[make] add more files to GENERATED, clean up the x86 kernel.ld rule

Change-Id: Id3eab9aaa010e80e38a553442758a435710e52a7

[make] move the ENABLE_NEW_BOOTDATA switch logic into arch/x86 rules file

No functional change, just a bit of cleanup

Change-Id: Ia8075dbd4bd27a78bf06aed03ca011c4c5beaf39

[build] Set -march=x86-64 for x86

This is the baseline architecture we support on x86_64. We also
explicitly enable cmpxchg16b.

Change-Id: Ibcab3f29713b4c9448e6365c591170a0919d6828

[zircon][mxtl->fbl] Rename mxtl to fbl

Change-Id: Ie21b6498e1bfb0a7fa0315e40b9e5c3ee78646be

[kernel] remove extraneous #if checks for WITH_OBJECT

It's basically required now, so declare a dep on it and use the api directly.

Change-Id: I1febaf296cc51b9e016cc514bd7b7aa9c09d4829

[hypervisor] Invert build dependencies.

This allows us to depend on lib/magenta from lib/hypervisor, so we can remove
all of the WITH_LIB_MAGENTA defines and still build cleanly with the -test
targets.

Change-Id: I7a54c2ae4d812213a21ff67b963626a65879b2ea

[kernel][mxtl] Clean up some dependencies of mxtl::count_of

This adds both explicit includes of mxtl/algorithm.h, and module
dependencies.

Change-Id: I3b102a42df56c982b9c2c8913d8151c9c66198b6

[x86][pc] Implements mexec for Intel x86 PC

Change-Id: Id257568884e91056bbaab64d8d4650ddfd49ddda

[kernel][build] Emit .debug_frame instead of .eh_frame

Alas on our GCC this is (currently) not possible. MG-62
For now we're not getting either .eh_frame or .debug_frame (.eh_frame gets
discarded due to -gc-sections).
This is mostly ok for now as we compile with -fno-omit-frame-pointer.

MG-870 #done

Change-Id: I1637c014d188b80beec74f6ba8c9237c10ffb3d5

[hypervisor] Restructure around VCPUs.

This changes the structure of the hypervisor to be modelled around
virtual CPUs. Each VCPU is associated with a thread and a CPU, in
order to increase performance and simplify communication with user
space.

While the kernel-side of the hypervisor has been restructured, the
user space-side has not been modified to take advantage of the
optimisations that are possible. This will come in a follow up CL.

Change-Id: Ic0c9be724f12c9de601fc4b892d74ba224b0d85e

[x86][kernel][timer] Separate timer freq lookup

On modern x86 chips we can determine TSC frequency by inspecting the
CPU (without calibrating). This is useful for timing during early boot,
before our virtual memory manager is online.

To access the timer before the VM is up, on x86:

uint64_t tsc_freq = x86_lookup_tsc_freq();
if (tsc_freq) {
// Note: you might want to add e.g. cpuid() before/after rdtsc()
// for serialization purposes.
uint64_t timer_nanosecs = rdtsc() * 1'000'000'000 / tsc_freq;
}

Change-Id: I434a9acd92e6ec59fc5f6fd9690d8e232ccbbfec

[build] Consolidate Clang --target option setting via CLANG_ARCH

The arch rules.mk just sets CLANG_ARCH. Using $(CLANG_ARCH) for
--target=$(CLANG_ARCH)-fuchsia is in common code.

Change-Id: Ie4131e00bb73d3f92683cf7d5439789f7508ea03

[kernel] add command to enable HWP

'hwp enable' enables HWP with default parameters. 'hwp hint'
sets a hint to bias for performance or energy efficiency. (0-255)

Change-Id: I1a067a30ee1093784272842c46833ec6cc63d201

[kernel][timer] Remove non-dynamic timer from magenta.

MG-821 #done

Change-Id: I3e22dcfb4f72a702198c516be31f98037fdbdf60

[kernel][arch][x86] Revamp stack-protector/safe-stack early setup

This moves the setup of the boot CPU's x86_percpu in %gs.base
into assembly and the most basic initialization of its x86_percpu
into a compile-time static initializer. This makes it possible
for all the C code on the startup path to use safe-stack and/or
stack-protector (which gets harder and harder to avoid with LTO).

Now the only C function that runs at all is x86_secondary_entry.
The work it does to discover its CPU number (and thus the right
address for its own x86_percpu) is too complex to do in assembly.
Instead, x86_secondary_entry is split so that the first C
function run on secondary CPUs is a simple one that manages to
avoid stack-protector/safe-stack code, and it sets up %gs.base
and enough of x86_percpu that it can then call the second C
function and that function can safely use safe-stack and/or
stack-protector code.

Change-Id: If8f0860a05a0bd98285a15d0f2f97699bf16d9d7

[kernel] remove the WITH_SMP flag

Always build the kernel with full SMP support.

Change-Id: I105f8e4127a93113c795ae80e1dc4d4b0d43abe8

[docs] Fix references to docs/sysret_problem.md

The files docs/magenta/* were moved to docs/* a while ago.

Change-Id: I2c292c5603e71cb4c4c7570749b7a3b9a12d0f51

[hypervisor] Move APIC and EPT handling to user-space.

This means that the local APIC, IO APIC, and all related instruction
decoding moves to user-space.

Change-Id: I4c2dfd306dc5d30bb404f06e9fc9174101e472b6

[syscall][kexec] Implements mexec syscall.

Change-Id: Icc8a31f73521fef21ac3cbb1da3d3ef1286fb621

[hypervisor] Initial IOAPIC handling.

This setups up the following:
1. EPT fault on IOAPIC address.
2. Guest linear to physical translation, for...
3. Instruction decode of IOAPIC access.

I'll expand on this in further CLs, but I thought I should get the
foundation out first with the first couple of instructions being
decoded.

Change-Id: I62b8c2e0074ac257f4847064a4afa6614235cd3b

[hypervisor] Restructure VM exit handling.

Separate the VM exit handling code so that we can clearly specify the
interface for it and expand upon it.

Change-Id: Ica01c1c0c927ccabf690effbd82b5f1fbe353c5d

[kernel][x86] brute force rename arch/x86/* files from .c to .cpp

Change-Id: I8ec0a28f71a7d4d3eba4f022873e59dbbbd0bd1e

[make] add QUIET=1 option to the build to squelch all output

Change-Id: I57742bb6aa0ad1f0dc516c917dfecd65f6f65f43

[magenta] remove "zeropage" boot support

We boot via MultiBoot 0.96 or by our own boot header now,
and zeropage has been disabled. This removes it entirely.

Change-Id: I4de5b4f8b77fa26d339b5a95fe18dcf337121b93

[build] flatten the build

Previously we treated kernel/, system/, and third_party/ as
overlays on a shared namespace. This required the concept
of "canonical" module names, and a lot of complexity to ensure
that things didn't collide and the build worked.

This change gets rid of that, no longer passes -I to make,
so that include directives from our *.mk files do not magically
wildcard across various paths, etc.

The most user-visible change is that everywhere where a module
name is specified (MODULE_DEPS, MODULE_LIBS, etc), full module
names like kernel/lib/io or system/ulib/mxio must be used instead
of previously-allowed "short" names like lib/io and ulib/mxio.

The build output still has a similar shape, but the first segment
of the module path (kernel/, system/, or third_party/) is no
longer elided under $(BUILDDIR)

Change-Id: I525aba1da1c86eb7a86007bddc669f7eeebfedd5

[kernel][x86] Build x86 kernel with -fsanitize=safe-stack

Change-Id: Ifb0c51de5d0b5bd6a27b77a120759606de62ead7

[magenta] enable new boot path

We now handle >2GB memory under Qemu, so we should be able
to safely continue our switch to the new boot path.

Change-Id: Ib9ce2531630f71fec461f7938a517abaf557aca3

[magenta] default ENABLE_NEW_BOOT back to "false" for now

Qemu does not tell us about memory above 2GB in multiboot
mode for some reason. We'll have to figure that out for
people who need more memory before we default to the new
boot path.

Change-Id: I8f53dfadfdafdfee4e5cab03e508086667ece334

[magenta] enable new boot path by default

This causes magenta.bin to support booting via the Magenta Bootdata
or the MultiBoot v0.97 protocols. The old boot path was a hybrid
of Linux Zeropage + Magenta Extensions and MultiBoot 0.97, but the
latter was not capable of booting us with an external bootdata image.

Qemu already supports the MultiBoot path, and our local branch has
been patched to speed up ramdisk loading.

GigaBoot 0.5.1 (current version in Magenta) also supports the
new boot path.

If all goes well, the old boot path will be removed in a week or two.

Change-Id: I2a62282565c611f7152f84d2dfd4de870eea0036

[arch][x86] remove kernel x86-32 code and some top level defines in user space

Change-Id: Ib557acd8ca3dea4e7e8b60a29d1ced9d2343cbc8

[kernel] Move lib/hypervisor dep to arch/x86.

Change-Id: I85ffa469293b483d2724f6f132ac564bfea9dd8a

[multiboot][bootdata] support non-zeropage boot path

This functionality is gated behind ENABLE_NEW_BOOT
which is not defined in the default build.

When enabled, the Magenta kernel image is a multiboot +
bootdata image and does not use the legacy linux zero
page data passing mechanism.

Since Qemu passes the multiboot commandline and
modules (including the ramdisk) immediately after
the last page of the BSS, we need to carefully avoid
clobbering that with boot_alloc_mem(). To do so
arch/x86's mtrr init now uses a static data structure
(removing the only boot alloc that happens prior to
platform init), and the boot allocator has a simple
boot_alloc_reserve() which pc platform init uses to
inform it of the location of the ramdisk so that it
can shift its "heap" after it if necessary.

After pmm init, pmm_alloc_range() is used to preserve
the ramdisk, the same way we do in zero page boot.

Kernel is now built at 1MB instead of 1MB - 8KB
thanks to changes from travisg.

Change-Id: Iff5a7e1e5dd3133ca93ffb6ee3159c38fe910089

[magenta][hypervisor] Add logic for host save and load.

With this, we can enter and exit from a guest, and see the reason for
VM exit. We save the host's state right before we enter into the
guest, and return exactly to that point when exit from the guest. The
return value of vmx_host_save is used to determine whether we are
initially saving host state, or if we are loading the host state back
after a VM exit.

Change-Id: Ia15148b43b131b418fbc69b01d59b3e32945f724

[magenta][hypervisor] Add beginnings of a hypervisor.

This does the very basic task of enabling VMX on each CPU. Next step is to
setup MSRs and to launch into a VM.

I'd like some early feedback before I dive too deep. A lot of this is subject
to change as we learn more, and iterate on the implementation.

Change-Id: Idce0d36d73e9a3be8e607f6c9b1a29597cfc4f51
NOTE: Only Intel CPUs are currently supported.

[kernel][make] move WITH_NO_FP define into KERNEL_DEFINES instead of command line

No functional change, just an itch to scratch.

Change-Id: I20abf227752567d04c08accba03295f794c55090

[kernel][x86] First pass as Intel PT support

Intel PT (Processor Trace) is a h/w based instruction tracing
feature. See Intel Vol. 3 chapter 36.

This is the low level kernel support:
- support for reading/writing the PT MSRs
- support for starting/stopping full system traces
(tracing all cpus, regardless of thread running)
- logging of cr3->pid values for later post-processing of the trace

Support for tracing specific threads to follow.

The rest is in user-space driver "intel-pt".

Change-Id: Ib69a17e501a08dd6b0a661524cac9467d2d7f62e

Revert "[ulib][runtime] Use rdfsbase/wrfsbase for x86-64 thread register"

This reverts commit d798c04dafbbd95172606f9351bde4c914dcb3a3.

Reason for revert: There are qemu issues with using wrfsbase on some host machines.

Change-Id: I80e7ce3472ba164a5f81376b4813bae10f440b99

[ulib][runtime] Use rdfsbase/wrfsbase for x86-64 thread register

These new(ish) instructions allow access without kernel assistance.
The current qemu supports them, while the old one did not.

Change-Id: I08bf64069a807bd94bc7581d5e6a35c42dba54f0

[kernel] fix all the arches building without SMP support

Also allow setting the maximum number of cpus in the build system.
Reduce the default PC count to 8 from 16. Saves some memory, and
we're not (currently) going to be very efficient above 8 right now.

Change-Id: I61c7f3773977b8d1409c755baf4d24c9a9800af9

[build] Consolidate LIBGCC setting

The method for finding the compiler's runtime library is the same
for all machines and both compilers. Just do it in one place.

Change-Id: I5ba2f6299e200c6a321643b8558e8c6db886d381

[kernel] remove the no-vm path

Remove the no-vm build, which hasn't worked for quite some time. Cleans up
some clutter in some of the boot code.

Change-Id: Ia11c531c19d167538838a47f92e5d5c38d8fec71

[build][clang] Use -print-libgcc-file-name to find compile-rt path

Clang now supports -print-libgcc-file-name with compiler-rt, use
it find the correct path to libclang_rt.builtins library.

Change-Id: I38c9ca1d6bd1516ed6555476cbcfb587bb26d88f

[x86] Reduce cost of io bitmap on context switch

Change-Id: I23a1440d0b6920dab74ea3d4f95c528b21c1c601

[x86][ioport] Convert IO port bitmap code to C++

Change-Id: I3d27a27bc1d86b6cab6efbac091c549f75a7c940

[kernel][engine.mk] Turn on -fasynchronous-unwind-tables.

We now have libunwind (third_party/ulib/ngunwind) for backtraces
on x86_64, arm64. .eh_frame is still disabled for arm32 as we
don't support unwinding there, and the build currently fails
(libgcc issues?) if we turn on -fasynchronous-unwind-tables for arm32.

Change-Id: I0e67e46c32aeca1dc5a9bccc2604fec4ad327b8c

[kernel][x86_64] Remove -gdwarf-2, just use default.

The default in gcc is now dwarf 4 which has several improvements.

@ruffy:magenta$ l old-magenta.elf new-magenta.elf
-rwxr-x--- 1 dje eng 9745992 Oct 7 11:16 new-magenta.elf
-rwxr-x--- 1 dje eng 10156360 Oct 7 11:10 old-magenta.elf

Change-Id: I9374e8ea3aacd226863f79f6dd2ed7810e2aba67

[x86][mmu] Fix bug related to unmapping large demand paged regions

If a demand-paged region of size >=2MB was created, and it was not
aligned to 2MB, and it straddle a 1GB boundary, crashing without
mapping any pages into it would cause misaccounting to occur in
the MMU code, resulting in an assert firing.

The same misaccounting could cause pages to not be unmapped when
requested.

MG-315 #done

Change-Id: I7526eb370b4aba3671c87d78681018f62ba95e26

[make] move the linker garbage collect switch out of arch into top level make

Change-Id: Ie5fe2b435eba1574fe50998c3ece8815b584b567

[build] Use boolean flags to enable Clang

This is to match other flags used by the build.

Change-Id: Idd1c1714aff3d03dbc58b92a2cbe0ee0a75d8089

[kernel][x86] have the i386 build use the x86-64 toolchain

Change-Id: Ie481fddceb740ca66699115827aa9b4fc3c3dd50

[kernel][debug] beginnings of register r/w support

This provides two syscalls mx_thread_read_state,mx_thread_write_state
that can be used to r/w cpu registers.
It is built off of the idea of "register sets" (integer, floating point,
and so on) in common use at least in gdb.

Discussion of the ultimate name of these syscalls, and whether to
merge them with something else is being left until the raft of
dependencies relying on this code is ready.

Change-Id: Ic118a76292334dfeaa46278aaddca3140ed4441c

[x86] Add cmdline flag for disabling hyperthreading

Change-Id: Id67599649bb1488d8f64e79687c7c35209c34da5

[acpi] Reduce the amount of ACPICA built for the kernel

This also removes the suspend-to-RAM stub for x86, which broke
when we moved ACPI out of the kernel anyway.

Change-Id: Iece785ce429c11a00a1489340fc55d2e645b5b6f

[build] Remove support for fully-static linking

Everything links to libc (and libmagenta) dynamically now.
Fully-static linking is not supported at all.

Change-Id: I0c9dec52ee1bc7b360dd9127370b63be71a96d4f

[x86][suspend] Implement basic suspend-to-RAM

This is very early support. Most hardware is not being restored.
Currently only the following devices are reinitialized:
- bootstrap processor Local APIC
- Secondary CPUs
- Serial console

Change-Id: I7bde20031fd0cc460919f3e2e5b4dcd0b4e40f4d

[x86][registers] Rework extended register saving

This patch adds support for using xsave/xsaves to save register state.
It removes support for the optimization previously in place for
reducing FPU state saving, due to the xsaves/xsaveopt support making it
unnecessary. We could keep the optimization around for older hardware,
but it adds complications to the logic in order to support hardware
that is likely out of our scope of concern.

This patch additionally introduces support for using the YMM and ZMM
registers.

This patch supports the following configurations, in order of
preference:
- xsaves support
- xsaveopt support
- xsave support
- fxsave support only
- No fxsave/xsave support

Change-Id: I8cb4fe6cff00f8a0fe3644de4ab425a22f1cae15

[build] Use GLOBAL_LDFLAGS for ld -shared too

It turns out that --gc-sections works just fine with -shared (it takes
each exported symbol as a root rather than just the entry point). So
there is no problem using GLOBAL_LDFLAGS for that case too.

Change-Id: Ifadbe2c443407ff6914bfd1b9d45e1f18c2bc3be

Revert "[x86][registers] Rework extended register saving"

This reverts commit 555b6fcb36c9b6677c98b3fb50409db81917bbc6.

Change-Id: I5af15db99074b78574ad4c7888c2e179af5b55c6

[x86][registers] Rework extended register saving

This patch adds support for using xsave/xsaves to save register state.
It removes support for the optimization previously in place for
reducing FPU state saving, due to the xsaves support making it
unnecessary. We could keep the optimization around for older hardware,
but it adds complications to the logic in order to support hardware
that is likely out of our scope of concern.

This patch additionally introduces support for using the YMM and ZMM
registers.

This patch supports the following configurations, in order of
preference:
- xsaves support
- xsave support
- fxsave support only
- No fxsave/xsave support

Change-Id: Idace1428ff62ff94df2ae4a5a2dda5a0ec5cf72f

[build] Support MODULE_LDFLAGS, and USERLIB_SOLDFLAGS

The default ld -shared rules want some more ld options.
These go into USERLIB_SOLDFLAGS.

Some modules might need per-module ld options.
These go into MODULE_LDFLAGS.

Change-Id: I645c3c736c301718c5376f02b702220f42d6d7aa

[kernel][build] remove IS_64BIT #define, replace with _LP64

Change-Id: I35bfdf5ba241f84b54cb9d49bd928bf6a7099a08

[build] move some LK #defines into kernel space only and switch user space code to using compiler builtins

The user space ones that were specifically switched was
ARCH_* -> __x86_64__ (and friends)
IS_64 -> _LP64

Change-Id: Ide84907cbf7ae80e27b605454514fe06a604168d

[kernel] compile the kernel using -fno-pic on all architectures, not just x86

Change-Id: Ice4a64bf511cfce7405c99c87ff1082046b3abbd

[build] build shared libraries and separate crt1.o

- shared libraries are a work in progress, this change provides
the core build machinery to support them
- user library modules that declare a MODULE_SONAME cause a
shared library to be built
- user apps and libs may use MODULE_LIBS to depend on shared
libs and MODULE_STATIC_LIBS to depend on static libs
- MODULE_DEPS is currently converted to MODULE_STATIC_LIBS
- libc is arranged to build a separate shared version but
that is disabled at the moment due to build error
- all of userspace is being build -fPIC for the moment
- libruntime and libmagenta are configured to generate shared
libraries
- make the x86 -fno-pic only apply to KERNEL_COMPILEFLAGS

Change-Id: Iccebe078ad18069a97173228d1476a5e95a2b879

[make] clean up a bad variable addition in the clang path

preinitialize another variable to make the unused variable warning go away.

Change-Id: Id7cf9ab2980bf16e42d17abfe2bffb00e1eb07df

[build] Use Fuchsia triple when building with Clang

This is to ensure that the object files produced by the compiler
have the correct ELF header using Fuchsia as OS/ABI.

Change-Id: I994c67e72f549be3b6534cf7b00f3c582ef1eb06

[x86-64] Avoid problem with SYSRET on non-canonical addresses

Disallow mapping a page immediately below 0x0000800000000000 so that the
syscall return address can't be non-canonical. See the note I've added in
this change for more details.

Change-Id: Ic90e0fedf3ef3612e4b44a464d43cf75e47e169a

[make] split the master config.h file into global_ kernel_ and user_ configs

Split most of the build-system-set #defines into their corresponding bucket,
which should reduce the amount of extraneous rebuilds by a bunch.

WITH_* defines are now limited to kernel space only, for example, so modifying
what user space apps are build shoudln't force a full rebuild like it does now.

This also stops leaking of a lot of kernel configuration out into user space.

*_ASPACE_BASE and *_ASPACE_SIZE seem to be used in at least one place, however,
but it seems pretty benign.

Change-Id: I4d9d68a7446cd6dd13348f0fbf8821e7894248dd

[magenta] Initial commit