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43a2366a |
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02-Sep-2018 |
Mike Krinkin <krinkin@google.com> |
[hypervisor][time] Add support for KVM CLOCK_PAIRING hypercall The hypercall allows to provide the guest with mapping of tsc to wall time at some moment in time, so in the way it's the same as boot time provided by pvclock. Hypercall itself is not particularly interesting, but linux calls it when kvmclock based PTP clock is enabled in the guest, which happens for default debian_guest kernel for example. However, since hypervisor doesn't handle VMCALL exits it fails. In general we should not stop hypervisor on VMCALL VM exits, instead we should return error to the guest indicating that hypercall is not supported. Test: buildall, manually run debian_guest on Intel NUC MAC-158 #comment In Progress Change-Id: I79c28df80a23df6bcda8737305e6a6b169b67d78
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2fa37991 |
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30-May-2018 |
Alex Legg <alexlegg@google.com> |
[hypervisor][x86] Remove sysenter MSRs from guest and host msr pages These MSRs are stored in the guest and host state so they're not needed here. Also, ignore upper 32 bits of rcx for msr handling. Change-Id: Ia70980dbed920e71dffb75badfc80fecb7f9b58d
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a8e03d2d |
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05-Apr-2018 |
Tomasz Wiszkowski <ender@google.com> |
[hypervisor][x86]Handle LVT Thermal Sensor and CMCI MSR These MSRs appear to be accessed by Linux Kernel 4.9, and lack of support causes kernel panic during early boot process. Change-Id: I29907dde592463e864aff0de012c8d22ff777961
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87b543ef |
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18-Mar-2018 |
Abdulla Kamar <abdulla@google.com> |
[hypervisor][ktrace] Add VCPU blocking events Add ktrace events for when the VCPU is blocked while either waiting for an interrupt or waiting for a port packet to become available. This also restructures the way we record metadata for VCPU ktraces in order to be more efficient. PD-100 #comment Change-Id: I43551a0068bb3d6393a9a58c21b3ea813edfb726
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8f0fa6e1 |
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15-Mar-2018 |
Abdulla Kamar <abdulla@google.com> |
[hypervisor] Add ktrace to VCPU Add tracing of VCPU enter and exit, as well as VM exit reasons. Change-Id: Iad8c544219f8e2a5da8fd33a0868717a2634879d
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cf09a8b7 |
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06-Mar-2018 |
Alex Legg <alexlegg@google.com> |
[x86][hypervisor] Mask CR0.NE and handle writes to CR0 Linux writes values to CR0 that are incompatible with VMX on secondary processor start-up. Here we mask CR0.NE, which is the only bit that we need to keep set on secondary processors, to cause a VM exit on writes to CR0 that don't set NE. The downside of this is that we need to manually handle the CR0 write including entering long mode when the guest sets CR0.PG and EFER.LME. Change-Id: I3acc0c01b938de6f52e57f2fd4bc476c7b7ce185
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a6622a2c |
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20-Feb-2018 |
Alex Legg <alexlegg@google.com> |
[hypervisor] Expand VCPU packet to include all IPIs. Also handle FIXED IPIs from the guest on x86 by constructing a packet. The changes to the packet should be compatible with SGIs on ARM. This change breaks Garnet, a patch at that layer will follow. Change-Id: I661dbf650624df8449ebabe0fe9e34b65275712a
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35c1acbe |
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15-Feb-2018 |
Abdulla Kamar <abdulla@google.com> |
[lib][hypervisor] Move everything into a namespace Move everything, but vmm_guest_page_fault_handler, into the hypervisor namespace. Change-Id: Ied96a7945b26c4a1ed24c03b293d42c7d89e7812
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1fea96d1 |
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30-Jan-2018 |
Mike Krinkin <krinkin@google.com> |
[kernel][hypervisor] KVM clock support in hypervisor KVM/Xen paravirtualized clock API consists of monotonic clock source (we refer to it as system time) and fixed point in time (we refer to it as boot time), and boot time + system time should give current wall time. Since system time is supposed to be monotonic it means that boot time may be adjusted (for example, by NTP) and therefore we use sys_get_clock to get boot time. System time is exported per VCPU and periodically updated by host. TSC is used to adjust system time value in the guest between those updates. We update system time on VCPU resume. Getting system time in the guest is expected to be fast, but boot time on the other hand is not expected to be fast and only guaranteed to be updated by host after MSR write from guest and therefore incurs vmexit. Despite the name boot time doesn't need to be guest boot time. In KVM it's actually host boot time and we use the same boot time for this implementation. And one comment regarding naming. KVM and Xen use the same structures layout for paravirtualized clock, but KVM uses MSRs to communicate with guests and Xen uses PV ops for that. So data strcutures are common and use prefix pv or Pv, while constants describing MSRs and KVM specific flags use Kvm prefix. Change-Id: I81cdbd893985ad17bcf5f163e652ec1bb63feacb
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bba4e0d5 |
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18-Jan-2018 |
Tim Detwiler <tjdetwiler@google.com> |
[x86][hypervisor] Add additional vmexit logging. Change-Id: I0fbc3a579fd9610521aeaa180be09f4b45492c6a
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0cefa2db |
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01-Jan-2018 |
Alex Legg <alexlegg@google.com> |
[hypervisor][x86] Add VCPU packet type Capture START_UP IPIs and forward the instruction pointer and APIC ID to userland so it can bring up another VCPU. ZX-1246 #comment Change-Id: I624d87eb6031492dc7125750e28de7c4a1c1662c
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e6305d5e |
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10-Dec-2017 |
Alex Legg <alexlegg@google.com> |
[hypervisor][x86] Add X2APIC support and pretend to be KVM. Linux doesn't support X2APIC without IRQ remapping unless it recognises that it's running as a guest. For now we can pretend to be KVM to trigger hypervisor detection. ZX-1257 #done Change-Id: I66094b65f4299c5a6a51eab8ce24f419e05d23f7
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a053e78d |
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30-Nov-2017 |
Abdulla Kamar <abdulla@google.com> |
[hypervisor] Refactor common interrupt logic Introduce interrupt_tracker, so that we can share common interrupt tracking logic between arm64 and x86. Furthermore, this improves interrupt handling on arm64, bringing it up to the same level as x86. We also now inject the timer interrupt correctly on arm64. Change-Id: I09c4d37667b9e7c14831400875bc972df64f97de
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a72fde74 |
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08-Nov-2017 |
Abdulla Kamar <abdulla@google.com> |
[x86][hypervisor] Cleanup ExitInfo debug output. Minor cleanup for consistency. Change-Id: Id92c90914201a997385826c758298cb6fcd8152c
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7866c730 |
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05-Nov-2017 |
Abdulla Kamar <abdulla@google.com> |
[x86][hypervisor] Inject interrupts on VCPU resume. If there are interrupts pending, inject them at VCPU resume instead of waiting for an EOI. This also corrects the situation where we are executing on the same CPU as the VCPU when we issue an interrupt. Without this, the interrupt processing would be delayed until an EOI was seen. ZX-1340 #done Change-Id: I4dabbc616a8750190a424948982b0e1b0b911b5e
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02d64dce |
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24-Oct-2017 |
Abdulla Kamar <abdulla@google.com> |
[x86][hypervisor] Cleanup some tiny nits. We should settle on using single-line comments. Change-Id: I971eef3ec51570496a88e92aed73d7413120a8c0
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7e66a588 |
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24-Oct-2017 |
Abdulla Kamar <abdulla@google.com> |
[x86][hypervisor] Fix present-bit in page fault. According to the Intel SDM, bits 3 to 5 of the EPT violation exit qualification indicate whether the PTE marked the page as read, write, or execute, respectively. There is no bit to indicate whether the PTE was present. Since we now require that all traps be set explicitly, we can additionally early-exit if there was no trap associated with the access and it is outside guest physical address space. Change-Id: If2c2ec93b6972f7b03b9667518cf76878c89a1fe
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dd38127b |
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22-Oct-2017 |
Tim Detwiler <tjdetwiler@google.com> |
[hypervisor][x86] Fix exit reason decode on vmentry failure. Bit 31 indicates there was a VM entry failure and should not be included in part of the basic exit reason. This fixes the handling of vmentry errors. Change-Id: I779e6e05454300beede7e7b9c71cd2516bdcffcf
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24bf057e |
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16-Oct-2017 |
Mike Krinkin <krinkin@google.com> |
[hypervisor][x86] Enabled "ack-interrupts-on-vmexit" With this feature enabled if vmexit happens due to external interrupt CPU acknowledges the interrupt and provides us with vector number. We can examine this information and call the handler directly. ZX-1254 #done Change-Id: I4472fa037c731c1943b7c035e471523a2b70e46f
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b82931ec |
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13-Oct-2017 |
Abdulla Kamar <abdulla@google.com> |
[x86][hypervisor] Minor cleanups to x86 code. Change-Id: I076c1bfc3df3dfcd623d68dc6ed2a7a4a3522fe5
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7fb7213b |
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01-Oct-2017 |
Abdulla Kamar <abdulla@google.com> |
[lib][hypervisor] Rename PacketMux to TrapMap. This more accurately describes what it does, and makes more sense in the code. Change-Id: Iae0223645dbf4b399ce29e15e10a8d3eeb8d3cf5
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f3e2126c |
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12-Sep-2017 |
Roland McGrath <mcgrathr@google.com> |
[zx] Magenta -> Zircon The Great Renaming is here! Change-Id: I3229bdeb2a3d0e40fb4db6fec8ca7d971fbffb94
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8196f160 |
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25-Aug-2017 |
Abdulla Kamar <abdulla@google.com> |
[hypervisor] Replace all status_t with mx_status_t. As requested from a previous CL. (Also ran clang-format.) Change-Id: Ib4106f3c03f2084755c596062d34c8f72e42dcdb
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a81264ef |
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20-Aug-2017 |
Abdulla Kamar <abdulla@google.com> |
[hypervisor] Make guest traps use ports. Ports are a much better fit for the hypervisor than FIFOs. To take advantage of ports, we use our arena for PortPackets, rather than relying on the system-wide arena. This also allows us to easily wait and signal in response to packet availability in our own per-trap arenas. Change-Id: I8664f8438710e38abf96aefedc6ba446aaf04683
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1b583cca |
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17-Aug-2017 |
Abdulla Kamar <abdulla@google.com> |
[x86][hypervisor] Run clang-format over code. Run clang-format over x86 hypervisor code. Change-Id: I8616a2e5c4b3865bf9fdcac5627c833bc21bb39c
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ce8c0523 |
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20-Jul-2017 |
Abdulla Kamar <abdulla@google.com> |
[hypervisor] Restructure around VCPUs. This changes the structure of the hypervisor to be modelled around virtual CPUs. Each VCPU is associated with a thread and a CPU, in order to increase performance and simplify communication with user space. While the kernel-side of the hypervisor has been restructured, the user space-side has not been modified to take advantage of the optimisations that are possible. This will come in a follow up CL. Change-Id: Ic0c9be724f12c9de601fc4b892d74ba224b0d85e
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