History log of /fuchsia/zircon/kernel/arch/arm64/debugger.cpp
Revision Date Author Comments
# f2aaaf4c 19-Jul-2018 Corey Tabaka <eieio@google.com>

[kernel] Lockdep instrument the vm and thread_lock.

- Instrument the locks used by the vm.
- Instrument the thread lock and remainning core kernel code.
- Leaving remaining arch/lib/driver code for a later CL.

Bug: ZX-23
Test: k ut all and system/test/* pass + manual testing.

Change-Id: Ie3f6a27e81bcd1890d63f2fafda3ee233f7969ef


# 003f5def 15-Jun-2018 Francois Rousseau <frousseau@google.com>

[debug] add thread states for fs/gs registers

also delete previously introduced "extra regs" state

ZX-2258 # step 1

TESTED=None (these states are not used at the moment)

Change-Id: I80cf642b82187c209a0f43aeb10052d3ed87016f


# 159ff793 01-Mar-2018 Brett Wilson <brettw@chromium.org>

[debugger] Add thread state for FP regs and FS/GS

Adds FPU, vector, and "extra" states to the CPU states that can be
queried and set via zx_thread_read/write_state.

ZX-2101

Change-Id: Ic809077a62d963bab578ee76379deb0c1e0362c1


# a45c97a6 26-Apr-2018 Gurjant Kalsi <gkalsi@google.com>

[arm64][debugger] Fix bug with Single step

As per the ARMv8 manual D2.12.3, PSTATE.SS must
also be set to enable single step debugging for
a given process.

Additionally the OSLock must also be disabled as
per the ARMv8 manual D2.4.1: "If either the OS
lock or the OS double-lock is locked, debug
exceptions other than Breakpoint Instruction
exceptions are disabled."

So to fascilitate debugging on HW we also unlock
the OS Lock upon booting.

Change-Id: I436a58658150b0b6179620a9d7129cfa7d4db9df


# 95d3fcac 17-Apr-2018 Brett Wilson <brettw@chromium.org>

[kernel][debugger] Remove unnecessary frame checks.

The checks for a valid frame pointer were unnecessary since the frame is
never used in the debugger functions.

Change-Id: I9994912de06c7523cba6962a721b15010c6ed4cc


# efb63db2 28-Mar-2018 Brett Wilson <brettw@chromium.org>

[debugger] Set the single step flag in more places.

Previously the single step state would leak out of a thread and apply to
random threads on the system. This changes the single-step state from
being stored on the thread_t struct to always being stored in the
saved register context of the thread.

Change-Id: I72679c74ee6be4a77273e28463b3160f25daec5e


# 56aff58f 01-Feb-2018 Brett Wilson <brettw@chromium.org>

[debugger] Clarify thread state API

Firms up the contract for zx_read|write_thread_state and makes the state more
explicit for each platform.

The general register struct has been made for the current platform which
simplifies much fo the code.

The sizes are converted to size_t for consistency with other object calls.

Forwarding #defines and typedefs are included for downstream users until they
can be updated.

This will likely need to be revised somewhat again when we add more thread
states, which I plan to do in a followup.

Change-Id: I57e8e9979d073c8efdfaeb2683f9f83494d19abf


# e8cf9e2b 05-Jan-2018 Travis Geiselbrecht <travisg@google.com>

[kernel][arm64] clang format arm64 code

Change-Id: Id4b2123b16549c555db28bc878dde434f4dc5506


# 8e562ab9 25-Sep-2017 George Kulakowski <kulakowski@google.com>

[kernel][status][arch] Use zx_status_t throughout kernel/arch

Change-Id: I051aaaee84c6e7776b0054171f8d69320d812fcb


# e0fbf267 12-Sep-2017 George Kulakowski <kulakowski@google.com>

[zx] Rename bug references from MG-nnn to ZX-nnn

Change-Id: I07b0ee32bd7e8cc08e344896352c156b3b420349


# f3e2126c 12-Sep-2017 Roland McGrath <mcgrathr@google.com>

[zx] Magenta -> Zircon

The Great Renaming is here!

Change-Id: I3229bdeb2a3d0e40fb4db6fec8ca7d971fbffb94


# b4d2c9ea 27-Jul-2017 George Kulakowski <kulakowski@google.com>

[debugger] Remove 'priv' argument from arch_set_regset and up

This was always false, and in all implementations was ignored.

Change-Id: If23e701fe201a52f78b06f613799184250a83803


# 83ac4fab 10-Aug-2017 Mark Seaborn <mseaborn@google.com>

[kernel][arm64] Disallow reading/writing privileged CPSR flags via syscalls

Restrict mx_thread_read_state() and mx_thread_write_state() to
accessing only the NZCV flags on ARM64, matching what is accessible
via userland instructions. (Note that for ARM32/Thumb, some more
flags besides NZCV are accessible via userland instructions.)

Otherwise, userland can disable interrupts, which can make threads
unkillable or hang the whole machine.

MG-1002 #done

Change-Id: Iea60ab0503283839d6207b05ad5b30a0baf304e6


# bb16104c 15-Jun-2017 George Kulakowski <kulakowski@google.com>

[kernel][arch][arm64] Use the new MX_OK and MX_ERR_* names

Change-Id: I1e3a720d37f48c73356fadd0a1317b8ec249ceba


# 0ad360a7 26-May-2017 Doug Evans <dje@google.com>

[kernel][exceptions] Workaround until MG-747 is done

Otherwise we'll panic if registers are accessed while in
a suspended channel call.

MG-747 #comment avoid crash until done

Change-Id: Ia9929888ab49f35db5ccda0ea06cd2ef545d1149


# fc6e5621 30-Apr-2017 Doug Evans <dje@google.com>

[exceptions][arm64] Provide reg access when suspended

And unify suspended vs exception access to general regs.

Change-Id: Ic0a38ef7f303e671ab1338b61797d7ec3f9a0f00


# e456c977 18-May-2017 Doug Evans <dje@google.com>

[kernel][arm64] Rename some locals in debugger.cpp

Change-Id: Ibf9ac69b02d86e440ec8f56325dd3e5137435782


# e64f1122 24-Apr-2017 Travis Geiselbrecht <travisg@google.com>

[kernel][arm64] convert C code to cpp

First pass simple conversion from C to cpp

Change-Id: I17772141e829d137a52281c331515afa8fa12516


# 116ed79a 24-Apr-2017 Travis Geiselbrecht <travisg@google.com>

[kernel][arm64] mass rename arm64 files from .c to .cpp

No attempt to make them compile

Change-Id: If9eef1aded99e20b3046a387cdb29ef1dbe2e587