History log of /fuchsia/zircon/kernel/arch/arm64/cache-ops.S
Revision Date Author Comments
# 04169cb7 21-Oct-2017 Travis Geiselbrecht <travisg@google.com>

[kernel][arm64] read the icache and dcache line size at boot and use for cache routines

Previously was hard coded at 64. This should help us run on machines
with different sized cache lines.

Change-Id: I751d066278ecd8159142583bfa400a828021d50e


# 95c00b39 21-Jun-2017 Doug Evans <dje@google.com>

[kernel][asm] Replace END with END_FUNCTION/END_DATA

MG-870 #comment baby steps

Change-Id: I1f1c2698c58612926e2fcfab8cfaed95833b7497


# 9e93682a 06-Feb-2017 Travis Geiselbrecht <travisg@google.com>

[kernel][arm64] clean up some assembly a bit

Add size markings to some functions.
Remove an extraneous align in start.S that was wasting
some amount of memory.

Change-Id: I21b35f4fd51422518828c2df49b2368514d84750


# 12c2b825 09-Sep-2016 Eric Holland <hollande@google.com>

[aarch64][cache] Invalidate caches at boot

Change-Id: If24e3a55bec31738f0867d65a6d0b611e401efe8


# 53b9e1c8 15-Jun-2016 The Fuchsia Authors <authors@fuchsia.local>

[magenta] Initial commit