#
61e21613 |
|
27-Dec-2023 |
Colin Percival <cperciva@FreeBSD.org> |
x86: Adjust base addr for PCI MCFG regions Each bus gets 1 MB of address space; the actual base address for an MCFG bus range is the address from the table plus the starting bus number times 1 MB. The PCI spec is unclear on this point, but this change matches what Linux does, which is likely enough of a de facto standard regardless of what any de jure standard might attempt to say. Fixes: f54a3890b1f4 ("x86: Support multiple PCI MCFG regions") Reviewed by: jhb Differential Revision: https://reviews.freebsd.org/D43206
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#
f54a3890 |
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29-Nov-2023 |
John Baldwin <jhb@FreeBSD.org> |
x86: Support multiple PCI MCFG regions In particular, this enables support for PCI config access for domains (segments) other than 0. Reported by: cperciva Tested by: cperciva (m7i.metal-48xl AWS instance) Reviewed by: imp Relnotes: yes Differential Revision: https://reviews.freebsd.org/D42828
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#
9893a4fd |
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29-Nov-2023 |
John Baldwin <jhb@FreeBSD.org> |
x86: Refactor pcie_cfgregopen Split out some bits of pcie_cfgregopen that only need to be executed once into helper functions in preparation for supporting multiple MCFG entries. Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D42829
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1587a9db |
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29-Nov-2023 |
John Baldwin <jhb@FreeBSD.org> |
pci_cfgreg: Add a PCI domain argument to the low-level register API This commit changes the API of pci_cfgreg(read|write) to add a domain argument (referred to as a segment in ACPI parlance) (note that this is not the same as a NUMA domain, but something PCI-specific). This does not yet enable access to domains other than 0, but updates the API to support domains. Places that use hard-coded bus/slot/function addresses have been updated to hardcode a domain of 0. A few places that have the PCI domain (segment) available such as the acpi_pcib_acpi.c Host-PCI bridge driver pass the PCI domain. The hpt27xx(4) and hptnr(4) drivers fail to attach to a device not on domain 0 since they provide APIs to their binary blobs that only permit bus/slot/function addressing. The x86 non-ACPI PCI bus drivers all hardcode a domain of 0 as they do not support multiple domains. Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D42827
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#
fdafd315 |
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24-Nov-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Automated cleanup of cdefs and other formatting Apply the following automated changes to try to eliminate no-longer-needed sys/cdefs.h includes as well as now-empty blank lines in a row. Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/ Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/ Remove /\n+#if.*\n#endif.*\n+/ Remove /^#if.*\n#endif.*\n/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/ Sponsored by: Netflix
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685dc743 |
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16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: one-line .c pattern Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
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#
4d846d26 |
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10-May-2023 |
Warner Losh <imp@FreeBSD.org> |
spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch up to that fact and revert to their recommended match of BSD-2-Clause. Discussed with: pfg MFC After: 3 days Sponsored by: Netflix
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#
ed83a561 |
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01-Sep-2020 |
Mateusz Guzik <mjg@FreeBSD.org> |
i386: clean up empty lines in .c and .h files
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#
2a508645 |
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09-Apr-2019 |
Konstantin Belousov <kib@FreeBSD.org> |
pci_cfgreg.c: Use io port config access for early boot time. Some early PCIe chipsets are explicitly listed in the white-list to enable use of the MMIO config space accesses, perhaps because ACPI tables were not reliable source of the base MCFG address at that time. For that chipsets, MCFG base was read from the known chipset MCFGbase config register. During very early stage of boot, when access to the PCI config space is performed (see e.g. pci_early_quirks.c), we cannot map 255MB of registers because the method used with pre-boot pmap overflows initial kernel page tables. Move fallback to read MCFGbase to the attachment method of the x86/legacy device, which removes code duplication, and results in the use of io accesses until MCFG is parsed or legacy attach called. For amd64, pre-initialize cfgmech with CFGMECH_1, right now we dynamically assign CFGMECH_1 to it anyway, and remove checks for CFGMECH_NONE. There is a mention in the Intel documentation for corresponding chipsets that OS must use either io port or MMIO access method, but we already break this rule by reading MCFGbase register, so one more access seems to be innocent. Reported by: longwitz@incore.de PR: 236838 Reviewed by: avg (other version), jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D19833
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#
9a527560 |
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29-Jan-2019 |
Konstantin Belousov <kib@FreeBSD.org> |
i386: Merge PAE and non-PAE pmaps into same kernel. Effectively all i386 kernels now have two pmaps compiled in: one managing PAE pagetables, and another non-PAE. The implementation is selected at cold time depending on the CPU features. The vm_paddr_t is always 64bit now. As result, nx bit can be used on all capable CPUs. Option PAE only affects the bus_addr_t: it is still 32bit for non-PAE configs, for drivers compatibility. Kernel layout, esp. max kernel address, low memory PDEs and max user address (same as trampoline start) are now same for PAE and for non-PAE regardless of the type of page tables used. Non-PAE kernel (when using PAE pagetables) can handle physical memory up to 24G now, larger memory requires re-tuning the KVA consumers and instead the code caps the maximum at 24G. Unfortunately, a lot of drivers do not use busdma(9) properly so by default even 4G barrier is not easy. There are two tunables added: hw.above4g_allow and hw.above24g_allow, the first one is kept enabled for now to evaluate the status on HEAD, second is only for dev use. i386 now creates three freelists if there is any memory above 4G, to allow proper bounce pages allocation. Also, VM_KMEM_SIZE_SCALE changed from 3 to 1. The PAE_TABLES kernel config option is retired. In collaboarion with: pho Discussed with: emaste Reviewed by: markj MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D18894
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#
83ef78be |
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27-Nov-2017 |
Pedro F. Giffuni <pfg@FreeBSD.org> |
sys/i386: further adoption of SPDX licensing ID tags. Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
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#
4e421792 |
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16-Nov-2017 |
Konstantin Belousov <kib@FreeBSD.org> |
Remove i386 XBOX support. It is for console presented at 2001 and featuring Pentium III processor. Even if any of them are still alive and run FreeBSD, we do not have any sign of life from their users. While removing another dozens of #ifdefs from the i386 sources reduces the aversion from looking at the code and improves the platform vitality. Reviewed by: cem, pfg, rink (XBOX support author) Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D13016
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#
a1e1814d |
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22-Feb-2016 |
Svatopluk Kraus <skra@FreeBSD.org> |
As <machine/pmap.h> is included from <vm/pmap.h>, there is no need to include it explicitly when <vm/pmap.h> is already included. Reviewed by: alc, kib Differential Revision: https://reviews.freebsd.org/D5373
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#
ed95805e |
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30-Apr-2015 |
John Baldwin <jhb@FreeBSD.org> |
Remove support for Xen PV domU kernels. Support for HVM domU kernels remains. Xen is planning to phase out support for PV upstream since it is harder to maintain and has more overhead. Modern x86 CPUs include virtualization extensions that support HVM guests instead of PV guests. In addition, the PV code was i386 only and not as well maintained recently as the HVM code. - Remove the i386-only NATIVE option that was used to disable certain components for PV kernels. These components are now standard as they are on amd64. - Remove !XENHVM bits from PV drivers. - Remove various shims required for XEN (e.g. PT_UPDATES_FLUSH, LOAD_CR3, etc.) - Remove duplicate copy of <xen/features.h>. - Remove unused, i386-only xenstored.h. Differential Revision: https://reviews.freebsd.org/D2362 Reviewed by: royger Tested by: royger (i386/amd64 HVM domU and amd64 PVH dom0) Relnotes: yes
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#
af3b2549 |
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27-Jun-2014 |
Hans Petter Selasky <hselasky@FreeBSD.org> |
Pull in r267961 and r267973 again. Fix for issues reported will follow.
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#
37a107a4 |
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27-Jun-2014 |
Glen Barber <gjb@FreeBSD.org> |
Revert r267961, r267973: These changes prevent sysctl(8) from returning proper output, such as: 1) no output from sysctl(8) 2) erroneously returning ENOMEM with tools like truss(1) or uname(1) truss: can not get etype: Cannot allocate memory
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#
3da1cf1e |
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27-Jun-2014 |
Hans Petter Selasky <hselasky@FreeBSD.org> |
Extend the meaning of the CTLFLAG_TUN flag to automatically check if there is an environment variable which shall initialize the SYSCTL during early boot. This works for all SYSCTL types both statically and dynamically created ones, except for the SYSCTL NODE type and SYSCTLs which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to be used in the case a tunable sysctl has a custom initialisation function allowing the sysctl to still be marked as a tunable. The kernel SYSCTL API is mostly the same, with a few exceptions for some special operations like iterating childrens of a static/extern SYSCTL node. This operation should probably be made into a factored out common macro, hence some device drivers use this. The reason for changing the SYSCTL API was the need for a SYSCTL parent OID pointer and not only the SYSCTL parent OID list pointer in order to quickly generate the sysctl path. The motivation behind this patch is to avoid parameter loading cludges inside the OFED driver subsystem. Instead of adding special code to the OFED driver subsystem to post-load tunables into dynamically created sysctls, we generalize this in the kernel. Other changes: - Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask" to "hw.pcic.intr_mask". - Removed redundant TUNABLE statements throughout the kernel. - Some minor code rewrites in connection to removing not needed TUNABLE statements. - Added a missing SYSCTL_DECL(). - Wrapped two very long lines. - Avoid malloc()/free() inside sysctl string handling, in case it is called to initialize a sysctl from a tunable, hence malloc()/free() is not ready when sysctls from the sysctl dataset are registered. - Bumped FreeBSD version to indicate SYSCTL API change. MFC after: 2 weeks Sponsored by: Mellanox Technologies
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#
7a22215c |
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30-Nov-2013 |
Eitan Adler <eadler@FreeBSD.org> |
Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this shifts into the sign bit. Instead use (1U << 31) which gets the expected result. This fix is not ideal as it assumes a 32 bit int, but does fix the issue for most cases. A similar change was made in OpenBSD. Discussed with: -arch, rdivacky Reviewed by: cperciva
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#
5df87b21 |
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07-Aug-2013 |
Jeff Roberson <jeff@FreeBSD.org> |
Replace kernel virtual address space allocation with vmem. This provides transparent layering and better fragmentation. - Normalize functions that allocate memory to use kmem_* - Those that allocate address space are named kva_* - Those that operate on maps are named kmap_* - Implement recursive allocation handling for kmem_arena in vmem. Reviewed by: alc Tested by: pho Sponsored by: EMC / Isilon Storage Division
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#
7609e73c |
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30-Nov-2012 |
Jung-uk Kim <jkim@FreeBSD.org> |
Remove duplicate code. Reduce diff between amd64 and i386.
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#
8c2b353e |
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30-Nov-2012 |
Jung-uk Kim <jkim@FreeBSD.org> |
Use volatile keywords properly.
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#
231ac244 |
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29-Nov-2012 |
Jung-uk Kim <jkim@FreeBSD.org> |
Tidy up inline assembly. No functional change.
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#
851dbc07 |
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14-Oct-2012 |
Andriy Gapon <avg@FreeBSD.org> |
pciereg_cfg*: use assembly to access the mem-mapped cfg space AMD BKDG for CPU families 10h and later requires that the memory mapped config is always read into or written from al/ax/eax register. Discussed with: kib, alc Reviewed by: kib (earlier version) MFC after: 25 days
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#
d098f930 |
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31-May-2011 |
Nathan Whitehorn <nwhitehorn@FreeBSD.org> |
On multi-core, multi-threaded PPC systems, it is important that the threads be brought up in the order they are enumerated in the device tree (in particular, that thread 0 on each core be brought up first). The SLIST through which we loop to start the CPUs has all of its entries added with SLIST_INSERT_HEAD(), which means it is in reverse order of enumeration and so AP startup would always fail in such situations (causing a machine check or RTAS failure). Fix this by changing the SLIST into an STAILQ, and inserting new CPUs at the end. Reviewed by: jhb
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#
a7d5f7eb |
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19-Oct-2010 |
Jamie Gritton <jamie@FreeBSD.org> |
A new jail(8) with a configuration file, to replace the work currently done by /etc/rc.d/jail.
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#
ea9b1909 |
|
01-Nov-2009 |
Andriy Gapon <avg@FreeBSD.org> |
MFC 197450: number of cleanups in i386 and amd64 pci md code
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#
1e908511 |
|
24-Sep-2009 |
Andriy Gapon <avg@FreeBSD.org> |
number of cleanups in i386 and amd64 pci md code o introduce PCIE_REGMAX and use it instead of ad-hoc constant o where 'reg' parameter/variable is not already unsigned, cast it to unsigned before comparison with maximum value to cut off negative values o use PCI_SLOTMAX in several places where 31 or 32 were explicitly used o drop redundant check of 'bytes' in i386 pciereg_cfgread() - valid values are already checked in the subsequent switch Reviewed by: jhb MFC after: 1 week
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#
d3da228f |
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18-May-2009 |
John Baldwin <jhb@FreeBSD.org> |
Add a read-only sysctl hw.pci.mcfg to mirror the tunable by the same name. MFC after: 1 week
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#
6cad8eb4 |
|
24-Mar-2009 |
John Baldwin <jhb@FreeBSD.org> |
Fall back to using configuration type 1 accesses for PCI config requests if the requested PCI bus falls outside of the bus range given in the ACPI MCFG table. Several BIOSes seem to not include all of the PCI busses in systems in their MCFG tables. It maybe that the BIOS is simply buggy and does support all the busses, but it is more conservative to just fall back to the old method unless it is certain that memory accesses will work.
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#
d7f03759 |
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19-Oct-2008 |
Ulf Lilleengen <lulf@FreeBSD.org> |
- Import the HEAD csup code which is the basis for the cvsmode work.
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#
3591fea8 |
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11-Sep-2008 |
John Baldwin <jhb@FreeBSD.org> |
Add a 'hw.pci.mcfg' tunable. It can be set to 0 to disable memory-mapped PCI config access.
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#
2d10570a |
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10-Sep-2008 |
John Baldwin <jhb@FreeBSD.org> |
Some K8 chipsets don't expose all of the PCI devices on bus 0 via PCIe memory-mapped config access. Add a workaround for these systems by checking the first function of each slot on bus 0 using both the memory-mapped config access and the older type 1 I/O port config access. If we find a slot that is only visible via the type 1 I/O port config access, we flag that slot. Future PCI config transactions to flagged slots on bus 0 use type 1 I/O port config access rather than memory mapped config access.
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#
d320e05c |
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21-Aug-2008 |
John Baldwin <jhb@FreeBSD.org> |
Extend the support for PCI-e memory mapped configuration space access: - Rename pciereg_cfgopen() to pcie_cfgregopen() and expose it to the rest of the kernel. It now also accepts parameters via function arguments rather than global variables. - Add a notion of minimum and maximum bus numbers and reject requests for an out of range bus. - Add more range checks on slot/func/reg/bytes parameters to the cfg reg read/write routines. Don't panic on any invalid parameters, just fail the request (writes do nothing, reads return -1). This matches the behavior of the other cfg mechanisms. - Port the memory mapped configuration space access to amd64. On amd64 we simply use the direct map (via pmap_mapdev()) for the memory mapped window. - During acpi_attach() just after loading the ACPI tables, check for a MCFG table. If it exists, call pciereg_cfgopen() on each subtable (memory mapped window). For now we only support windows for domain 0 that start with bus 0. This removes the need for more chipset-specific quirks in the MD code. - Remove the chipset-specific quirks for the Intel 5000P/V/Z chipsets since these machines should all have MCFG tables via ACPI. - Updated pci_cfgregopen() to DTRT if ACPI had invoked pcie_cfgregopen() earlier. MFC after: 2 weeks
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#
34ce932f |
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20-Aug-2008 |
John Baldwin <jhb@FreeBSD.org> |
- Add support for memory mapped PCI config space access on Intel 915GM and 5000P/V/Z chipsets. - If the base address of the config space BAR is above 4GB for some reason and this isn't a PAE kernel, then warn about this (under bootverbose) and don't use the BAR. PR: kern/126525 Submitted by: Arthur Hartwig @ Nokia MFC after: 2 weeks
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#
5326f077 |
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20-Aug-2008 |
John Baldwin <jhb@FreeBSD.org> |
Use switch statements instead of if-else for enabling PCI-express config space support. MFC after: 1 week
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#
93ee134a |
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15-Aug-2008 |
Kip Macy <kmacy@FreeBSD.org> |
Integrate support for xen in to i386 common code. MFC after: 1 month
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#
3f7f26e9 |
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28-Nov-2007 |
John Baldwin <jhb@FreeBSD.org> |
MFamd64: 1.109 of pci_cfgreg.c which changes pci_cfgdisable() into a nop for type #1 similar to what other OS's do. MFC after: 3 days
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#
98bbce55 |
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28-Nov-2007 |
John Baldwin <jhb@FreeBSD.org> |
Adjust the code to probe for the PCI config mechanism to use. - On amd64, just assume type #1 is always used. PCI 2.0 mandated deprecated type #2 and required type #1 for all future bridges which was well before amd64 existed. - For i386, ignore whatever value was in 0xcf8 before testing for type #1 and instead rely on the other tests to determine if type #1 works. Some newer machines leave garbage in 0xcf8 during boot and as a result the kernel doesn't find PCI at all (which greatly confuses ACPI which expects PCI to exist when PCI busses are in the namespace). MFC after: 3 days Discussed with: scottl
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#
d748ef47 |
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12-Dec-2006 |
John Baldwin <jhb@FreeBSD.org> |
Replace a few magic numbers.
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#
16f99fe1 |
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08-Dec-2005 |
Craig Rodrigues <rodrigc@FreeBSD.org> |
Add support for 7320 and 915 PCIe chipsets. Submitted by: Gavin Atkinson <gavin.atkinson at ury dot york dot ac dot uk> PR: kern/79139 Reviewed by: scottl
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#
421552a5 |
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13-Nov-2005 |
Warner Losh <imp@FreeBSD.org> |
Provide a dummy NO_XBOX option that lives in opt_xbox.h for pc98. This allows us to eliminate a three ifdef PC98 instances.
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#
1ba0023e |
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08-Nov-2005 |
Yoshihiro Takahashi <nyan@FreeBSD.org> |
Fix pc98 build.
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#
51ef421d |
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08-Nov-2005 |
Warner Losh <imp@FreeBSD.org> |
Add support for XBOX to the FreeBSD port. The xbox architecture is nearly identical to wintel/ia32, with a couple of tweaks. Since it is so similar to ia32, it is optionally added to a i386 kernel. This port is preliminary, but seems to work well. Further improvements will improve the interaction with syscons(4), port Linux nforce driver and future versions of the xbox. This supports the 64MB and 128MB boxes. You'll need the most recent CVS version of Cromwell (the Linux BIOS for the XBOX) to boot. Rink will be maintaining this port, and is interested in feedback. He's setup a website http://xbox-bsd.nl to report the latest developments. Any silly mistakes are my fault. Submitted by: Rink P.W. Springer rink at stack dot nl and Ed Schouten ed at fxq dot nl
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68a443c2 |
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04-Nov-2005 |
Peter Wemm <peter@FreeBSD.org> |
MFamd64: indent with tabs instead of spaces.
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#
8a3a2638 |
|
24-Oct-2005 |
Bill Paul <wpaul@FreeBSD.org> |
Undo the change to pci_cfgdisable() on i386 for now. It seems to fix the amd64 case, but makes the i386 case fail even more often.
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#
ba3af76d |
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24-Oct-2005 |
Bill Paul <wpaul@FreeBSD.org> |
Modify the pci_cfgdisable() routine to bring it more in line with other OSes (Solaris, Linux, VxWorks). It's not necessary to write a 0 to the config address register when using config mechanism 1 to turn off config access. In fact, it can be downright troublesome, since it seems to confuse the PCI-PCI bridge in the AMD8111 chipset and cause it to sporadically botch reads from some devices. This is the cause of the missing USP ports problem I was experiencing with my Sun Opteron system. Also correct the case for mechanism 2: it's only necessary to write a 0 to the ENABLE port.
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#
86cb007f |
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06-Jan-2005 |
Warner Losh <imp@FreeBSD.org> |
/* -> /*- for copyright notices, minor format tweaks as necessary
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#
5662cf3c |
|
13-Dec-2004 |
Scott Long <scottl@FreeBSD.org> |
Remove a stray critical_exit(). Submitted by: johan
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#
245e410b |
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10-Dec-2004 |
Scott Long <scottl@FreeBSD.org> |
Expand the scope of the critical section in the PCIe read and write methods on the advice of Alan Cox.
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#
568b7ee1 |
|
06-Dec-2004 |
Scott Long <scottl@FreeBSD.org> |
Due to a significant addition of code, add my copyright to this file. Also note that the PCIe work was made possible due to hardware donations from the FreeBSD Foundation and Intel. Thanks!
|
#
aa2ea232 |
|
06-Dec-2004 |
Scott Long <scottl@FreeBSD.org> |
Add support for the memory-mapped PCI Express configuration mechanism. This actually is a property of the northbridge and applies to all PCI/PCI-X/PCIe devices in the system, though only PCIe devices will respond to registers higher than 256. This uses per-CPU pools of temporary mappings so that the whole 256MB of configuration space doesn't have to be mapped all at once. While the sf_buf API was considered for this, the fact that it requires sleep locks and can return failure made it unsuitable for this use. For now only the Intel Grantsdale and Lindenhurst (925 and 752x) chipsets are supported. Since there doesn't appear to be a compatible way to determine northbridge support, new chipsets will have to be explicitely added in the future.
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#
5908d366 |
|
04-Jul-2004 |
Stefan Farfeleder <stefanf@FreeBSD.org> |
Consistently use __inline instead of __inline__ as the former is an empty macro in <sys/cdefs.h> for compilers without support for inline.
|
#
39981fed |
|
01-Jul-2004 |
John Baldwin <jhb@FreeBSD.org> |
Trim a few things from the dmesg output and stick them under bootverbose to cut down on the clutter including PCI interrupt routing, MTRR, pcibios, etc. Discussed with: USENIX Cabal
|
#
77fa00fa |
|
18-Feb-2004 |
John Baldwin <jhb@FreeBSD.org> |
Switch to using the new $PIR interrupt routing code and remove the old code. The pci_cfgreg.c file now just controls reading/writing PCI config registers.
|
#
21e25fa6 |
|
31-Dec-2003 |
John Baldwin <jhb@FreeBSD.org> |
Replace an outb() during the test for configuration mechanism #1 with a DELAY(1) instead. After wading through old commit logs, I found that the outb() was added not as part of the test but as an intentional delay. In fact, according to Shanley's PCI book, the configuration 1 data and address ports should only be accessed using aligned 32-bit accesses (i.e. inl() and outl()). Thus, using outb() to just the last byte of the port violates the PCI spec it would seem. On at least one box doing so broke the probe for PCI, whereas changing it to a DELAY(1) fixed the probe. Reported by: Sean Welch <welchsm@earthlink.net> MFC after: 1 week
|
#
6f92bdd0 |
|
03-Nov-2003 |
John Baldwin <jhb@FreeBSD.org> |
New APIC support code: - The apic interrupt entry points have been rewritten so that each entry point can serve 32 different vectors. When the entry is executed, it uses one of the 32-bit ISR registers to determine which vector in its assigned range was triggered. Thus, the apic code can support 159 different interrupt vectors with only 5 entry points. - We now always to disable the local APIC to work around an errata in certain PPros and then re-enable it again if we decide to use the APICs to route interrupts. - We no longer map IO APICs or local APICs using special page table entries. Instead, we just use pmap_mapdev(). We also no longer export the virtual address of the local APIC as a global symbol to the rest of the system, but only in local_apic.c. To aid this, the APIC ID of each CPU is exported as a per-CPU variable. - Interrupt sources are provided for each intpin on each IO APIC. Currently, each source is given a unique interrupt vector meaning that PCI interrupts are not shared on most machines with an I/O APIC. That mapping for interrupt sources to interrupt vectors is up to the APIC enumerator driver however. - We no longer probe to see if we need to use mixed mode to route IRQ 0, instead we always use mixed mode to route IRQ 0 for now. This can be disabled via the 'NO_MIXED_MODE' kernel option. - The npx(4) driver now always probes to see if a built-in FPU is present since this test can now be performed with the new APIC code. However, an SMP kernel will panic if there is more than one CPU and a built-in FPU is not found. - PCI interrupts are now properly routed when using APICs to route interrupts, so remove the hack to psuedo-route interrupts when the intpin register was read. - The apic.h header was moved to apicreg.h and a new apicvar.h header that declares the APIs used by the new APIC code was added.
|
#
184dcdc7 |
|
21-Oct-2003 |
Mike Silbersack <silby@FreeBSD.org> |
Change all SYSCTLS which are readonly and have a related TUNABLE from CTLFLAG_RD to CTLFLAG_RDTUN so that sysctl(8) can provide more useful error messages.
|
#
810cb9ef |
|
10-Sep-2003 |
John Baldwin <jhb@FreeBSD.org> |
We represent PCI intpin's two different ways. One is the way that the intpin register is expressed in hardware where 0 means none, 1 means INTA, 2 INTB, etc. The other way is commonly used in loops where 0 means INTA, 1 means INTB, etc. The matchpin argument to pci_cfgintr_search() is supposed to be the first form, but we passsed in a loop index of the second. This fix adds one to the loop index to convert to the first form. Reported by: Pavlin Radoslavov <pavlin@icir.org>
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126ef7fc |
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01-Aug-2003 |
Yoshihiro Takahashi <nyan@FreeBSD.org> |
PC98 uses different mask of IRQ.
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#
e86bd39a |
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01-Aug-2003 |
Warner Losh <imp@FreeBSD.org> |
Add hw.pci.irq_override_mask, which is a mask of interrupts that are considered to be good to try when it otherwise has no clue about which interrupts to try. This is a band-aide and we really should try to balance the IRQs that we arbitrarily pick, but it should help some people that would otherwise get bad IRQs.
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71c5a901 |
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02-Jun-2003 |
David E. O'Brien <obrien@FreeBSD.org> |
Use __FBSDID().
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af3d516f |
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17-Feb-2003 |
Peter Wemm <peter@FreeBSD.org> |
Initiate de-orbit burn for USE_PCI_BIOS_FOR_READ_WRITE. This has been #if'ed out for a while. Complete the deed and tidy up some other bits. We need to be able to call this stuff from outer edges of interrupt handlers for devices that have the ISR bits in pci config space. Making the bios code mpsafe was just too hairy. We had also stubbed it out some time ago due to there simply being too much brokenness in too many systems. This adds a leaf lock so that it is safe to use pci_read_config() and pci_write_config() from interrupt handlers. We still will use pcibios to do interrupt routing if there is no acpi.. [yes, I tested this] Briefly glanced at by: imp
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a4bbd12f |
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13-Nov-2002 |
Warner Losh <imp@FreeBSD.org> |
MFp4: o Fix small style nit. This was supposed to be part of the last batch of style fixes, but somehow didn't get merged.
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ce494452 |
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02-Nov-2002 |
Warner Losh <imp@FreeBSD.org> |
MFp4: o It turns out that we always need to try to route the interrupts for the case where the $PIR tells us there can be only one. Some machines require this, while others fail when we try to do this (bogusly, imho). Since we have no apriori way of knowing which is which, we always try to do the routing and hope for the best if things fail. o Add some additional comments that state the obvious, but amplify it in non-obvious ways (judging from the questions I've gotten). This should un-break older laptops that still have to use PCIBIOS to route interrupts. Tested by: sam
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984de797 |
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02-Nov-2002 |
Warner Losh <imp@FreeBSD.org> |
Use 0xffffffff instead of -1 for id to compare against. Use exact width types, since this is a MD file and won't be used elsewhere. Fix a couple of resulting printf breakages Bug found by: phk using Flexlint
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ea542029 |
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06-Oct-2002 |
Warner Losh <imp@FreeBSD.org> |
o go ahead and route the interupt, even if it is supposedly unique. there are some strange machines that seem to need this. o delete bogus comment. o don't use the the bios for read/writing config space. They interact badly with SMP and being called from ISR. This brings -current in line with -stable. # make the latter #ifdef on USE_PCI_BIOS_FOR_READ_WRITE in case we # need to go back in a hurry.
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cb8e4332 |
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28-Sep-2002 |
Poul-Henning Kamp <phk@FreeBSD.org> |
Don't call function in return() for a void function.
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8ff25e97 |
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23-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
Put verbose printf's in the PCI BIOS interrupt routing code under if (bootverbose).
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fe466337 |
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20-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
Axe unused include.
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fefe985d |
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09-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
Make sure a $PIR table header has a valid length before accepting the table as valid. Submitted by: Michal Mertl <mime@traveller.cz>
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c3ba1376 |
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06-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
Add a function pci_probe_route_table() that returns true if our PCI BIOS supports interrupt routing and if the specified PCI bus is present in the routing table.
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facfd6e8 |
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06-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
Dump the $PIR table if booting verbose.
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8ab96fd8 |
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06-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
- Add a pci_cfgintr_valid() function to see if a given IRQ is a valid IRQ for an entry in a PCIBIOS interrupt routing ($PIR) table. - Change pci_cfgintr() to except the current IRQ of a device as a fourth argument and to use that IRQ for the device if it is valid. - If an intpin entry in a $PIR entry has a link of 0, it means that that intpin isn't connected to anything that can trigger an interrupt. Thus, test the link against 0 to find invalid entries in the table instead of implicitly relying on the irqs field to be zero. In the machines I have looked at, intpin entries with a link of 0 often have the bits for all possible interrupts for PCI devices set.
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fbabd7be |
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06-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
Add support for printing out the contents of a PCI BIOS $PIR interrupt routing table on the console. Eventually it will be printed during verbose boots.
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5264a94f |
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05-Sep-2002 |
John Baldwin <jhb@FreeBSD.org> |
Test PCIbios.ventry against 0 to see if we found a PCIbios entry point, not the 'entry' member. The entry point is formed from both a base and a relative entry point. 'entry' is that relative offset. It is perfectly valid to have an entry point with a relative offset of 0. PCIbios.ventry is the virtual address of the entry point that takes both 'base' and 'entry' into account, thus it is the proper variable to test to see if we have an entry point or not.
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e300f53c |
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20-Jul-2002 |
Warner Losh <imp@FreeBSD.org> |
style(9)ize the whole file Approved in concept a long time ago by: msmith
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8ce1ab3a |
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31-May-2002 |
Warner Losh <imp@FreeBSD.org> |
Use a common function to map the bogus intlines. Don't require pin be non-zero before we map bogus intlines, always do it. This fixes a number of problems on HP Omnibook computers. Tested/Reviewed by: Brooks Davis
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26722a19 |
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29-May-2002 |
Brooks Davis <brooks@FreeBSD.org> |
Restore the irq=0 => irq=255 hack to pci_cfgintr_search(). Just having it in pci_cfgregread() wasn't sufficent on at least the HP Omnibook 500. Reviewed by: imp
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d5ccecfa |
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24-Apr-2002 |
Warner Losh <imp@FreeBSD.org> |
o Work around bugs in the powerof2 macro: It thinks that 0 is a power of 2, but that's not the case. This fixes the case where there were slots in the PIR table that had no bits set, but we assumed they did and used strange results as a result. o Map invalid INTLINE registers to 255 in pci_cfgreg.c. This should allow us to remove the bogus checks in MI code for non-255 values. I put these changes out for review a while ago, but no one responded to them, so into current they go. This should help us work better on machines that don't route interrupts in the traditional way. MFC After: 4286 millifortnights
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654d58ca |
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16-Mar-2002 |
Warner Losh <imp@FreeBSD.org> |
Don't call the bios if the interrupt appaers to be already routed. Some older PCI BIOSes hate this and this leads to panics when it is done. Also, assume that a uniquely routed interrupt is already routed. This also seems to help some older laptops with feable BIOSes cope.
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a8c18609 |
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19-Jan-2002 |
Warner Losh <imp@FreeBSD.org> |
The Libretto L series has no $PIR table, but does have a _PIR table. This typo keeps us from properly routing an interrupt for CardBus bridges on this machine. So, now we look for $PIR and then _PIR to cope. With these changes, the Libretto L1 now works properly. Evidentally, the idea comes from patch that the Japanese version of RedHat (or against a Japanese version of Red Hat), but my Japanese isn't good enough to to know for sure. Reported by: Hiroyuki Aizu-san <eyes@navi.org> # This may be an MFC candidate, but I'm not yet sure.
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1cf5f555 |
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26-Nov-2001 |
Warner Losh <imp@FreeBSD.org> |
MFS: I was confused. This code wasn't in -current after all. Merge in the irq 0 detection. Add comment about why. If we have irq 0, ignore it like we do irq 255. Some BIOS writers aren't careful like they should be.
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d3b6477a |
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28-Aug-2001 |
Warner Losh <imp@FreeBSD.org> |
It turns out that while Toshiba laptops don't want to route interrupts multiple times, others do. The last strategy, which was to assume that already routed interrupts were good and just return them doesn't work for some laptops. So, instead, we have a new strategy: we notice that we have an interrupt that's already routed. We go ahead and try to route it, none the less. We will assume that it is correctly routed, even if the route fails. We still assume that other failures in the bios32 call are because the interrupt is NOT routed. Note: some laptops do not support the bios32 interface to PCI BIOS and we need to call it via the INT 2A interface. That is another windmill to till at later. Also correct a minor typo and minor whitespace nits. Strong MFC candidate.
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d626906b |
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27-Aug-2001 |
Warner Losh <imp@FreeBSD.org> |
MFS: IRQ ordering, PRVERB and more whining in pcibios_get_version on failure. Check return value from bios32. [[ Yes, I was bad and committed this to stable first. I should have done the commit in the other order. ]]
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0b9427de |
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21-Aug-2001 |
Warner Losh <imp@FreeBSD.org> |
The general conesnsus on irc was that pci bios for config registers and such was just a bad idea and one that users should be forced to enable if they want it. This patch introduces a hw.pci.enable_pcibios tunable for those people. This does not impact the pcibios interrupt routing at all. Approved by: peter, msmith
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573be827 |
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20-Aug-2001 |
Peter Wemm <peter@FreeBSD.org> |
Detect a certain type of PCIBIOS brain damage. For some reason, some bios vendors took it apon themselves to "censor" the host->pci bridges from PCIBIOS callers, even when the caller explicitly asks for them. This includes certain Compaq machines (eg: DL360) and some laptops. If we detect this, shut down pcibios and revert to using IO port bashing. Under -current, apcica does a better job anyway.
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85fab963 |
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10-May-2001 |
Mike Smith <msmith@FreeBSD.org> |
Un-swap irq/link byte values so that printf works.
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6c9eb5f3 |
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08-Feb-2001 |
Mike Smith <msmith@FreeBSD.org> |
Free the memory we get from devclass_get_devices and device_get_children. Submitted by: wpaul
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47c6b726 |
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19-Jan-2001 |
Peter Wemm <peter@FreeBSD.org> |
Fix a warning due to missing prototype.
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6a47d852 |
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12-Jan-2001 |
Bosko Milekic <bmilekic@FreeBSD.org> |
Remove declaration of airq variable from outer block. There were two declarations of a variable of the same name. The one in the outer block was unused and probably just slipped in at one point or another. This silences a compiler warning.
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bb0d0a8e |
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08-Dec-2000 |
Mike Smith <msmith@FreeBSD.org> |
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
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099d058b |
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01-Nov-2000 |
Mike Smith <msmith@FreeBSD.org> |
Improve the PCI interrupt routing code. Now the process is as follows: - Look for a hardwired interrupt in the routing table for this bus/device/pin (we already did this). - Look for another device with the same link byte which has a hardwired interrupt. - Look for a PCI device matching an entry with the same link byte which has already been assigned an interrupt, and use that. - Look for a routable interrupt listed in the "PCI only" interrupts field and use that. - Pick the first interrupt that's marked as routable and use that.
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9d558634 |
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19-Oct-2000 |
Mike Smith <msmith@FreeBSD.org> |
Call the BIOS to route the selected interrupt. Correctly calculate the interrupt from the PCI routing table (ffs returns 1 for the rightmost bit, not 0).
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a3793252 |
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16-Oct-2000 |
Warner Losh <imp@FreeBSD.org> |
Remove debug writes introduced in prior commit
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54c9005f |
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16-Oct-2000 |
Warner Losh <imp@FreeBSD.org> |
Add the ability to use the $PIR table in the BIOS to route interrupts on demand. Submitted by: msmith
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12a02d6e |
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02-Oct-2000 |
Mike Smith <msmith@FreeBSD.org> |
Move the i386 PCI attachment code out of i386/isa back into i386/pci. Split out the configuration space access primitives, as these are needed elsewhere as well.
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b6c84078 |
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27-Sep-2000 |
Peter Wemm <peter@FreeBSD.org> |
Get out the roto-rooter and clean up the abuse of nexus ivars by the i386/isa/pcibus.c. This gets -current running again on multiple host->pci machines after the most recent nexus commits. I had discussed this with Mike Smith, but ended up doing it slightly differently to what we discussed as it turned out cleaner this way. Mike was suggesting creating a new resource (SYS_RES_PCIBUS) or something and using *_[gs]et_resource(), but IMHO that wasn't ideal as SYS_RES_* is meant to be a global platform property, not a quirk of a given implementation. This does use the ivar methods but does so properly. It also now prints the physical pci bus that a host->pci bridge (pcib) corresponds to.
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4d8ea19f |
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04-Sep-2000 |
Peter Wemm <peter@FreeBSD.org> |
Catch a few more bogosities in certain chipsets before they mess us up. Some have dual host->PCI bridges for the same logical pci bus (!), eg: some of the RCC chipsets. This is a 32/64 bit 33/66MHz and dual pci voltage motherboard so persumably there are electical or signalling differences but they are otherwise the same logical bus. The new PCI probe code however was getting somewhat upset about it and ended up creating two pci bridges to the same logical bus, which caused devices on that logical bus to appear and be probed twice. The ACPI data on this box correctly identifies this stuff, so bring on ACPI! :-)
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280b4748 |
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31-Aug-2000 |
Peter Wemm <peter@FreeBSD.org> |
Take a shot at fixing multiple pci busses on i386. pcib_set_bus() cannot be used on the new child because it is meant to be used on the *pci* device (it looks at the parent internally) not the pcib being added. Bite the bullet and use ivars for the bus number to avoid any doubts about whether the softc is consistant between probe and attach. This should not break the Alpha code.
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21c3015a |
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28-Aug-2000 |
Doug Rabson <dfr@FreeBSD.org> |
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
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2a50a6d7 |
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23-Jun-2000 |
Mike Smith <msmith@FreeBSD.org> |
Add PnP probe methods to some common AT hardware drivers. In each case, the PnP probe is merely a stub as we make assumptions about some of this hardware before we have probed it. Since these devices (with the exception of the speaker) are 'standard', suppress output in the !bootverbose case to clean up the probe messages somewhat.
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569e9658 |
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24-May-2000 |
Jun Kuriyama <kuriyama@FreeBSD.org> |
Add OPTi 82C700 chipset. Submitted by: sanpei@sanpei.org PR: kern/18155 (part of)
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3cc13eb5 |
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23-May-2000 |
Jun Kuriyama <kuriyama@FreeBSD.org> |
Add 440MX chipset. Submitted by: YOSHIMURA Hideaki <hideakiy@cs-tokyo01.chuosystem.co.jp> References: [bsd-nomads:13764]
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ac9b3dac |
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04-May-2000 |
Mike Smith <msmith@FreeBSD.org> |
Don't assume that the PCI BIOS is going to clear the unused bits in %ecx when it returns.
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300451c4 |
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16-Apr-2000 |
Mike Smith <msmith@FreeBSD.org> |
Some more i386-only BIOS-friendliness: - Add support for using the PCI BIOS functions for configuration space accesses, and make this the default. - Make PNPBIOS the default (obsoletes the PNPBIOS config option). - Add two new boot-time tunables to disable each of the above.
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ac19291f |
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23-Feb-2000 |
Doug Rabson <dfr@FreeBSD.org> |
Add a workaround to allow us to detect the second pci bus on an HP Netserver LS/2. Approved by: jkh
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9a1498a4 |
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13-Feb-2000 |
Doug Rabson <dfr@FreeBSD.org> |
Fix an uninitialised variable which affected probing on some machines. Approved by: jkh Reviewed by: gallatin
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da400920 |
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09-Feb-2000 |
Andrew Gallatin <gallatin@FreeBSD.org> |
Allow allows peer pci buses which are directly connected to the RCC host pci chipset to be probed & attached on newer Dell PowerEdge servers, such as the 2400 and 4400. Reviewed by: dfr, msmith, jlemon Tested by: hnokubi@yyy.or.jp (in a previous incantation) Approved by: jkh
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4f2e8d63 |
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06-Feb-2000 |
Nick Hibma <n_hibma@FreeBSD.org> |
Add PCI Id's for i810 chipsets. PR: 16517 Submitted by: SAKIYAMA Nobuo <sakichan@lares.dti.ne.jp> Approved by: jhk
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4a1e4cb7 |
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08-Jan-2000 |
Peter Wemm <peter@FreeBSD.org> |
Clean up the cfgmech/pci_mechanism debris. The reason for the existance of this is no longer an issue as we have a replacement driver for the one that needed it. Reviewed by: dfr
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c954d736 |
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05-Dec-1999 |
Doug Rabson <dfr@FreeBSD.org> |
Don't use a bogus bus number for Ross host-pci bridges. PR: kern/15278 Submitted by: Ahmed Benani <ahmed_benani@urbanet.ch>
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fe0d4089 |
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03-Dec-1999 |
Matthew N. Dodd <mdodd@FreeBSD.org> |
Remove the 'ivars' arguement to device_add_child() and device_add_child_ordered(). 'ivars' may now be set using the device_set_ivars() function. This makes it easier for us to change how arbitrary data structures are associated with a device_t. Eventually we won't be modifying device_t to add additional pointers for ivars, softc data etc. Despite my best efforts I've probably forgotten something so let me know if this breaks anything. I've been running with this change for months and its been quite involved actually isolating all the changes from the rest of the local changes in my tree. Reviewed by: peter, dfr
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cde35e1a |
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18-Nov-1999 |
Peter Wemm <peter@FreeBSD.org> |
If we have found pci devices via pci_cfgopen(), but don't find a host->pci bridge specifically, then add a pcib0 device on the motherboard for the pci bus to hang off. Requested by: Anders Andersson <anders@sanyusan.se> Obtained from: dfr
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eab7cc95 |
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25-Oct-1999 |
Alan Cox <alc@FreeBSD.org> |
Add text for the AMD-751 host-to-PCI and PCI-to-PCI (AGP) bridges.
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c3aac50f |
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27-Aug-1999 |
Peter Wemm <peter@FreeBSD.org> |
$Id$ -> $FreeBSD$
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f3b63bd3 |
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22-Aug-1999 |
Peter Wemm <peter@FreeBSD.org> |
Make the identify routine add itself with priority 100 to make sure it goes after the npx/apm devices and any other motherboard devices that may get added down the track.
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accc665b |
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10-Aug-1999 |
Peter Wemm <peter@FreeBSD.org> |
Hopefully fix the previous commit, it caused *all* bridges to be detected as PCI->HOST bridges on my (440BX) box. My change is to remove the test at the beginning entirely, letting the switch on the device ID happen first. If the device ID is unknown, then (in the default case) check for the generic PCIS_BRIDGE_HOST tag. This should allow wierd cases (eg: wpaul's IMS VL bridge) to work by using the id override. This strategy is more in line with the other PCI match methods we use elsewhere, I only have a limited testbed, but having my USB etc devices detected as PCI->HOST bridges doesn't look good.
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d9d628b0 |
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09-Aug-1999 |
Bill Paul <wpaul@FreeBSD.org> |
Fix nexus_pcib_is_host_bridge() so that it detects my 486's PCI bus correctly. It has the following code: if (class != PCIC_BRIDGE || subclass != PCIS_BRIDGE_HOST) return NULL; My 486 has an Integrated Micro Solutions PCI bridge which identifies itself as subclass PCIS_BRIDGE_OTHER, not PCIS_BRIDGE_HOST. Consequently, it gets ignored. In my opinion, the correct test should be: if ((class != PCIC_BRIDGE) && (subclass != PCIS_BRIDGE_HOST)) return NULL; That way the test still succeeds because the chip's class is PCIC_BRIDGE. Clearly it's not reasonable to expect all host to PCI bridges to always have a subclass of PCIS_BRIDGE_HOST since I've got one that doesn't. This way the sanity test should remain relatively sane while still allowing some oddball yet correct hardware to work. If somebody has a better way to do it, go ahead and tweak the test, but be aware that class == PCIC_BRIDGE and subclass == PCIS_BRIDGE_OTHER is a valid case. While I was here, I also added an explicit ID string for the IMS chipset. I also dealt with a minor style nit: it's bad karma not to have a default case for your switch statements, but the one in this routine doesn't have one. The default string of "Host to PCI bridge" is now assigned in a default case of the switch statement instead of initializing "s" with the string before the switch and then not having any default case.
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cac6a044 |
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04-Aug-1999 |
Peter Wemm <peter@FreeBSD.org> |
Don't probe if pci_cfgopen() fails to find pci hardware, like we used to to. This might have caused interesting things on non-PCI hardware if PCI was compiled in.
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#
85001303 |
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15-Jul-1999 |
Mike Smith <msmith@FreeBSD.org> |
Add support for multiple PCI busses directly connected to the nexus. This is only partially complete, but allows 450NX-based systems with more than one PCI bus to be used again. Submitted by: dfr
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#
8dc26439 |
|
18-May-1999 |
Peter Wemm <peter@FreeBSD.org> |
Move pcibus (host -> pci bus) probe/attach routines from nexus to pcibus.c. pci_cfgopen() becomes static and there are no more bus #ifdef's in nexus.c.
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#
8277ac25 |
|
20-Dec-1997 |
Stefan Eßer <se@FreeBSD.org> |
Make the class code checks in function pci_cfgcheck less strict. It failed to recognize the PCI bus in a system that had only an old chip-set (class code 000000) and a Cyclom multiport serial card on PCI bus 0, but no VGA card or disk or network controller. PR: i386/5300 Submitted by: Nickolay N. Dudorov <nnd@itfs.nsk.su>
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#
f71d35e4 |
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20-Jul-1997 |
Bruce Evans <bde@FreeBSD.org> |
Removed unused #includes.
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#
b3daa02e |
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26-May-1997 |
Stefan Eßer <se@FreeBSD.org> |
Yet another fix for configuration mechanism 1 register accesses: Adjust the data port address by adding the two low order bits of the register number. The address port takes only a word address (i.e. ignores the two low order bits written to it).
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#
64039d40 |
|
26-May-1997 |
Stefan Eßer <se@FreeBSD.org> |
Fix previous fix: The enable bit is bit 31 (0x8000000) and not bit 15.
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#
e0c57a96 |
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26-May-1997 |
Stefan Eßer <se@FreeBSD.org> |
Set enable bit when writing the configuration address in configuration mode 1. Omission of this bit makes all config register accesses fail in on recent chip sets ... (The problem was reported and debug output provided by: Steve Passe)
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#
5bec6157 |
|
26-May-1997 |
Stefan Eßer <se@FreeBSD.org> |
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
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#
5c036390 |
|
09-Apr-1997 |
Stefan Eßer <se@FreeBSD.org> |
Mask out revision register in consistency test of class register.
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#
6df09d1e |
|
09-Apr-1997 |
Stefan Eßer <se@FreeBSD.org> |
Fix spelling of align and interrupt in comments.
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#
b4b88479 |
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09-Apr-1997 |
Stefan Eßer <se@FreeBSD.org> |
Fix consistency test to not fail on pre PCI 2.0 motherboards
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81cf5d7a |
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05-Mar-1997 |
Stefan Eßer <se@FreeBSD.org> |
improve pcibus_check: Only assume PCI if at least one PCI to anything bridge on bus 0. This fixes problems with EISA-only systems mistakenly being assumed to support PCI.
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6875d254 |
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22-Feb-1997 |
Peter Wemm <peter@FreeBSD.org> |
Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not ready for it yet.
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41236783 |
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25-Jan-1997 |
Bruce Evans <bde@FreeBSD.org> |
Sync with <pci/pcibus.h>. pcibus.c unfortunately still compiled (with only 3 or 4 warnings) when pb_maxirq went away.
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1130b656 |
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14-Jan-1997 |
Jordan K. Hubbard <jkh@FreeBSD.org> |
Make the long-awaited change from $Id$ to $FreeBSD$ This will make a number of things easier in the future, as well as (finally!) avoiding the Id-smashing problem which has plagued developers for so long. Boy, I'm glad we're not using sup anymore. This update would have been insane otherwise.
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62ce633d |
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08-Jan-1997 |
Nate Williams <nate@FreeBSD.org> |
Make the code more consistant by using the INTR*MASK macros througout the code. Reviewed by: bde [ Bruce suggest removing the macros completely, but I'm not up to that task quite yet. ]
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e30f0011 |
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30-Oct-1996 |
Satoshi Asami <asami@FreeBSD.org> |
More merge and update. (1) deleted #if 0 pc98/pc98/mse.c (2) hold per-unit I/O ports in ed_softc pc98/pc98/if_ed.c pc98/pc98/if_ed98.h (3) merge more files by segregating changes into headers. new file (moved from pc98/pc98): i386/isa/aic_98.h deleted: well, it's already in the commit message so I won't repeat the long list here ;) Submitted by: The FreeBSD(98) Development Team
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9b2b0822 |
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17-Jun-1996 |
Bruce Evans <bde@FreeBSD.org> |
Removed unused #includes of <i386/isa/icu.h> and <i386/isa/icu.h>. icu.h is only used by the icu support modules and by a few drivers that know too much about the icu (most only use it to convert `n' to `IRQn'). isa.h is only used by ioconf.c and by a few drivers that know too much about isa addresses (a few have to, because config is deficient).
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21219d21 |
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13-Jun-1996 |
Stefan Eßer <se@FreeBSD.org> |
Change CONF1_ENABLE_MSK to 0x7ff00000 in another attempt to decide whether a system could possibly support PCI configuration mechanism 1 (or whether it rather is an EISA only system ...).
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e20df7fc |
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30-Apr-1996 |
Stefan Eßer <se@FreeBSD.org> |
Make pcibus_check() ignore Device/Vendor IDs of all 0.
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3157adc8 |
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07-Apr-1996 |
Bruce Evans <bde@FreeBSD.org> |
Removed now-unused #includes of <machine/cpu.h>. They were for bootverbose being declared in the wrong place.
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a680ab75 |
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29-Mar-1996 |
Bruce Evans <bde@FreeBSD.org> |
Count PCI irqs in up to 4 ISAish counters named `pci irqnn' instead of in the clk0 counter. Reviewed by: s
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6ea3e9d8 |
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15-Dec-1995 |
Bruce Evans <bde@FreeBSD.org> |
Completed function declarations and/or added prototypes and/or added #includes to get prototypes. pci now uses a different interrupt handler type for interrupts that it dispatches and the isa interrupt handler type for the interrupts that it handles.
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6f4e0beb |
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10-Dec-1995 |
Poul-Henning Kamp <phk@FreeBSD.org> |
Staticize and cleanup.
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2e80ea05 |
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17-Oct-1995 |
Stefan Eßer <se@FreeBSD.org> |
Make CONF1_ENABLE_MSK1 even less restriktive: Ignore slot ID ...
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0e2f699b |
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17-Oct-1995 |
Stefan Eßer <se@FreeBSD.org> |
At least the ASUS Triton motherboards don't disable the PCI bus configuration accesses after the BIOS bus scan. The previous revision made the assumption, that every PCI motherboard did ... Change the test on the initial value of the CONF1_ADDR_PORT register in a way that makes the probe succeed on triton based motherboards, without breaking the EISA motherboard that has some non-PCI register at the same address.
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287911bd |
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15-Oct-1995 |
Stefan Eßer <se@FreeBSD.org> |
Go back to separate tests for configuration mechanism 1 and mechanism 2. Require the state of the configuration enable bits to be OFF assuming that the BIOS left them that way, as it should anyway to avoid bad things to happen. The tests themselves are copied from the previous release, with the exception of CONF1_ENABLE_MSK1 having the LSB set. This bit should be read back as '0', since only DWORD addresses are legal.
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c7483249 |
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09-Oct-1995 |
Stefan Eßer <se@FreeBSD.org> |
Fix bad typo: CONF1_ENABLE_RES1 was written CONF1_ENABLE_CHK1 ...
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77b57314 |
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22-Sep-1995 |
Stefan Eßer <se@FreeBSD.org> |
New approach to the PCI bus configuration mechanism probe problem: - try to make sure there is any kind of PCI device - if there is anything at port 0x0cf8, then check for mech. 1 or 2
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a3adc4f8 |
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18-Sep-1995 |
Stefan Eßer <se@FreeBSD.org> |
Revert most changes of previous commit. Changes relative to 1.12: - Put extra instruction between outl()/inl() sequence to prevent the old value being read back because of the bus capacitance. - Additional check for existence of register at CONF2_ENABLE_PORT.
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2d144186 |
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15-Sep-1995 |
Stefan Eßer <se@FreeBSD.org> |
Another try to determine the PCI bus configuration mode (and whether there is a PCI bus at all) ... - Do not expect the chip sets to follow even very clearly expressed requirements of the PCI 2.0 spec. - Do not read back the value just written to an I/O port without making sure that some other data have crossed the bus in between ...
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d7ea35fc |
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14-Sep-1995 |
Stefan Eßer <se@FreeBSD.org> |
Improved verification of configuration space accesses working: Scan for devices instead of assuming that device 0 is present on bus 0 of every PCI motherboard.
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cda67911 |
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13-Sep-1995 |
Stefan Eßer <se@FreeBSD.org> |
Make the PCI host bridge probe code more robust when dealing with chip sets that use configuration mode 1, but still violate the PCI 2.0 specs ... (Required for the Compaq Proliant, for example.)
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d2a2d5ec |
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30-Jun-1995 |
Stefan Eßer <se@FreeBSD.org> |
The PCI config mechanism 1 test failed for the Intel Aries. Make it less strict ... Submitted by: NIIMI Satoshi <sa2c@and.or.jp>
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0847c06d |
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28-Jun-1995 |
Stefan Eßer <se@FreeBSD.org> |
PCI configuration mechanism now determined by a method, that doesn't fail on new hardware (Compaq Prolinea and Compaq Prosignea), and that doesn't erroneously identify old mech. 2 chip sets as using mech. 1. (See section 3.6.4.1.1 of the PCI bus specs rev. 2.0)
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0f29bf01 |
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22-Mar-1995 |
Stefan Eßer <se@FreeBSD.org> |
Correct pcibus_setup() to return as soon as one test succeeds.
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9c6f3c13 |
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22-Mar-1995 |
Stefan Eßer <se@FreeBSD.org> |
Delete PCI PCI bridge simulator code ... Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
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33865a31 |
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22-Mar-1995 |
Stefan Eßer <se@FreeBSD.org> |
Remove spurious declaration of printf(). Submitted by: Michael Reifenberger <root@rz-wb.fh-sw.de>
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5b3f532e |
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21-Mar-1995 |
Stefan Eßer <se@FreeBSD.org> |
New ISA specific PCI code. Supports shared PCI interrupts. Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
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550f8550 |
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25-Feb-1995 |
Bruce Evans <bde@FreeBSD.org> |
Replace all remaining instances of `i386/include' by `machine' and fix nearby #include inconsistencies.
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781d9d46 |
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25-Feb-1995 |
Stefan Eßer <se@FreeBSD.org> |
Keep PCI_CONF_MODE in a safe place for later reference, if #defined. Reviewed by: se Submitted by: seb@erix.ericsson.se (Sebastian Strollo)
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6f22585d |
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09-Feb-1995 |
Stefan Eßer <se@FreeBSD.org> |
Initialisation of interrupt masks changed. Reviewed by: se Submitted by: wolf (Wolfgang Stanglmeier)
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ac19f918 |
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01-Feb-1995 |
Stefan Eßer <se@FreeBSD.org> |
Reviewed by: se Submitted by: wolf (Wolfgang Stanglmeier) New ISA dependend file for PCI bus support. Replaces sys/i386/pci/pcibios.c.
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