dev/uart: Support 8-byte register access

While we only support 4-byte registers in the uart code the physical
access may be to an 8-byte register. Support this as an option on
non-i386. On i386 we lack the needed 8-byte bus_space functions.

ACPI has an option for 8-byte register io width, and FDT can be given
any size. Support these sizes, even if we don't expect to see hardware
with an 8-byte io width.

Reviewed by: imp
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D43374

dev/uart: Use a linker set to find uart classes

When the uart is configured via the environment we need to find the
uart class with a specified name. Currently to do this with an
incomplete list of uarts. As we may not have included all uarts in the
kernel each class is defined as weak.

Switch to a linker set so the list is always up to date based on what
is included in the kernel, and the class can be static.

Reviewed by: imp
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D43361

sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

uart: Remove sbbc reference

sbbc support is for sparc64 only, which was removed in 58aa35d42975.

Sponsored by: Netflix

arm: Catch up with Samsung S3C2xx0 code removal

The code backing these uart_class was removed 7 years ago in
4648ee952520.

Sponsored by: Netflix

scc(4)/uart(4): Remove obsolete support for Siemens SAB 82532

It's no longer used since 58aa35d42975c298ca0adba705c042596303c9f5
and r357455 respectively.

Add busy detect quirk to list of console options

This change allows one to set the busy_detect flag
required by the synopsys UART at the loader prompt.
This is needed by the EPYC 3000 SoC.

This will give users a working console up to the point where getty is required:
hw.uart.console="mm:0xfedc9000,rs:2,bd:1"

Reviewed by: imp
MFC after: 4 weeks
Differential Revision: https://reviews.freebsd.org/D16399

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Allow setting access-width for UART registers.

This is required for FDT's standard "reg-io-width" property
(similar to "reg-shift" property) found in many DTS files.

This fixes operation on Altera Arria 10 SOC Development Kit,
where standard ns8250 uart allows 4-byte access only.

Reviewed by: kan, marcel
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D9785

Remove pc98 support completely.
I thank all developers and contributors for pc98.

Relnotes: yes

Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.

Differential Revision: https://reviews.freebsd.org/D1993
Submitted by: Michal Meloun

Define new linker set, UART_FDT_CLASS_AND_DEVICE, for registering full
(class and device) FDT UART. Define second one, UART_FDT_CLASS, for UART
class only.

This paves the way for declaring uart_class data and ofw/fdt compat data
with a uart implementation, rather than needing a big global table of
compat data and weak-symbol declarations of every existing implementation.

Differential Revision: https://reviews.freebsd.org/D1992
Submitted by: Michal Meloun

Rename Exynos UART driver. No functional change.

Submitted by: Michal Meloun <meloun@miracle.cz>

Add uart driver for Qualcomm MSM 7000/8000 series chips.
It is working on IFC6410 board which has Qualcomm Snapdragon SoC.

Approved by: stas (mentor)

Add Atmel serial drivers.

Add support for Freescale Vybrid Family VF600 heterogeneous
ARM Cortex-A5/M4 SoC (M4 core is not used in this work).

Support includes device drivers for:
- NAND Flash Controller (NFC)
- USB Enhanced Host Controller Interface (EHCI)
- General-Purpose Input/Output (GPIO)
- Universal Asynchronous Receiver/Transmitter (UART)

Also supported:
- Generic Interrupt Controller (GIC)
- MPCore timer
- ffec ethernet driver

Reviewed by: ray
Approved by: cognet (mentor)

Arrange for uart_cpu_fdt's probe() routine to use the same table of compat
strings as uart_bus_fdt's probe().

The bus code uses ofw_bus_search_compatible() and that's not an option in
cpu (console) code -- it runs way before the ofw routines are usable. So
the console probe has its own loop to search the table, but now at least
there's only one table to be maintained when new devices are added.

Add support for uarts other than the serial console in TI OMAP SoCs.

The TI uart hardware is ns16550-compatible, except that before it can
be used the clocks and power have to be enabled and a non-standard
mode control register has to be set to put the device in uart mode
(as opposed to irDa or other serial protocols). This adds the extra
code in an extension to the standard ns8250 probe routine, and the
rest of the driver is just the standard ns8250 code.

Teach UART to attach Exynos/s3/s5 class driver.

Submitted by: Ruslan Bukin <br@bsdpad.com>
Reviewed by: gonzo

Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.

Submitted by: Thomas Skibo <ThomasSkibo (at) sbcglobal.net>
Tested by: wkoszek (ZedBoard)
Reviewed by: wkoszek, freebsd-arm@ (no objections raised)

Integrate Efika MX project back to home.

Sponsored by: The FreeBSD Foundation

Add PrimeCell UART (PL011) driver

Obtained from: Semihalf

Merging of projects/armv6, part 8

r235162:

Initial LPC32x0 support. Includes DTS file for Embedded Artists EA3250
board.

Peripherals currently supported:
- Serial ports
- Interrupt controller
- Timers
- Ethernet
- USB host
- Framebuffer (in conjunction with SSD1289 LCD controller)
- RTC
- SPI
- GPIO

Submitted by: Jakub Wojciech Klama <jceel@freebsd.org>

A new jail(8) with a configuration file, to replace the work currently done
by /etc/rc.d/jail.

Add sbbc(4), a driver for the BootBus controller found in Serengeti and
StarCat systems which provides time-of-day services for both as well as
console service for Serengeti, i.e. Sun Fire V1280. While the latter is
described with a device type of serial in the OFW device tree, it isn't
actually an UART. Nevertheless the console service is handled by uart(4)
as this allowed to re-use quite a bit of MD and MI code. Actually, this
idea is stolen from Linux which interfaces the sun4v hypervisor console
with the Linux counterpart of uart(4).

Add minimal support for SGI Altix l1 console -- a SAL-based character
device. This may not be here to stay, because it's not a real serial
device. Then again, who cares?

- Import the HEAD csup code which is the basis for the cvsmode work.

Add the 2nd CCU and PnP devices support on pc98.

Reviewed by: imp
Obtained from: //depot/projects/uart with some fixes

add device hints to control the rx FIFO interrupt level on 16550A parts

PR: kern/121421
Submitted by: UEMURA Tetsuya
Reviewed by: marcel
MFC after: 2 weeks

Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.

The PQ3 is a high performance integrated communications processing system
based on the e500 core, which is an embedded RISC processor that implements
the 32-bit Book E definition of the PowerPC architecture. For details refer
to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E

This port was tested and successfully run on the following members of the PQ3
family: MPC8533, MPC8541, MPC8548, MPC8555.

The following major integrated peripherals are supported:

* On-chip peripherals bus
* OpenPIC interrupt controller
* UART
* Ethernet (TSEC)
* Host/PCI bridge
* QUICC engine (SCC functionality)

This commit brings the main functionality and will be followed by individual
drivers that are logically separate from this base.

Approved by: cognet (mentor)
Obtained from: Juniper, Semihalf
MFp4: e500

Don't expose the uart_ops structure directly, but instead have
it obtained through the uart_class structure. This allows us
to declare the uart_class structure as weak and as such allows
us to reference it even when it's not compiled-in.
It also allows is to get the uart_ops structure by name, which
makes it possible to implement the dt tag handling in uart_getenv().
The side-effect of all this is that we're using the uart_class
structure more consistently which means that we now also have
access to the size of the bus space block needed by the hardware
when we map the bus space, eliminating any hardcoding.

Remove definitions of uart_[gs]etdreg. They are not used anymore and
were in fact wrong.

Start each of the license/copyright comments with /*-, minor shuffle of lines

Revert the introduction of iobase in struct uart_bas. Both the SAB82532
and the Z8530 drivers used the I/O address as a quick and dirty way to
determine which channel they operated on, but formalizing this by
introducing iobase is not a solution. How for example would a driver
know which channel it controls for a multi-channel UART that only has a
single I/O range?

Instead, add an explicit field, called chan, to struct uart_bas that
holds the channel within a device, or 0 otherwise. The chan field is
initialized both by the system device probing (i.e. a system console)
or it is passed down to uart_bus_probe() by any of the bus front-ends.
As such, it impacts all platforms and bus drivers and makes it a rather
large commit.

Remove the use of iobase in uart_cpu_eqres() for pc98. It is expected
that platforms have the capability to compare tag and handle pairs for
equality; as to determine whether two pairs access the same device or
not. The use of iobase for pc98 makes it impossible to formalize this
and turn it into a real newbus function later. This commit reverts
uart_cpu_eqres() for pc98 to an unimplemented function. It has to be
reimplemented using only the tag and handle fields in struct uart_bas.

Rewrite the SAB82532 and Z8530 drivers to use the chan field in struct
uart_bas. Remove the IS_CHANNEL_A and IS_CHANNEL_B macros. We don't
need to abstract anything anymore.

Discussed with: nyan
Tested on: i386, ia64, sparc64

- Keep the base address in struct uart_bas for sab82532 and z8530 modules.
- Remove buggy uart_cpu_busaddr() function.

The uart(4) driver is an universal driver for various UART hardware.
It improves on sio(4) in the following areas:
o Fully newbusified to allow for memory mapped I/O. This is a must
for ia64 and sparc64,
o Machine dependent code to take full advantage of machine and firm-
ware specific ways to define serial consoles and/or debug ports.
o Hardware abstraction layer to allow the driver to be used with
various UARTs, such as the well-known ns8250 family of UARTs, the
Siemens sab82532 or the Zilog Z8530. This is especially important
for pc98 and sparc64 where it's common to have different UARTs,
o The notion of system devices to unkludge low-level consoles and
remote gdb ports and provides the mechanics necessary to support
the keyboard on sparc64 (which is UART based).
o The notion of a kernel interface so that a UART can be tied to
something other than the well-known TTY interface. This is needed
on sparc64 to present the user with a device and ioctl handling
suitable for a keyboard, but also allows us to cleanly hide an
UART when used as a debug port.

Following is a list of features and bugs/flaws specific to the ns8250
family of UARTs as compared to their support in sio(4):
o The uart(4) driver determines the FIFO size and automaticly takes
advantages of larger FIFOs and/or additional features. Note that
since I don't have sufficient access to 16[679]5x UARTs, hardware
flow control has not been enabled. This is almost trivial to do,
provided one can test. The downside of this is that broken UARTs
are more likely to not work correctly with uart(4). The need for
tunables or knobs may be large enough to warrant their creation.
o The uart(4) driver does not share the same bumpy history as sio(4)
and will therefore not provide the necessary hooks, tweaks, quirks
or work-arounds to deal with once common hardware. To that extend,
uart(4) supports a subset of the UARTs that sio(4) supports. The
question before us is whether the subset is sufficient for current
hardware.
o There is no support for multiport UARTs in uart(4). The decision
behind this is that uart(4) deals with one EIA RS232-C interface.
Packaging of multiple interfaces in a single chip or on a single
expansion board is beyond the scope of uart(4) and is now mostly
left for puc(4) to deal with. Lack of hardware made it impossible
to actually implement such a dependency other than is present for
the dual channel SAB82532 and Z8350 SCCs.

The current list of missing features is:
o No configuration capabilities. A set of tunables and sysctls is
being worked out. There are likely not going to be any or much
compile-time knobs. Such configuration does not fit well with
current hardware.
o No support for the PPS API. This is partly dependent on the
ability to configure uart(4) and partly dependent on having
sufficient information to implement it properly.

As usual, the manpage is present but lacks the attention the
software has gotten.